JP2009158856A5 - - Google Patents

Download PDF

Info

Publication number
JP2009158856A5
JP2009158856A5 JP2007338121A JP2007338121A JP2009158856A5 JP 2009158856 A5 JP2009158856 A5 JP 2009158856A5 JP 2007338121 A JP2007338121 A JP 2007338121A JP 2007338121 A JP2007338121 A JP 2007338121A JP 2009158856 A5 JP2009158856 A5 JP 2009158856A5
Authority
JP
Japan
Prior art keywords
mounting structure
stacked
structure according
semiconductor chips
stacked mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007338121A
Other languages
English (en)
Japanese (ja)
Other versions
JP5072584B2 (ja
JP2009158856A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2007338121A priority Critical patent/JP5072584B2/ja
Priority claimed from JP2007338121A external-priority patent/JP5072584B2/ja
Priority to US12/337,267 priority patent/US7875974B2/en
Publication of JP2009158856A publication Critical patent/JP2009158856A/ja
Publication of JP2009158856A5 publication Critical patent/JP2009158856A5/ja
Application granted granted Critical
Publication of JP5072584B2 publication Critical patent/JP5072584B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2007338121A 2007-12-27 2007-12-27 積層実装構造体 Expired - Fee Related JP5072584B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2007338121A JP5072584B2 (ja) 2007-12-27 2007-12-27 積層実装構造体
US12/337,267 US7875974B2 (en) 2007-12-27 2008-12-17 Laminated mounting structure and memory card

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007338121A JP5072584B2 (ja) 2007-12-27 2007-12-27 積層実装構造体

Publications (3)

Publication Number Publication Date
JP2009158856A JP2009158856A (ja) 2009-07-16
JP2009158856A5 true JP2009158856A5 (https=) 2010-11-18
JP5072584B2 JP5072584B2 (ja) 2012-11-14

Family

ID=40797144

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007338121A Expired - Fee Related JP5072584B2 (ja) 2007-12-27 2007-12-27 積層実装構造体

Country Status (2)

Country Link
US (1) US7875974B2 (https=)
JP (1) JP5072584B2 (https=)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010056099A (ja) * 2008-08-26 2010-03-11 Hitachi Ltd 半導体装置
JP2013219268A (ja) * 2012-04-11 2013-10-24 Sumitomo Electric Ind Ltd 半導体デバイス
US10178786B2 (en) 2015-05-04 2019-01-08 Honeywell International Inc. Circuit packages including modules that include at least one integrated circuit
US9741644B2 (en) * 2015-05-04 2017-08-22 Honeywell International Inc. Stacking arrangement for integration of multiple integrated circuits
JP6380581B1 (ja) 2017-03-08 2018-08-29 日本電気株式会社 基板、回路基板、電子部品、および電子部品組立体
KR102152101B1 (ko) * 2018-11-02 2020-09-07 진영글로벌 주식회사 차량 전장용 디바이스
US11023394B2 (en) 2019-02-19 2021-06-01 Western Digital Technologies, Inc. Socket interconnector with compressible ball contacts for high pad count memory cards
US12159824B2 (en) * 2020-12-23 2024-12-03 Ccs Technology Corporation 3D package configuration
US12354942B2 (en) * 2020-12-23 2025-07-08 Ccs Technology Corporation 3D package configuration
US12255180B2 (en) * 2020-12-23 2025-03-18 Ccs Technology Corporation 3D package configuration
TWI765490B (zh) * 2020-12-23 2022-05-21 晶云科技股份有限公司 3d封裝構造

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2682200B2 (ja) * 1990-05-24 1997-11-26 三菱電機株式会社 半導体装置
JP3012184B2 (ja) * 1996-01-12 2000-02-21 富士通株式会社 実装装置
JP3186700B2 (ja) * 1998-06-24 2001-07-11 日本電気株式会社 半導体装置及びその製造方法
JP2001217388A (ja) 2000-02-01 2001-08-10 Sony Corp 電子装置およびその製造方法
JP4436582B2 (ja) 2000-10-02 2010-03-24 パナソニック株式会社 カード型記録媒体及びその製造方法
US7907420B2 (en) * 2005-03-09 2011-03-15 Panasonic Corporation Bare chip mounted structure and mounting method
JP2007019415A (ja) * 2005-07-11 2007-01-25 Renesas Technology Corp 半導体装置およびその製造方法

Similar Documents

Publication Publication Date Title
JP2009158856A5 (https=)
JP2014123736A5 (https=)
JP2006093189A5 (https=)
JP2008016519A5 (https=)
TWI559494B (zh) 積體電路封裝結構
US9123554B2 (en) Semiconductor device
JP2012069984A5 (https=)
EP1903606A3 (en) Stackable tier structure comprising an IC die and a high density feedthrough structure
JP2006295136A5 (https=)
JP2008193097A5 (https=)
TW200707662A (en) Stack structure of semiconductor component embedded in supporting board
WO2007101251A3 (en) Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices
TW200737492A (en) Semiconductor package stack with through-via connection
JP2014025846A5 (https=)
EP2866257A3 (en) Printed circuit board and manufacturing method thereof and semiconductor pacakge using the same
JP2008294014A5 (https=)
JP2009110983A5 (https=)
US20080179731A1 (en) Anti-Impact memory module
KR20140121181A (ko) 인쇄회로기판 및 이를 포함하는 메모리 모듈
JP2013251303A5 (ja) 半導体パッケージ、積層型半導体パッケージ及びプリント回路板
JP2008078367A5 (https=)
KR20120096754A (ko) 인터포저를 이용한 웨이퍼 칩의 3차원 스택 구조
CN107197595A (zh) 一种印制电路板及其焊接设计
JP2015177171A (ja) 半導体装置
JP2005150283A5 (https=)