JP2009117767A - 半導体装置の製造方法及びそれにより製造した半導体装置 - Google Patents

半導体装置の製造方法及びそれにより製造した半導体装置 Download PDF

Info

Publication number
JP2009117767A
JP2009117767A JP2007292142A JP2007292142A JP2009117767A JP 2009117767 A JP2009117767 A JP 2009117767A JP 2007292142 A JP2007292142 A JP 2007292142A JP 2007292142 A JP2007292142 A JP 2007292142A JP 2009117767 A JP2009117767 A JP 2009117767A
Authority
JP
Japan
Prior art keywords
semiconductor chip
semiconductor device
wiring board
wiring
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007292142A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009117767A5 (https=
Inventor
Atsushi Oi
淳 大井
Masahiro Haruhara
昌宏 春原
Tomoji Fujii
朋治 藤井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2007292142A priority Critical patent/JP2009117767A/ja
Priority to US12/266,075 priority patent/US20090121334A1/en
Priority to TW097143009A priority patent/TW200921821A/zh
Priority to KR1020080110509A priority patent/KR20090048362A/ko
Publication of JP2009117767A publication Critical patent/JP2009117767A/ja
Publication of JP2009117767A5 publication Critical patent/JP2009117767A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
    • H10W76/10—Containers or parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W40/00—Arrangements for thermal protection or thermal control
    • H10W40/70—Fillings or auxiliary members in containers or in encapsulations for thermal protection or control
    • H10W40/77—Auxiliary members characterised by their shape
    • H10W40/778—Auxiliary members characterised by their shape in encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/121—Arrangements for protection of devices protecting against mechanical damage
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W42/00—Arrangements for protection of devices
    • H10W42/20—Arrangements for protection of devices protecting against electromagnetic or particle radiation, e.g. light, X-rays, gamma-rays or electrons
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/70—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping
    • H10P72/74—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support
    • H10P72/7424—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof for supporting or gripping using temporarily an auxiliary support used as a support during the manufacture of self-supporting substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07202—Connecting or disconnecting of bump connectors using auxiliary members
    • H10W72/07204—Connecting or disconnecting of bump connectors using auxiliary members using temporary auxiliary members, e.g. sacrificial coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07251—Connecting or disconnecting of bump connectors characterised by changes in properties of the bump connectors during connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/877—Bump connectors and die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H10W74/012—Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/131—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed
    • H10W74/142—Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being only partially enclosed the encapsulations exposing the passive side of the semiconductor body
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Landscapes

  • Wire Bonding (AREA)
JP2007292142A 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置 Pending JP2009117767A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2007292142A JP2009117767A (ja) 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置
US12/266,075 US20090121334A1 (en) 2007-11-09 2008-11-06 Manufacturing method of semiconductor apparatus and semiconductor apparatus
TW097143009A TW200921821A (en) 2007-11-09 2008-11-07 Manufacturing method of semiconductor apparatus and semiconductor apparatus
KR1020080110509A KR20090048362A (ko) 2007-11-09 2008-11-07 반도체 장치의 제조 방법 및 반도체 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007292142A JP2009117767A (ja) 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置

Publications (2)

Publication Number Publication Date
JP2009117767A true JP2009117767A (ja) 2009-05-28
JP2009117767A5 JP2009117767A5 (https=) 2010-11-04

Family

ID=40622940

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007292142A Pending JP2009117767A (ja) 2007-11-09 2007-11-09 半導体装置の製造方法及びそれにより製造した半導体装置

Country Status (4)

Country Link
US (1) US20090121334A1 (https=)
JP (1) JP2009117767A (https=)
KR (1) KR20090048362A (https=)
TW (1) TW200921821A (https=)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012114431A (ja) * 2010-11-23 2012-06-14 Ibiden Co Ltd 半導体搭載用基板、半導体装置及び半導体装置の製造方法
JP2012160707A (ja) * 2011-01-28 2012-08-23 Samsung Electronics Co Ltd 積層半導体チップ、半導体装置およびこれらの製造方法
JP2013526066A (ja) * 2010-04-29 2013-06-20 日本テキサス・インスツルメンツ株式会社 低減されたダイ歪みアッセンブリのためのパッケージ基板のためのｃｔｅ補償
JP2013183002A (ja) * 2012-03-01 2013-09-12 Ibiden Co Ltd 電子部品

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2337068A1 (en) 2009-12-18 2011-06-22 Nxp B.V. Pre-soldered leadless package
US8455991B2 (en) * 2010-09-24 2013-06-04 Stats Chippac Ltd. Integrated circuit packaging system with warpage control and method of manufacture thereof
US8410604B2 (en) * 2010-10-26 2013-04-02 Xilinx, Inc. Lead-free structures in a semiconductor device
US9406579B2 (en) * 2012-05-14 2016-08-02 STATS ChipPAC Pte. Ltd. Semiconductor device and method of controlling warpage in semiconductor package
JP6470095B2 (ja) * 2014-07-25 2019-02-13 京セラ株式会社 配線基板
TWI632647B (zh) * 2016-01-18 2018-08-11 Siliconware Precision Industries Co., Ltd. 封裝製程及其所用之封裝基板
US10580710B2 (en) 2017-08-31 2020-03-03 Micron Technology, Inc. Semiconductor device with a protection mechanism and associated systems, devices, and methods
US10475771B2 (en) 2018-01-24 2019-11-12 Micron Technology, Inc. Semiconductor device with an electrically-coupled protection mechanism and associated systems, devices, and methods
US10381329B1 (en) 2018-01-24 2019-08-13 Micron Technology, Inc. Semiconductor device with a layered protection mechanism and associated systems, devices, and methods
JP7189672B2 (ja) * 2018-04-18 2022-12-14 新光電気工業株式会社 半導体装置及びその製造方法
US12205877B2 (en) * 2019-02-21 2025-01-21 AT&S(Chongqing) Company Limited Ultra-thin component carrier having high stiffness and method of manufacturing the same
CN111599687B (zh) * 2019-02-21 2022-11-15 奥特斯科技(重庆)有限公司 具有高刚度的超薄部件承载件及其制造方法
CN114582731A (zh) * 2022-05-05 2022-06-03 华进半导体封装先导技术研发中心有限公司 一种层叠封装的下封装体结构及其形成方法
CN118782478A (zh) * 2024-07-01 2024-10-15 中科同德微电子科技(大同)有限公司 Igbt芯片封装方法及igbt芯片封装模块

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003163459A (ja) * 2001-11-26 2003-06-06 Sony Corp 高周波回路ブロック体及びその製造方法、高周波モジュール装置及びその製造方法。

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01313969A (ja) * 1988-06-13 1989-12-19 Hitachi Ltd 半導体装置
US5783465A (en) * 1997-04-03 1998-07-21 Lucent Technologies Inc. Compliant bump technology
JP3834426B2 (ja) * 1997-09-02 2006-10-18 沖電気工業株式会社 半導体装置
US5977626A (en) * 1998-08-12 1999-11-02 Industrial Technology Research Institute Thermally and electrically enhanced PBGA package
US6191360B1 (en) * 1999-04-26 2001-02-20 Advanced Semiconductor Engineering, Inc. Thermally enhanced BGA package
TW411037U (en) * 1999-06-11 2000-11-01 Ind Tech Res Inst Integrated circuit packaging structure with dual directions of thermal conduction path
JP2001267473A (ja) * 2000-03-17 2001-09-28 Hitachi Ltd 半導体装置およびその製造方法
US6566748B1 (en) * 2000-07-13 2003-05-20 Fujitsu Limited Flip-chip semiconductor device having an improved reliability
US6432742B1 (en) * 2000-08-17 2002-08-13 St Assembly Test Services Pte Ltd. Methods of forming drop-in heat spreader plastic ball grid array (PBGA) packages
US6525420B2 (en) * 2001-01-30 2003-02-25 Thermal Corp. Semiconductor package with lid heat spreader
US6519154B1 (en) * 2001-08-17 2003-02-11 Intel Corporation Thermal bus design to cool a microelectronic die
US6775140B2 (en) * 2002-10-21 2004-08-10 St Assembly Test Services Ltd. Heat spreaders, heat spreader packages, and fabrication methods for use with flip chip semiconductor devices
US6747350B1 (en) * 2003-06-06 2004-06-08 Silicon Integrated Systems Corp. Flip chip package structure
TWI236118B (en) * 2003-06-18 2005-07-11 Advanced Semiconductor Eng Package structure with a heat spreader and manufacturing method thereof
US7608789B2 (en) * 2004-08-12 2009-10-27 Epcos Ag Component arrangement provided with a carrier substrate
US7348663B1 (en) * 2005-07-15 2008-03-25 Asat Ltd. Integrated circuit package and method for fabricating same
US7787252B2 (en) * 2008-12-04 2010-08-31 Lsi Corporation Preferentially cooled electronic device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003163459A (ja) * 2001-11-26 2003-06-06 Sony Corp 高周波回路ブロック体及びその製造方法、高周波モジュール装置及びその製造方法。

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013526066A (ja) * 2010-04-29 2013-06-20 日本テキサス・インスツルメンツ株式会社 低減されたダイ歪みアッセンブリのためのパッケージ基板のためのｃｔｅ補償
JP2012114431A (ja) * 2010-11-23 2012-06-14 Ibiden Co Ltd 半導体搭載用基板、半導体装置及び半導体装置の製造方法
US9338886B2 (en) 2010-11-23 2016-05-10 Ibiden Co., Ltd. Substrate for mounting semiconductor, semiconductor device and method for manufacturing semiconductor device
JP2012160707A (ja) * 2011-01-28 2012-08-23 Samsung Electronics Co Ltd 積層半導体チップ、半導体装置およびこれらの製造方法
JP2013183002A (ja) * 2012-03-01 2013-09-12 Ibiden Co Ltd 電子部品

Also Published As

Publication number Publication date
KR20090048362A (ko) 2009-05-13
TW200921821A (en) 2009-05-16
US20090121334A1 (en) 2009-05-14

Similar Documents

Publication Publication Date Title
JP2009117767A (ja) 半導体装置の製造方法及びそれにより製造した半導体装置
US11508776B2 (en) Image sensor semiconductor packages and related methods
JP4926692B2 (ja) 配線基板及びその製造方法と半導体装置
JP5579402B2 (ja) 半導体装置及びその製造方法並びに電子装置
TWI384630B (zh) 製造電子部件封裝結構之方法
US10002823B2 (en) Packaging substrate and method of fabricating the same
US20120038044A1 (en) Chip scale package and fabrication method thereof
US8334174B2 (en) Chip scale package and fabrication method thereof
JP2007521656A (ja) 半導体パッケージのためのリード・フレーム・ルーティングされたチップ・パッド
JP2008218979A (ja) 電子パッケージ及びその製造方法
JP5980566B2 (ja) 半導体装置及びその製造方法
CN112071821B (zh) 半导体封装基板及其制法与电子封装件
US11205644B2 (en) Method for fabricating electronic package
CN116895636B (zh) 封装基板及其制法
KR101697684B1 (ko) 임베딩된 다이를 갖는 집적 회로 패키지 내의 열 비아들
TWI550732B (zh) 晶片封裝結構的製作方法
KR20030085449A (ko) 개량된 플립 칩 패키지
KR20070051165A (ko) 프리 솔더 범프를 갖는 반도체 패키지와, 그를 이용한 적층패키지 및 그의 제조 방법
KR101340348B1 (ko) 마스크 패턴을 이용한 칩 내장형 패키지 기판 및 그 제조방법
JP2004193274A (ja) 電子部品実装構造及びその製造方法
US12550796B2 (en) Electronic package and fabricating method thereof
KR101376765B1 (ko) 인터포저가 필요없는 몰딩 패키지 제조 방법
JP4133782B2 (ja) 電子部品実装構造及びその製造方法
WO2014171403A1 (ja) 半導体装置
JP2005223366A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100916

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20100916

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110519

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120821

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130129