JP2009104675A - デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 - Google Patents
デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 Download PDFInfo
- Publication number
- JP2009104675A JP2009104675A JP2009035190A JP2009035190A JP2009104675A JP 2009104675 A JP2009104675 A JP 2009104675A JP 2009035190 A JP2009035190 A JP 2009035190A JP 2009035190 A JP2009035190 A JP 2009035190A JP 2009104675 A JP2009104675 A JP 2009104675A
- Authority
- JP
- Japan
- Prior art keywords
- instruction
- interrupt
- instructions
- data processor
- execution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title claims abstract description 19
- 238000012545 processing Methods 0.000 title claims abstract description 19
- 230000003111 delayed effect Effects 0.000 claims description 5
- 230000008569 process Effects 0.000 claims description 5
- 230000008859 change Effects 0.000 abstract description 6
- 230000004048 modification Effects 0.000 abstract description 4
- 238000012986 modification Methods 0.000 abstract description 4
- 230000006870 function Effects 0.000 description 20
- 239000004020 conductor Substances 0.000 description 9
- 230000001934 delay Effects 0.000 description 6
- 238000007689 inspection Methods 0.000 description 5
- 230000007246 mechanism Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000012360 testing method Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000005055 memory storage Effects 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30094—Condition code generation, e.g. Carry, Zero flag
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30079—Pipeline control instructions, e.g. multicycle NOP
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
- G06F9/30003—Arrangements for executing specific machine instructions
- G06F9/30076—Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
- G06F9/30087—Synchronisation or serialisation instructions
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/46—Multiprogramming arrangements
- G06F9/48—Program initiating; Program switching, e.g. by interrupt
- G06F9/4806—Task transfer initiation or dispatching
- G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
- Executing Machine-Instructions (AREA)
- Debugging And Monitoring (AREA)
Abstract
【解決手段】一実施例では、データ・プロセッサ(10)によって割り込み認識遅延命令(IDLY4)を実行し、制御された区間にわたって、即ち、所定の時間期間または所定の命令数の間、割り込みの認識を遅延させるか、あるいは条件付きで遅延させることによって、変更処理を定義する専用命令を用いることなく、リード/モディファイ/ライト命令シーケンスを実行可能とする。IDLY4命令は、後続の命令が条件ビット(38)に影響を与える態様を変化させることができる。したがって、条件ビット(38)を用いて、IDLY4命令の実行後の割り込み非認識区間において、例外処理が発生したか否かについて判定を行うことができる。
【選択図】図1
Description
図4は、図3の割り込み認識遅延命令を用いて検査およびセット機能を実行する際に使用可能な一連の命令の一実施例を示す。
図6は、図3の割り込み認識遅延命令を用いてメモリ型カウンタ増分機能(memory−based counter function)を実行する際に使用可能な一連の命令の一実施例を示す。
12 中央演算装置(CPU)
14 メモリ
16 バス・インターフェース・モジュール
18 その他のモジュール
20 バス
22,24,28 集積回路端子
26 外部バス
30 命令パイプ回路
32 命令デコード回路
34,36 レジスタ
38 条件ビット
40 算術演算論理ユニット(ALU)
42 CPU制御回路
44 例外制御回路
46 割り込み制御回路
47 オーバーライド回路
48 カウンタ/タイマ回路
50 割り込み信号
52 例外信号
54,56,60,62,64 導体
58 制御/ステータス信号
70 指定フィールド
R1,R3 レジスタ
Claims (5)
- データ・プロセッサにおいて後続の命令処理に影響を及ぼす方法であって、
第1の命令を提供すること、
第2の命令を提供することであって、前記第1の命令の実行後に前記第2の命令が実行される場合、前記第2の命令は第1の動作を行い、前記第2の命令の実行が始まる前に前記第1の命令が実行されない場合、前記第2の命令は前記第1の動作とは異なる第2の動作を行なう、第2の命令を提供すること、
を備え、前記第1の命令の実行から保護されなければならない唯一必要な情報は、前記第1の命令が実行されたという事実であり、前記第1の命令と第2の命令とは同一の命令である、方法。 - 割り込み認識は、制御された時間の間選択的に遅延される、請求項1に記載の方法。
- 動作命令を提供しないこと、
を更に備える、請求項1に記載の方法。 - 前記第2の命令の前記第2の動作は、前記データ・プロセッサの実行による遅延処理を含む、請求項1に記載の方法。
- 第1の命令を実行する命令実行回路であって、前記第1の命令の実行後に第2の命令が実行される場合、前記第1の命令は第1の動作を行い、前記第2の命令の実行開始前に前記第1の命令が実行されない場合、前記第1の動作とは異なる第2の動作を行なう、命令実行回路と、
前記データ・プロセッサ内の所定の状態を示すフラグと
を備えるデータ・プロセッサであって、前記第1の動作は所定の第1の状態のフラグを含み、前記第2の動作は前記フラグの状態に影響は及ぼさず、前記第1の命令の実行から保護されなければならない唯一必要な情報は、前記第1の命令が実行されたという事実である、データ・プロセッサ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/963,321 US6000029A (en) | 1997-11-03 | 1997-11-03 | Method and apparatus for affecting subsequent instruction processing in a data processor |
US963321 | 1997-11-03 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31026898A Division JP4883824B2 (ja) | 1997-11-03 | 1998-10-30 | デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009104675A true JP2009104675A (ja) | 2009-05-14 |
JP4750865B2 JP4750865B2 (ja) | 2011-08-17 |
Family
ID=25507071
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31026898A Expired - Fee Related JP4883824B2 (ja) | 1997-11-03 | 1998-10-30 | デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 |
JP2009035190A Expired - Fee Related JP4750865B2 (ja) | 1997-11-03 | 2009-02-18 | デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP31026898A Expired - Fee Related JP4883824B2 (ja) | 1997-11-03 | 1998-10-30 | デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 |
Country Status (9)
Country | Link |
---|---|
US (2) | US6000029A (ja) |
EP (1) | EP0913767B1 (ja) |
JP (2) | JP4883824B2 (ja) |
KR (1) | KR100588790B1 (ja) |
CN (1) | CN1098487C (ja) |
DE (1) | DE69810064T2 (ja) |
HK (1) | HK1020218A1 (ja) |
SG (2) | SG101487A1 (ja) |
TW (1) | TW494363B (ja) |
Families Citing this family (39)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7805724B1 (en) * | 1998-05-27 | 2010-09-28 | Arc International I.P., Inc. | Apparatus, method and computer program for dynamic slip control in real-time scheduling |
JP2000330785A (ja) * | 1999-05-18 | 2000-11-30 | Sharp Corp | 実時間プロセッサおよび命令実行方法 |
US6618800B1 (en) * | 2000-01-18 | 2003-09-09 | Systemonic Ag | Procedure and processor arrangement for parallel data processing |
GB2369464B (en) | 2000-11-27 | 2005-01-05 | Advanced Risc Mach Ltd | A data processing apparatus and method for saving return state |
US6857036B2 (en) * | 2001-07-17 | 2005-02-15 | Hewlett Packard Development Company, L.P. | Hardware method for implementing atomic semaphore operations using code macros |
US20030154347A1 (en) * | 2002-02-12 | 2003-08-14 | Wei Ma | Methods and apparatus for reducing processor power consumption |
US7542566B2 (en) | 2003-04-18 | 2009-06-02 | Ip-First, Llc | Apparatus and method for performing transparent cipher block chaining mode cryptographic functions |
US7900055B2 (en) | 2003-04-18 | 2011-03-01 | Via Technologies, Inc. | Microprocessor apparatus and method for employing configurable block cipher cryptographic algorithms |
US7502943B2 (en) | 2003-04-18 | 2009-03-10 | Via Technologies, Inc. | Microprocessor apparatus and method for providing configurable cryptographic block cipher round results |
US7539876B2 (en) | 2003-04-18 | 2009-05-26 | Via Technologies, Inc. | Apparatus and method for generating a cryptographic key schedule in a microprocessor |
US7536560B2 (en) | 2003-04-18 | 2009-05-19 | Via Technologies, Inc. | Microprocessor apparatus and method for providing configurable cryptographic key size |
US7532722B2 (en) * | 2003-04-18 | 2009-05-12 | Ip-First, Llc | Apparatus and method for performing transparent block cipher cryptographic functions |
US7392400B2 (en) | 2003-04-18 | 2008-06-24 | Via Technologies, Inc. | Microprocessor apparatus and method for optimizing block cipher cryptographic functions |
US7844053B2 (en) | 2003-04-18 | 2010-11-30 | Ip-First, Llc | Microprocessor apparatus and method for performing block cipher cryptographic functions |
US7519833B2 (en) | 2003-04-18 | 2009-04-14 | Via Technologies, Inc. | Microprocessor apparatus and method for enabling configurable data block size in a cryptographic engine |
US7529367B2 (en) | 2003-04-18 | 2009-05-05 | Via Technologies, Inc. | Apparatus and method for performing transparent cipher feedback mode cryptographic functions |
US7529368B2 (en) | 2003-04-18 | 2009-05-05 | Via Technologies, Inc. | Apparatus and method for performing transparent output feedback mode cryptographic functions |
US7321910B2 (en) | 2003-04-18 | 2008-01-22 | Ip-First, Llc | Microprocessor apparatus and method for performing block cipher cryptographic functions |
US7925891B2 (en) | 2003-04-18 | 2011-04-12 | Via Technologies, Inc. | Apparatus and method for employing cryptographic functions to generate a message digest |
CN100495324C (zh) * | 2006-07-27 | 2009-06-03 | 中国科学院计算技术研究所 | 复杂指令集体系结构中的深度优先异常处理方法 |
US9772854B2 (en) | 2012-06-15 | 2017-09-26 | International Business Machines Corporation | Selectively controlling instruction execution in transactional processing |
US8966324B2 (en) | 2012-06-15 | 2015-02-24 | International Business Machines Corporation | Transactional execution branch indications |
US9367323B2 (en) | 2012-06-15 | 2016-06-14 | International Business Machines Corporation | Processor assist facility |
US9740549B2 (en) | 2012-06-15 | 2017-08-22 | International Business Machines Corporation | Facilitating transaction completion subsequent to repeated aborts of the transaction |
US9442737B2 (en) | 2012-06-15 | 2016-09-13 | International Business Machines Corporation | Restricting processing within a processor to facilitate transaction completion |
US9336046B2 (en) | 2012-06-15 | 2016-05-10 | International Business Machines Corporation | Transaction abort processing |
US8688661B2 (en) | 2012-06-15 | 2014-04-01 | International Business Machines Corporation | Transactional processing |
US8880959B2 (en) | 2012-06-15 | 2014-11-04 | International Business Machines Corporation | Transaction diagnostic block |
US9361115B2 (en) | 2012-06-15 | 2016-06-07 | International Business Machines Corporation | Saving/restoring selected registers in transactional processing |
US20130339680A1 (en) | 2012-06-15 | 2013-12-19 | International Business Machines Corporation | Nontransactional store instruction |
US9317460B2 (en) | 2012-06-15 | 2016-04-19 | International Business Machines Corporation | Program event recording within a transactional environment |
US9384004B2 (en) | 2012-06-15 | 2016-07-05 | International Business Machines Corporation | Randomized testing within transactional execution |
US9448796B2 (en) | 2012-06-15 | 2016-09-20 | International Business Machines Corporation | Restricted instructions in transactional execution |
US9348642B2 (en) | 2012-06-15 | 2016-05-24 | International Business Machines Corporation | Transaction begin/end instructions |
US10437602B2 (en) | 2012-06-15 | 2019-10-08 | International Business Machines Corporation | Program interruption filtering in transactional execution |
US8682877B2 (en) | 2012-06-15 | 2014-03-25 | International Business Machines Corporation | Constrained transaction execution |
US9436477B2 (en) | 2012-06-15 | 2016-09-06 | International Business Machines Corporation | Transaction abort instruction |
CN110535790B (zh) * | 2019-08-23 | 2022-03-18 | 天津芯海创科技有限公司 | 基于semaphore的交换芯片异常报文处理方法 |
US20240004696A1 (en) * | 2022-06-29 | 2024-01-04 | Red Hat, Inc. | Synchronizing concurrent tasks using interrupt deferral instructions |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0467229A (ja) * | 1990-07-06 | 1992-03-03 | Hitachi Ltd | マイクロプロセッサおよびメモリシステム |
JPH0474229A (ja) * | 1990-07-17 | 1992-03-09 | Toshiba Corp | 情報処理装置 |
JPH05143322A (ja) * | 1991-11-15 | 1993-06-11 | Sanyo Electric Co Ltd | マイクロコンピユータ |
Family Cites Families (17)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5440049A (en) * | 1977-09-06 | 1979-03-28 | Toshiba Corp | Information process system |
US4236204A (en) | 1978-03-13 | 1980-11-25 | Motorola, Inc. | Instruction set modifier register |
US4435766A (en) * | 1981-06-16 | 1984-03-06 | International Business Machines Corporation | Nested resource control using locking and unlocking routines with use counter for plural processes |
CN1004234B (zh) * | 1985-04-01 | 1989-05-17 | 坦德姆计算机有限公司 | 增强的中央处理器(cpu)微转移结构 |
US4764893A (en) * | 1985-04-26 | 1988-08-16 | International Business Machines Corporation | Noise-immune interrupt level sharing |
CN1009399B (zh) * | 1987-06-02 | 1990-08-29 | 德国Itt工业股份公司 | 中央处理器 |
US5499356A (en) * | 1989-12-29 | 1996-03-12 | Cray Research, Inc. | Method and apparatus for a multiprocessor resource lockout instruction |
JPH03210649A (ja) * | 1990-01-12 | 1991-09-13 | Fujitsu Ltd | マイクロコンピュータおよびそのバスサイクル制御方法 |
JP2665813B2 (ja) * | 1990-02-23 | 1997-10-22 | 三菱電機株式会社 | 記憶制御装置 |
JPH05508496A (ja) * | 1990-06-11 | 1993-11-25 | クレイ、リサーチ、インコーポレーテッド | 命令をロードおよびフラグする方法および装置 |
JPH04306735A (ja) * | 1991-04-04 | 1992-10-29 | Toshiba Corp | 非同期割込み禁止機構 |
US5301312A (en) * | 1991-08-21 | 1994-04-05 | International Business Machines Corporation | Method and system for utilizing benign fault occurrence to measure interrupt-blocking times |
US5283870A (en) * | 1991-10-04 | 1994-02-01 | Bull Hn Information Systems Inc. | Method and apparatus for avoiding processor deadly embrace in a multiprocessor system |
EP0555680B1 (en) * | 1992-02-14 | 1999-10-13 | Motorola, Inc. | A method and apparatus for determining instruction execution ordering in a data processing system |
US5590380A (en) * | 1992-04-22 | 1996-12-31 | Kabushiki Kaisha Toshiba | Multiprocessor system with processor arbitration and priority level setting by the selected processor |
JPH06110846A (ja) * | 1992-09-25 | 1994-04-22 | Fujitsu Ltd | 排他制御方式 |
US5768619A (en) * | 1996-02-16 | 1998-06-16 | Advanced Micro Devices, Inc. | Method and system for enabling and disabling functions in a peripheral device for a processor system |
-
1997
- 1997-11-03 US US08/963,321 patent/US6000029A/en not_active Expired - Lifetime
-
1998
- 1998-10-14 TW TW087117065A patent/TW494363B/zh not_active IP Right Cessation
- 1998-10-26 EP EP98120220A patent/EP0913767B1/en not_active Expired - Lifetime
- 1998-10-26 DE DE69810064T patent/DE69810064T2/de not_active Expired - Fee Related
- 1998-10-30 JP JP31026898A patent/JP4883824B2/ja not_active Expired - Fee Related
- 1998-10-30 SG SG200106112A patent/SG101487A1/en unknown
- 1998-10-30 SG SG1998004357A patent/SG71861A1/en unknown
- 1998-11-02 CN CN98121455A patent/CN1098487C/zh not_active Expired - Lifetime
- 1998-11-03 KR KR1019980046900A patent/KR100588790B1/ko not_active IP Right Cessation
-
1999
- 1999-10-22 US US09/425,469 patent/US6237089B1/en not_active Expired - Lifetime
- 1999-11-12 HK HK99105223A patent/HK1020218A1/xx not_active IP Right Cessation
-
2009
- 2009-02-18 JP JP2009035190A patent/JP4750865B2/ja not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0467229A (ja) * | 1990-07-06 | 1992-03-03 | Hitachi Ltd | マイクロプロセッサおよびメモリシステム |
JPH0474229A (ja) * | 1990-07-17 | 1992-03-09 | Toshiba Corp | 情報処理装置 |
JPH05143322A (ja) * | 1991-11-15 | 1993-06-11 | Sanyo Electric Co Ltd | マイクロコンピユータ |
Also Published As
Publication number | Publication date |
---|---|
US6000029A (en) | 1999-12-07 |
JPH11219302A (ja) | 1999-08-10 |
US6237089B1 (en) | 2001-05-22 |
CN1098487C (zh) | 2003-01-08 |
TW494363B (en) | 2002-07-11 |
JP4883824B2 (ja) | 2012-02-22 |
DE69810064D1 (de) | 2003-01-23 |
EP0913767A2 (en) | 1999-05-06 |
JP4750865B2 (ja) | 2011-08-17 |
KR19990044957A (ko) | 1999-06-25 |
EP0913767B1 (en) | 2002-12-11 |
EP0913767A3 (en) | 2000-01-26 |
SG101487A1 (en) | 2004-01-30 |
KR100588790B1 (ko) | 2006-10-04 |
SG71861A1 (en) | 2000-04-18 |
DE69810064T2 (de) | 2003-04-17 |
HK1020218A1 (en) | 2000-03-31 |
CN1216375A (zh) | 1999-05-12 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4750865B2 (ja) | デ―タ・プロセッサにおいて後続の命令処理に影響を及ぼす方法および装置 | |
US7020871B2 (en) | Breakpoint method for parallel hardware threads in multithreaded processor | |
US6671827B2 (en) | Journaling for parallel hardware threads in multithreaded processor | |
US5053949A (en) | No-chip debug peripheral which uses externally provided instructions to control a core processing unit | |
US5440747A (en) | Data processor with control logic for storing operation mode status and associated method | |
US5349667A (en) | Interrupt control system for microprocessor for handling a plurality of maskable interrupt requests | |
EP0423906B1 (en) | Method of and apparatus for nullifying an instruction | |
US4200912A (en) | Processor interrupt system | |
US8135975B2 (en) | Software programmable timing architecture | |
JPH10187642A (ja) | マイクロプロセッサ及びマルチプロセッサシステム | |
KR970003321B1 (ko) | 코프로세서 지정 시스템 | |
JPH10505444A (ja) | 処理システム、プロセッサ、命令ストリーム格納用メモリ及びコンパイラ | |
US5410721A (en) | System and method for incrementing a program counter | |
US6968410B2 (en) | Multi-threaded processing of system management interrupts | |
US6842812B1 (en) | Event handling | |
JPS62115542A (ja) | 情報処理装置 | |
JP2009193378A (ja) | ベクトル処理装置 | |
EP0385136B1 (en) | Microprocessor cooperating with a coprocessor | |
US5208915A (en) | Apparatus for the microprogram control of information transfer and a method for operating the same | |
JPH08255476A (ja) | データ処理システムにおけるメモリ拡張スタック装置および方法 | |
KR100188374B1 (ko) | 연산처리장치 | |
JP2006221664A (ja) | Riscマイクロプロセッサ優先ベクトル割り込みシステム | |
JP3493768B2 (ja) | データ処理装置 | |
JP2002278753A (ja) | データ処理システム | |
JPH05100853A (ja) | デバツグサポート機能付データ処理装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090218 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20091006 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20091218 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20100608 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20100922 |
|
A911 | Transfer of reconsideration by examiner before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20101015 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110104 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110330 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20110426 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20110519 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20140527 Year of fee payment: 3 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |