JP2009075973A - 電子機器及び当該電子機器の電力制御方法 - Google Patents
電子機器及び当該電子機器の電力制御方法 Download PDFInfo
- Publication number
- JP2009075973A JP2009075973A JP2007246094A JP2007246094A JP2009075973A JP 2009075973 A JP2009075973 A JP 2009075973A JP 2007246094 A JP2007246094 A JP 2007246094A JP 2007246094 A JP2007246094 A JP 2007246094A JP 2009075973 A JP2009075973 A JP 2009075973A
- Authority
- JP
- Japan
- Prior art keywords
- processing
- block
- data
- clock
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3206—Monitoring of events, devices or parameters that trigger a change in power modality
- G06F1/3228—Monitoring task completion, e.g. by use of idle timers, stop commands or wait commands
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/32—Means for saving power
- G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
- G06F1/3234—Power saving characterised by the action undertaken
- G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/00885—Power supply means, e.g. arrangements for the control of power supply to the apparatus or components thereof
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/00885—Power supply means, e.g. arrangements for the control of power supply to the apparatus or components thereof
- H04N1/00888—Control thereof
- H04N1/00891—Switching on or off, e.g. for saving power when not in use
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/00885—Power supply means, e.g. arrangements for the control of power supply to the apparatus or components thereof
- H04N1/00888—Control thereof
- H04N1/00896—Control thereof using a low-power mode, e.g. standby
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N2201/00—Indexing scheme relating to scanning, transmission or reproduction of documents or the like, and to details thereof
- H04N2201/0077—Types of the still picture apparatus
- H04N2201/0094—Multifunctional device, i.e. a device capable of all of reading, reproducing, copying, facsimile transception, file transception
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- Facsimiles In General (AREA)
- Accessory Devices And Overall Control Thereof (AREA)
- Power Sources (AREA)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007246094A JP2009075973A (ja) | 2007-09-21 | 2007-09-21 | 電子機器及び当該電子機器の電力制御方法 |
| US12/200,751 US20090083559A1 (en) | 2007-09-21 | 2008-08-28 | Electronic device and method of controlling power thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2007246094A JP2009075973A (ja) | 2007-09-21 | 2007-09-21 | 電子機器及び当該電子機器の電力制御方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2009075973A true JP2009075973A (ja) | 2009-04-09 |
| JP2009075973A5 JP2009075973A5 (enExample) | 2010-11-04 |
Family
ID=40472990
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2007246094A Pending JP2009075973A (ja) | 2007-09-21 | 2007-09-21 | 電子機器及び当該電子機器の電力制御方法 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US20090083559A1 (enExample) |
| JP (1) | JP2009075973A (enExample) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011036945A1 (en) * | 2009-09-24 | 2011-03-31 | Canon Kabushiki Kaisha | Image processing apparatus and control method therein |
| JP2013146053A (ja) * | 2011-12-16 | 2013-07-25 | Ricoh Co Ltd | 画像処理装置、画像処理回路及び画像処理装置の制御方法 |
| US8799699B2 (en) | 2010-06-21 | 2014-08-05 | Fujitsu Semiconductor Limited | Data processing system |
| US9762765B2 (en) | 2013-08-20 | 2017-09-12 | Konica Minolta, Inc. | Image forming apparatus wherein clock frequency is determined by processing load |
Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20090061515A (ko) * | 2007-12-11 | 2009-06-16 | 한국전자통신연구원 | Gals 시스템용 접속회로 및 그의 동작방법 |
| JP7022605B2 (ja) | 2018-01-26 | 2022-02-18 | キヤノン株式会社 | 情報処理装置とその制御方法、及びプログラム |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0954753A (ja) * | 1995-08-11 | 1997-02-25 | Toshiba Corp | 計算機バスシステム |
| JPH10240371A (ja) * | 1997-02-27 | 1998-09-11 | Mitsubishi Electric Corp | ディジタル信号処理プロセッサのクロック速度制御装置 |
| JPH1153049A (ja) * | 1997-08-05 | 1999-02-26 | Toshiba Corp | コンピュータシステム |
| JP2000029779A (ja) * | 1998-07-09 | 2000-01-28 | Ricoh Co Ltd | 画像処理装置 |
| JP2001005552A (ja) * | 1999-06-18 | 2001-01-12 | Nec Eng Ltd | 消費電力低減回路 |
| JP2002055743A (ja) * | 2000-08-08 | 2002-02-20 | Digital Electronics Corp | 電子回路ブロック |
| JP2004274099A (ja) * | 2003-03-05 | 2004-09-30 | Nec Corp | パケット処理回路 |
| JP2004326222A (ja) * | 2003-04-22 | 2004-11-18 | Renesas Technology Corp | データ処理システム |
| JP2007128518A (ja) * | 2005-11-03 | 2007-05-24 | Samsung Electronics Co Ltd | デジタルロジックプロセッシング装置とそれに供給されるクロック信号のゲーティング方法、及びそれらを含むシステムオンチップとそれを用いたストリーミングプロセッシングシステム |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5227790A (en) * | 1991-01-31 | 1993-07-13 | Oki Electric Industry Co., Ltd. | Cascaded drive units having low power consumption |
| US5710910A (en) * | 1994-09-30 | 1998-01-20 | University Of Washington | Asynchronous self-tuning clock domains and method for transferring data among domains |
| US5815006A (en) * | 1996-04-25 | 1998-09-29 | Industrial Technology Research Institute | Single transition per evaluation phase latch circuit for pipelined true-single-phase synchronous logic circuit |
| US6166564A (en) * | 1999-07-09 | 2000-12-26 | Intel Corporation | Control circuit for clock enable staging |
| US6853929B2 (en) * | 2003-05-01 | 2005-02-08 | Via Technologies, Inc. | Pipeline control for power management |
| TWI259659B (en) * | 2005-05-13 | 2006-08-01 | Ind Tech Res Inst | Pipelined datapath with dynamically reconfigurable pipeline stages |
| US7660183B2 (en) * | 2005-08-01 | 2010-02-09 | Rambus Inc. | Low power memory device |
| US8291256B2 (en) * | 2006-02-03 | 2012-10-16 | National University Corporation Kobe University | Clock stop and restart control to pipelined arithmetic processing units processing plurality of macroblock data in image frame per frame processing period |
-
2007
- 2007-09-21 JP JP2007246094A patent/JP2009075973A/ja active Pending
-
2008
- 2008-08-28 US US12/200,751 patent/US20090083559A1/en not_active Abandoned
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0954753A (ja) * | 1995-08-11 | 1997-02-25 | Toshiba Corp | 計算機バスシステム |
| JPH10240371A (ja) * | 1997-02-27 | 1998-09-11 | Mitsubishi Electric Corp | ディジタル信号処理プロセッサのクロック速度制御装置 |
| JPH1153049A (ja) * | 1997-08-05 | 1999-02-26 | Toshiba Corp | コンピュータシステム |
| JP2000029779A (ja) * | 1998-07-09 | 2000-01-28 | Ricoh Co Ltd | 画像処理装置 |
| JP2001005552A (ja) * | 1999-06-18 | 2001-01-12 | Nec Eng Ltd | 消費電力低減回路 |
| JP2002055743A (ja) * | 2000-08-08 | 2002-02-20 | Digital Electronics Corp | 電子回路ブロック |
| JP2004274099A (ja) * | 2003-03-05 | 2004-09-30 | Nec Corp | パケット処理回路 |
| JP2004326222A (ja) * | 2003-04-22 | 2004-11-18 | Renesas Technology Corp | データ処理システム |
| JP2007128518A (ja) * | 2005-11-03 | 2007-05-24 | Samsung Electronics Co Ltd | デジタルロジックプロセッシング装置とそれに供給されるクロック信号のゲーティング方法、及びそれらを含むシステムオンチップとそれを用いたストリーミングプロセッシングシステム |
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011036945A1 (en) * | 2009-09-24 | 2011-03-31 | Canon Kabushiki Kaisha | Image processing apparatus and control method therein |
| JP2011071656A (ja) * | 2009-09-24 | 2011-04-07 | Canon Inc | 画像処理装置及びそのインターフェース制御方法 |
| CN102511159A (zh) * | 2009-09-24 | 2012-06-20 | 佳能株式会社 | 图像处理装置及其控制方法 |
| US8526023B2 (en) | 2009-09-24 | 2013-09-03 | Canon Kabushiki Kaisha | Image processing apparatus and control method image processing apparatus and control method for synchronizing an image data signal with a discrete effective pixel signal and continuous effective pixel signal |
| US8799699B2 (en) | 2010-06-21 | 2014-08-05 | Fujitsu Semiconductor Limited | Data processing system |
| JP2013146053A (ja) * | 2011-12-16 | 2013-07-25 | Ricoh Co Ltd | 画像処理装置、画像処理回路及び画像処理装置の制御方法 |
| US9762765B2 (en) | 2013-08-20 | 2017-09-12 | Konica Minolta, Inc. | Image forming apparatus wherein clock frequency is determined by processing load |
Also Published As
| Publication number | Publication date |
|---|---|
| US20090083559A1 (en) | 2009-03-26 |
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