JP2008511141A - 半導体被処理物を薄肉化するためのシステム - Google Patents

半導体被処理物を薄肉化するためのシステム Download PDF

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Publication number
JP2008511141A
JP2008511141A JP2007528050A JP2007528050A JP2008511141A JP 2008511141 A JP2008511141 A JP 2008511141A JP 2007528050 A JP2007528050 A JP 2007528050A JP 2007528050 A JP2007528050 A JP 2007528050A JP 2008511141 A JP2008511141 A JP 2008511141A
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JP
Japan
Prior art keywords
processing chamber
workpiece
main body
processed
back surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007528050A
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English (en)
Japanese (ja)
Inventor
ケルト エル． ドールチェク，
レイモン エフ． トムスン，
Original Assignee
セミツール， インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/923,436 external-priority patent/US20060046499A1/en
Priority claimed from US10/923,363 external-priority patent/US7288489B2/en
Priority claimed from US10/922,762 external-priority patent/US20060040111A1/en
Priority claimed from US10/923,132 external-priority patent/US7354649B2/en
Application filed by セミツール， インコーポレイテッド filed Critical セミツール， インコーポレイテッド
Publication of JP2008511141A publication Critical patent/JP2008511141A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67126—Apparatus for sealing, encapsulating, glassing, decapsulating or the like
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02035—Shaping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005—Apparatus not specifically provided for elsewhere
    • H01L21/67011—Apparatus for manufacture or treatment
    • H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
    • H01L21/6719—Apparatus for manufacturing or treating in a plurality of work-stations characterized by the construction of the processing chambers, e.g. modular processing chambers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68721—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by edge clamping, e.g. clamping ring
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
JP2007528050A 2004-08-20 2005-08-18 半導体被処理物を薄肉化するためのシステム Pending JP2008511141A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10/923,436 US20060046499A1 (en) 2004-08-20 2004-08-20 Apparatus for use in thinning a semiconductor workpiece
US10/923,363 US7288489B2 (en) 2004-08-20 2004-08-20 Process for thinning a semiconductor workpiece
US10/922,762 US20060040111A1 (en) 2004-08-20 2004-08-20 Process chamber and system for thinning a semiconductor workpiece
US10/923,132 US7354649B2 (en) 2004-08-20 2004-08-20 Semiconductor workpiece
PCT/US2005/029598 WO2006023753A2 (en) 2004-08-20 2005-08-18 System for thinning a semiconductor workpiece

Publications (1)

Publication Number Publication Date
JP2008511141A true JP2008511141A (ja) 2008-04-10

Family

ID=35968220

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007528050A Pending JP2008511141A (ja) 2004-08-20 2005-08-18 半導体被処理物を薄肉化するためのシステム

Country Status (8)

Country Link
EP (1) EP1799446A4 (de)
JP (1) JP2008511141A (de)
KR (2) KR20070051337A (de)
CN (1) CN102790000B (de)
AT (1) AT10874U1 (de)
DE (1) DE212005000047U1 (de)
TW (2) TWI502620B (de)
WO (1) WO2006023753A2 (de)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011040753A (ja) * 2009-08-12 2011-02-24 Siltronic Ag ポリッシングされた半導体ウェハを製造する方法
JP2020096101A (ja) * 2018-12-13 2020-06-18 株式会社荏原製作所 基板ホルダに使用するシール

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG147330A1 (en) * 2007-04-19 2008-11-28 Micron Technology Inc Semiconductor workpiece carriers and methods for processing semiconductor workpieces
US7989318B2 (en) * 2008-12-08 2011-08-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method for stacking semiconductor dies
NL2014625B1 (en) * 2015-04-13 2017-01-06 Suss Microtec Lithography Gmbh Wafer treating device and sealing ring for a wafer treating device.
DE102019110402A1 (de) 2018-05-25 2019-11-28 Infineon Technologies Ag Ein Verfahren zum Bearbeiten eines Halbleiterwafers, eine Halbleiter-Verbundstruktur und eine Stützstruktur für einen Halbleiterwafer

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003243356A (ja) * 2001-12-12 2003-08-29 Denso Corp 半導体装置の製造方法

Family Cites Families (18)

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NL162254B (nl) * 1968-11-29 1979-11-15 Philips Nv Halfgeleiderinrichting voor het omzetten van mechanische spanningen in elektrische signalen en werkwijze voor het vervaardigen daarvan.
US4266334A (en) * 1979-07-25 1981-05-12 Rca Corporation Manufacture of thinned substrate imagers
US5011782A (en) * 1989-03-31 1991-04-30 Electric Power Research Institute Method of making passivated antireflective coating for photovoltaic cell
JPH0684731A (ja) * 1992-09-07 1994-03-25 Nec Kyushu Ltd 半導体ウェハー
JP3161515B2 (ja) * 1997-10-08 2001-04-25 三菱マテリアル株式会社 半導体装置の製造方法
US6613681B1 (en) * 1998-08-28 2003-09-02 Micron Technology, Inc. Method of removing etch residues
US6248222B1 (en) * 1998-09-08 2001-06-19 Acm Research, Inc. Methods and apparatus for holding and positioning semiconductor workpieces during electropolishing and/or electroplating of the workpieces
US6162702A (en) * 1999-06-17 2000-12-19 Intersil Corporation Self-supported ultra thin silicon wafer process
US6402843B1 (en) * 1999-12-07 2002-06-11 Trusi Technologies, Llc Non-contact workpiece holder
US6334453B1 (en) * 2000-02-14 2002-01-01 Semitool, Inc. Seal configuration for use with a motor drive assembly in a microelectronic workpiece processing system
TW525221B (en) * 2000-12-04 2003-03-21 Ebara Corp Substrate processing method
JP3899871B2 (ja) * 2001-08-23 2007-03-28 株式会社デンソー エッチング方法及びエッチング装置並びに薄膜センサの製造方法
DE10256985B4 (de) * 2001-12-12 2013-01-10 Denso Corporation Verfahren zur Herstellung eines Leistungshalbleiterbauelements
JP4185704B2 (ja) * 2002-05-15 2008-11-26 株式会社ルネサステクノロジ 半導体装置の製造方法
US20040074808A1 (en) * 2002-07-05 2004-04-22 Entegris, Inc. Fire retardant wafer carrier
DE10260233B4 (de) * 2002-12-20 2016-05-19 Infineon Technologies Ag Verfahren zum Befestigen eines Werkstücks mit einem Feststoff an einem Werkstückträger und Werkstückträger
US6940181B2 (en) * 2003-10-21 2005-09-06 Micron Technology, Inc. Thinned, strengthened semiconductor substrates and packages including same
US20050239295A1 (en) * 2004-04-27 2005-10-27 Wang Pei-L Chemical treatment of material surfaces

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003243356A (ja) * 2001-12-12 2003-08-29 Denso Corp 半導体装置の製造方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011040753A (ja) * 2009-08-12 2011-02-24 Siltronic Ag ポリッシングされた半導体ウェハを製造する方法
JP2020096101A (ja) * 2018-12-13 2020-06-18 株式会社荏原製作所 基板ホルダに使用するシール
CN111321449A (zh) * 2018-12-13 2020-06-23 株式会社荏原制作所 用于基板保持件的密封件
JP7136679B2 (ja) 2018-12-13 2022-09-13 株式会社荏原製作所 基板ホルダに使用するシール

Also Published As

Publication number Publication date
AT10874U1 (de) 2009-11-15
KR20070051337A (ko) 2007-05-17
KR20070048793A (ko) 2007-05-09
TWI463527B (zh) 2014-12-01
CN102790000B (zh) 2016-06-29
TW200614329A (en) 2006-05-01
TW201230144A (en) 2012-07-16
TWI502620B (zh) 2015-10-01
EP1799446A2 (de) 2007-06-27
DE212005000047U1 (de) 2007-08-02
EP1799446A4 (de) 2010-03-03
CN102790000A (zh) 2012-11-21
WO2006023753A2 (en) 2006-03-02
WO2006023753A3 (en) 2009-06-25

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