JP2008509562A5 - - Google Patents

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Publication number
JP2008509562A5
JP2008509562A5 JP2007524976A JP2007524976A JP2008509562A5 JP 2008509562 A5 JP2008509562 A5 JP 2008509562A5 JP 2007524976 A JP2007524976 A JP 2007524976A JP 2007524976 A JP2007524976 A JP 2007524976A JP 2008509562 A5 JP2008509562 A5 JP 2008509562A5
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JP
Japan
Prior art keywords
layer
sige
substrate
alloy
deposition step
Prior art date
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Application number
JP2007524976A
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English (en)
Japanese (ja)
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JP5039920B2 (ja
JP2008509562A (ja
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Publication date
Priority claimed from US10/710,826 external-priority patent/US7247546B2/en
Application filed filed Critical
Publication of JP2008509562A publication Critical patent/JP2008509562A/ja
Publication of JP2008509562A5 publication Critical patent/JP2008509562A5/ja
Application granted granted Critical
Publication of JP5039920B2 publication Critical patent/JP5039920B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2007524976A 2004-08-05 2005-08-04 改善された熱伝導率をもつ歪みシリコン材料を形成するための方法 Expired - Fee Related JP5039920B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/710,826 2004-08-05
US10/710,826 US7247546B2 (en) 2004-08-05 2004-08-05 Method of forming strained silicon materials with improved thermal conductivity
PCT/US2005/027691 WO2006017640A1 (en) 2004-08-05 2005-08-04 Method of forming strained silicon materials with improved thermal conductivity

Publications (3)

Publication Number Publication Date
JP2008509562A JP2008509562A (ja) 2008-03-27
JP2008509562A5 true JP2008509562A5 (enExample) 2008-07-17
JP5039920B2 JP5039920B2 (ja) 2012-10-03

Family

ID=35756559

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007524976A Expired - Fee Related JP5039920B2 (ja) 2004-08-05 2005-08-04 改善された熱伝導率をもつ歪みシリコン材料を形成するための方法

Country Status (7)

Country Link
US (1) US7247546B2 (enExample)
EP (1) EP1790003A4 (enExample)
JP (1) JP5039920B2 (enExample)
KR (1) KR101063698B1 (enExample)
CN (1) CN1993819B (enExample)
TW (1) TWI377603B (enExample)
WO (1) WO2006017640A1 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7586116B2 (en) 2003-06-26 2009-09-08 Mears Technologies, Inc. Semiconductor device having a semiconductor-on-insulator configuration and a superlattice
CA2650489A1 (en) * 2006-05-05 2007-11-15 Mears Technologies, Inc. Semiconductor device having a semiconductor-on-insulator configuration and a superlattice and associated methods
JP5004072B2 (ja) * 2006-05-17 2012-08-22 学校法人慶應義塾 イオン照射効果評価方法、プロセスシミュレータ及びデバイスシミュレータ
US7442599B2 (en) * 2006-09-15 2008-10-28 Sharp Laboratories Of America, Inc. Silicon/germanium superlattice thermal sensor
DE102007002744B4 (de) * 2007-01-18 2011-11-17 Infineon Technologies Austria Ag Halbleiterbauelement
US20090166770A1 (en) * 2008-01-02 2009-07-02 International Business Machines Corporation Method of fabricating gate electrode for gate of mosfet and structure thereof
TWI582836B (zh) 2010-02-26 2017-05-11 恩特葛瑞斯股份有限公司 用以增進離子植入系統中之離子源的壽命及性能之方法與設備
US8779383B2 (en) * 2010-02-26 2014-07-15 Advanced Technology Materials, Inc. Enriched silicon precursor compositions and apparatus and processes for utilizing same
CN102254954A (zh) * 2011-08-19 2011-11-23 中国科学院上海微系统与信息技术研究所 含有数字合金位错隔离层的大失配外延缓冲层结构及制备
CN102347267B (zh) * 2011-10-24 2013-06-19 中国科学院上海微系统与信息技术研究所 一种利用超晶格结构材料制备的高质量sgoi及其制备方法
US8518807B1 (en) * 2012-06-22 2013-08-27 International Business Machines Corporation Radiation hardened SOI structure and method of making same
US20140220771A1 (en) * 2013-02-05 2014-08-07 National Tsing Hua University Worm memory device and process of manufacturing the same
US8993457B1 (en) * 2014-02-06 2015-03-31 Cypress Semiconductor Corporation Method of fabricating a charge-trapping gate stack using a CMOS process flow
US10168459B2 (en) * 2016-11-30 2019-01-01 Viavi Solutions Inc. Silicon-germanium based optical filter
US10322873B2 (en) * 2016-12-28 2019-06-18 Omachron Intellectual Property Inc. Dust and allergen control for surface cleaning apparatus
CN109950153B (zh) * 2019-03-08 2022-03-04 中国科学院微电子研究所 半导体结构与其制作方法
JP7422955B1 (ja) * 2023-04-11 2024-01-26 三菱電機株式会社 半導体受光素子及び半導体受光素子の製造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0319211A (ja) * 1989-06-15 1991-01-28 Fujitsu Ltd 化学気相成長装置
JPH04335519A (ja) * 1991-05-13 1992-11-24 Fujitsu Ltd 半導体結晶の製造方法
CA2062134C (en) * 1991-05-31 1997-03-25 Ibm Low Defect Densiry/Arbitrary Lattice Constant Heteroepitaxial Layers
KR0168348B1 (ko) * 1995-05-11 1999-02-01 김광호 Soi 기판의 제조방법
DE19714054A1 (de) * 1997-04-05 1998-10-08 Daimler Benz Ag SiGe-Photodetektor mit hohem Wirkungsgrad
US6154475A (en) * 1997-12-04 2000-11-28 The United States Of America As Represented By The Secretary Of The Air Force Silicon-based strain-symmetrized GE-SI quantum lasers
US6940089B2 (en) * 2001-04-04 2005-09-06 Massachusetts Institute Of Technology Semiconductor device structure
US6867459B2 (en) * 2001-07-05 2005-03-15 Isonics Corporation Isotopically pure silicon-on-insulator wafers and method of making same
JP2004039735A (ja) * 2002-07-01 2004-02-05 Fujitsu Ltd 半導体基板及びその製造方法
US6841457B2 (en) * 2002-07-16 2005-01-11 International Business Machines Corporation Use of hydrogen implantation to improve material properties of silicon-germanium-on-insulator material made by thermal diffusion
EP1424736B1 (en) * 2002-11-29 2007-06-20 Max-Planck-Gesellschaft zur Förderung der Wissenschaften e.V. A semiconductor structure for use in the near infrared region and a method of manufacturing this semiconductor structure

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