JP2008227310A - 2種類の配線板を有するハイブリッド基板、それを有する電子装置、及び、ハイブリッド基板の製造方法 - Google Patents
2種類の配線板を有するハイブリッド基板、それを有する電子装置、及び、ハイブリッド基板の製造方法 Download PDFInfo
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- JP2008227310A JP2008227310A JP2007065843A JP2007065843A JP2008227310A JP 2008227310 A JP2008227310 A JP 2008227310A JP 2007065843 A JP2007065843 A JP 2007065843A JP 2007065843 A JP2007065843 A JP 2007065843A JP 2008227310 A JP2008227310 A JP 2008227310A
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/142—Arrangements of planar printed circuit boards in the same plane, e.g. auxiliary printed circuit insert mounted in a main printed circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/14—Structural association of two or more printed circuits
- H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/183—Components mounted in and supported by recessed areas of the printed circuit board
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/01—Tools for processing; Objects used during processing
- H05K2203/0191—Using tape or non-metallic foil in a process, e.g. during filling of a hole with conductive paste
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/0425—Solder powder or solder coated metal powder
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/06—Lamination
- H05K2203/063—Lamination of preperforated insulating layer
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
- Y10T29/49144—Assembling to base an electrical component, e.g., capacitor, etc. by metal fusion
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49147—Assembling terminal to base
- Y10T29/49149—Assembling terminal to base by metal fusion bonding
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
Abstract
【解決手段】パッド116を有するパッケージ基板110と、パッケージ基板110が嵌め込まれると共にフットプリント158を備えた凹部154が形成され、パッケージ基板110と同一平面を形成するプリント基板150と、パッド116の周りに配置された絶縁性接着剤130と、パッド116とフットプリント158を接合すると共に電気的に接続する導電性接着剤140とを有することを特徴とするハイブリッド基板100を提供する。
【選択図】 図2
Description
(付記2) 前記導電性接着剤は、第1の融点を有するフィラーとしての金属粒子の表面に、前記第1の融点と前記熱硬化接着剤の熱硬化温度よりも低い第2の融点を有する低温ハンダでメッキをしたものを含有した熱硬化接着剤であることを特徴とする付記1記載のハイブリッド基板。(2)
(付記3) 前記同一平面を構成する前記第1の配線板の第1の面には前記第1の端子に電気的に接続された第1の電子部品が搭載され、前記同一平面を構成する前記第2の配線板の第2の面には第2の電子部品が搭載されていることを特徴とする付記1又は2記載のハイブリッド基板。(3)
(付記4) 2種類の配線板を有するハイブリッド基板であって、第1の端子を有する第1の配線板と、前記第1の配線板が嵌め込まれると共に第2の端子を備えた凹部が形成された第2の配線板と、前記第1の端子の周りに配置された絶縁性接着剤と、前記第1の端子と前記第2の端子を接合すると共に前記第1の端子と前記第2の端子を電気的に接続する導電性接着剤とを有することを特徴とするハイブリッド基板。
(付記6) 2種類の配線板を有するハイブリッド基板の製造方法は、第1の端子を有する第1の配線板と第2の端子を有する第2の配線板の一方の端子が露出するように絶縁性接着剤を前記一方の端子の周りに仮付けするステップと、導電性接着剤を前記一方の端子の上に塗布するステップと、前記第1の配線板を、前記第2の端子を備えた凹部を有する前記第2の配線板の前記凹部に前記第1の端子と前記第2の端子が前記導電性接着剤を介して接触するようにして嵌め込むステップと、前記第2の配線板と前記第1の配線板が同一平面を形成するように前記第1の配線板を前記第2の配線板に対して加圧及び加熱するステップとを有することを特徴とする方法。(5)
(付記7) 前記導電性接着剤は、第1の融点を有するフィラーとしての金属粒子の表面に、前記第1の融点と前記熱硬化接着剤の熱硬化温度よりも低い第2の融点を有する低温ハンダでメッキをしたものを含有した熱硬化接着剤であることを特徴とする付記6記載の方法。
110 パッケージ基板
112 表面
114 裏面
116 パッド
120 LSI
122 ハンダバンプ
124 アンダーフィル
126 電子部品
130 絶縁性接着剤
140 導電性接着剤
143 金属粒子
144 低温ハンダ
150 プリント基板
154 凹部
158 フットプリント
160 電子部品
200 サーバー(電子装置)
Claims (5)
- 2種類の配線板を有するハイブリッド基板であって、
第1の端子を有する第1の配線板と、
前記第1の配線板が嵌め込まれると共に第2の端子を備えた凹部が形成され、前記第1の配線板と同一平面を形成する第2の配線板と、
前記第1の端子の周りに配置された絶縁性接着剤と、
前記第1の端子と前記第2の端子を接合すると共に前記第1の端子と前記第2の端子を電気的に接続する導電性接着剤とを有することを特徴とするハイブリッド基板。 - 前記導電性接着剤は、第1の融点を有するフィラーとしての金属粒子の表面に、前記第1の融点と前記熱硬化接着剤の熱硬化温度よりも低い第2の融点を有する低温ハンダでメッキをしたものを含有した熱硬化接着剤であることを特徴とする請求項1記載のハイブリッド基板。
- 前記同一平面を構成する前記第1の配線板の第1の面には前記第1の端子に電気的に接続された第1の電子部品が搭載され、前記同一平面を構成する前記第2の配線板の第2の面には第2の電子部品が搭載されていることを特徴とする請求項1又は2記載のハイブリッド基板。
- 請求項1乃至3のうちいずれか一項記載のハイブリッド基板を有することを特徴とする電子装置。
- 2種類の配線板を有するハイブリッド基板の製造方法であって、
第1の端子を有する第1の配線板と第2の端子を有する第2の配線板の一方の端子が露出するように絶縁性接着剤を前記一方の端子の周りに仮付けするステップと、
導電性接着剤を前記一方の端子の上に塗布するステップと、
前記第1の配線板を、前記第2の端子を備えた凹部を有する前記第2の配線板の前記凹部に前記第1の端子と前記第2の端子が前記導電性接着剤を介して接触するようにして嵌め込むステップと、
前記第2の配線板と前記第1の配線板が同一平面を形成するように前記第1の配線板を前記第2の配線板に対して加圧及び加熱するステップとを有することを特徴とする方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007065843A JP5061668B2 (ja) | 2007-03-14 | 2007-03-14 | 2種類の配線板を有するハイブリッド基板、それを有する電子装置、及び、ハイブリッド基板の製造方法 |
US12/046,961 US8061022B2 (en) | 2007-03-14 | 2008-03-12 | Method for manufacturing hybrid printed circuit board |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007065843A JP5061668B2 (ja) | 2007-03-14 | 2007-03-14 | 2種類の配線板を有するハイブリッド基板、それを有する電子装置、及び、ハイブリッド基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008227310A true JP2008227310A (ja) | 2008-09-25 |
JP5061668B2 JP5061668B2 (ja) | 2012-10-31 |
Family
ID=39761200
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Application Number | Title | Priority Date | Filing Date |
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JP2007065843A Expired - Fee Related JP5061668B2 (ja) | 2007-03-14 | 2007-03-14 | 2種類の配線板を有するハイブリッド基板、それを有する電子装置、及び、ハイブリッド基板の製造方法 |
Country Status (2)
Country | Link |
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US (1) | US8061022B2 (ja) |
JP (1) | JP5061668B2 (ja) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8716839B2 (en) | 2012-06-21 | 2014-05-06 | Fujitsu Limited | Semiconductor device mounting structure, method of manufacturing the same, and electronic apparatus |
CN109951953A (zh) * | 2019-04-22 | 2019-06-28 | 广州钰芯智能科技研究院有限公司 | 一种陶瓷基板与高分子复合基板的制备方法与应用 |
CN110062521A (zh) * | 2019-04-22 | 2019-07-26 | 广州钰芯智能科技研究院有限公司 | 一种陶瓷基板与高分子复合基板用于SiP封装的制备方法与应用 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008031836A1 (de) * | 2008-07-05 | 2010-01-21 | Deutsche Cell Gmbh | Lotkontakt |
US11189537B2 (en) * | 2012-03-21 | 2021-11-30 | Infineon Technologies Ag | Circuit package, an electronic circuit package, and methods for encapsulating an electronic circuit |
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JPS60184268U (ja) * | 1984-05-17 | 1985-12-06 | カシオ計算機株式会社 | 加熱圧着コネクタ |
JPH09147928A (ja) * | 1995-11-21 | 1997-06-06 | Hitachi Chem Co Ltd | 接続部材 |
JPH11317582A (ja) * | 1998-02-16 | 1999-11-16 | Matsushita Electric Ind Co Ltd | 多層配線基板およびその製造方法 |
JP2000165007A (ja) * | 1998-11-27 | 2000-06-16 | Nec Corp | プリント配線板、電子部品及び電子部品の実装方法 |
JP2006199833A (ja) * | 2005-01-20 | 2006-08-03 | Sekisui Chem Co Ltd | 異方性導電接着剤 |
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US5801446A (en) * | 1995-03-28 | 1998-09-01 | Tessera, Inc. | Microelectronic connections with solid core joining units |
US6281446B1 (en) * | 1998-02-16 | 2001-08-28 | Matsushita Electric Industrial Co., Ltd. | Multi-layered circuit board and method of manufacturing the same |
US6140707A (en) * | 1998-05-07 | 2000-10-31 | 3M Innovative Properties Co. | Laminated integrated circuit package |
JP4064570B2 (ja) | 1999-05-18 | 2008-03-19 | 日本特殊陶業株式会社 | 電子部品を搭載した配線基板及び電子部品を搭載した配線基板の製造方法 |
JP2004288834A (ja) | 2003-03-20 | 2004-10-14 | Fujitsu Ltd | 電子部品の実装方法、実装構造及びパッケージ基板 |
JP2005340687A (ja) | 2004-05-31 | 2005-12-08 | Fujitsu Ltd | 積層基板及びその製造方法、かかる積層基板を有する電子機器 |
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2007
- 2007-03-14 JP JP2007065843A patent/JP5061668B2/ja not_active Expired - Fee Related
-
2008
- 2008-03-12 US US12/046,961 patent/US8061022B2/en not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS60184268U (ja) * | 1984-05-17 | 1985-12-06 | カシオ計算機株式会社 | 加熱圧着コネクタ |
JPH09147928A (ja) * | 1995-11-21 | 1997-06-06 | Hitachi Chem Co Ltd | 接続部材 |
JPH11317582A (ja) * | 1998-02-16 | 1999-11-16 | Matsushita Electric Ind Co Ltd | 多層配線基板およびその製造方法 |
JP2000165007A (ja) * | 1998-11-27 | 2000-06-16 | Nec Corp | プリント配線板、電子部品及び電子部品の実装方法 |
JP2006199833A (ja) * | 2005-01-20 | 2006-08-03 | Sekisui Chem Co Ltd | 異方性導電接着剤 |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8716839B2 (en) | 2012-06-21 | 2014-05-06 | Fujitsu Limited | Semiconductor device mounting structure, method of manufacturing the same, and electronic apparatus |
US8866270B2 (en) | 2012-06-21 | 2014-10-21 | Fujitsu Limited | Method of manufacturing semiconductor device mounting structure |
CN109951953A (zh) * | 2019-04-22 | 2019-06-28 | 广州钰芯智能科技研究院有限公司 | 一种陶瓷基板与高分子复合基板的制备方法与应用 |
CN110062521A (zh) * | 2019-04-22 | 2019-07-26 | 广州钰芯智能科技研究院有限公司 | 一种陶瓷基板与高分子复合基板用于SiP封装的制备方法与应用 |
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