JP2008205012A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2008205012A
JP2008205012A JP2007036440A JP2007036440A JP2008205012A JP 2008205012 A JP2008205012 A JP 2008205012A JP 2007036440 A JP2007036440 A JP 2007036440A JP 2007036440 A JP2007036440 A JP 2007036440A JP 2008205012 A JP2008205012 A JP 2008205012A
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JP
Japan
Prior art keywords
film
electrode
semiconductor device
gate insulating
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007036440A
Other languages
English (en)
Japanese (ja)
Inventor
Riichiro Mihashi
理一郎 三橋
Raghu Singanamalla
シンガナマラ ラグー
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Interuniversitair Microelektronica Centrum vzw IMEC
Panasonic Holdings Corp
Original Assignee
Interuniversitair Microelektronica Centrum vzw IMEC
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Interuniversitair Microelektronica Centrum vzw IMEC, Matsushita Electric Industrial Co Ltd filed Critical Interuniversitair Microelektronica Centrum vzw IMEC
Priority to JP2007036440A priority Critical patent/JP2008205012A/ja
Priority to EP07113787A priority patent/EP1959491A3/fr
Priority to US11/896,164 priority patent/US20080197421A1/en
Publication of JP2008205012A publication Critical patent/JP2008205012A/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/82345—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238—Complementary field-effect transistors, e.g. CMOS
    • H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
    • H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/085—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only
    • H01L27/088—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate
    • H01L27/092—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including field-effect components only the components being field-effect transistors with insulated gate complementary MIS field-effect transistors
JP2007036440A 2007-02-16 2007-02-16 半導体装置およびその製造方法 Pending JP2008205012A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007036440A JP2008205012A (ja) 2007-02-16 2007-02-16 半導体装置およびその製造方法
EP07113787A EP1959491A3 (fr) 2007-02-16 2007-08-03 Dispositif semi-conducteur et son procédé de fabrication
US11/896,164 US20080197421A1 (en) 2007-02-16 2007-08-30 Semiconductor device and method for manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007036440A JP2008205012A (ja) 2007-02-16 2007-02-16 半導体装置およびその製造方法

Publications (1)

Publication Number Publication Date
JP2008205012A true JP2008205012A (ja) 2008-09-04

Family

ID=39326221

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007036440A Pending JP2008205012A (ja) 2007-02-16 2007-02-16 半導体装置およびその製造方法

Country Status (3)

Country Link
US (1) US20080197421A1 (fr)
EP (1) EP1959491A3 (fr)
JP (1) JP2008205012A (fr)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009117557A (ja) * 2007-11-05 2009-05-28 Toshiba Corp 相補型半導体装置及びその製造方法
JP2010129880A (ja) * 2008-11-28 2010-06-10 Toshiba Corp 半導体装置及びその製造方法
WO2010116587A1 (fr) * 2009-04-09 2010-10-14 パナソニック株式会社 Dispositif semi-conducteur et son procédé de production
JP2012501093A (ja) * 2008-08-25 2012-01-12 東京エレクトロン株式会社 アルミニウムがドープされた金属炭窒化物ゲート電極の作製方法
WO2012077256A1 (fr) * 2010-12-06 2012-06-14 パナソニック株式会社 Dispositif à semi-conducteur et procédé pour fabriquer celui-ci

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090008725A1 (en) * 2007-07-03 2009-01-08 International Business Machines Corporation Method for deposition of an ultra-thin electropositive metal-containing cap layer
JP4602440B2 (ja) * 2008-06-12 2010-12-22 パナソニック株式会社 半導体装置及びその製造方法
JP2010103130A (ja) * 2008-10-21 2010-05-06 Panasonic Corp 半導体装置及びその製造方法
DE102009047306B4 (de) 2009-11-30 2015-02-12 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verfahren zur Herstellung von Gateelektrodenstrukturen durch getrennte Entfernung von Platzhaltermaterialien unter Anwendung eines Maskierungsschemas vor der Gatestrukturierung
DE102009055435B4 (de) 2009-12-31 2017-11-09 Globalfoundries Dresden Module One Limited Liability Company & Co. Kg Verstärkter Einschluss von Metallgateelektrodenstrukturen mit großem ε durch Verringern der Materialerosion einer dielektrischen Deckschicht beim Erzeugen einer verformungsinduzierenden Halbleiterlegierung
DE102010001406B4 (de) * 2010-01-29 2014-12-11 GLOBALFOUNDRIES Dresden Module One Ltd. Liability Company & Co. KG Austausch-Gate-Verfahren auf der Grundlage eines früh aufgebrachten Austrittsarbeitsmetalls

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11330468A (ja) * 1998-05-20 1999-11-30 Hitachi Ltd 半導体集積回路装置の製造方法および半導体集積回路装置
US6794234B2 (en) * 2002-01-30 2004-09-21 The Regents Of The University Of California Dual work function CMOS gate technology based on metal interdiffusion
US6849509B2 (en) * 2002-12-09 2005-02-01 Intel Corporation Methods of forming a multilayer stack alloy for work function engineering
US7316950B2 (en) * 2003-04-22 2008-01-08 National University Of Singapore Method of fabricating a CMOS device with dual metal gate electrodes
US7338865B2 (en) * 2004-07-23 2008-03-04 Texas Instruments Incorporated Method for manufacturing dual work function gate electrodes through local thickness-limited silicidation
DE102004052581B4 (de) * 2004-10-29 2008-11-20 Advanced Micro Devices, Inc., Sunnyvale Verfahren zur Herstellung einer CMOS-Gatestruktur mit einem vordotierten Halbleitergatematerial
US7229873B2 (en) * 2005-08-10 2007-06-12 Texas Instruments Incorporated Process for manufacturing dual work function metal gates in a microelectronics device

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009117557A (ja) * 2007-11-05 2009-05-28 Toshiba Corp 相補型半導体装置及びその製造方法
JP2012501093A (ja) * 2008-08-25 2012-01-12 東京エレクトロン株式会社 アルミニウムがドープされた金属炭窒化物ゲート電極の作製方法
JP2010129880A (ja) * 2008-11-28 2010-06-10 Toshiba Corp 半導体装置及びその製造方法
WO2010116587A1 (fr) * 2009-04-09 2010-10-14 パナソニック株式会社 Dispositif semi-conducteur et son procédé de production
WO2012077256A1 (fr) * 2010-12-06 2012-06-14 パナソニック株式会社 Dispositif à semi-conducteur et procédé pour fabriquer celui-ci

Also Published As

Publication number Publication date
EP1959491A3 (fr) 2009-08-12
US20080197421A1 (en) 2008-08-21
EP1959491A2 (fr) 2008-08-20

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