JP2008192833A - 半導体装置の製造方法 - Google Patents

半導体装置の製造方法 Download PDF

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Publication number
JP2008192833A
JP2008192833A JP2007025861A JP2007025861A JP2008192833A JP 2008192833 A JP2008192833 A JP 2008192833A JP 2007025861 A JP2007025861 A JP 2007025861A JP 2007025861 A JP2007025861 A JP 2007025861A JP 2008192833 A JP2008192833 A JP 2008192833A
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Japan
Prior art keywords
solder
connection
semiconductor device
bump
semiconductor chip
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Application number
JP2007025861A
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English (en)
Japanese (ja)
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JP2008192833A5 (enExample
Inventor
Takashi Ozawa
隆史 小澤
Seiji Sato
聖二 佐藤
Masao Nakazawa
昌夫 中沢
Miki Imai
三喜 今井
Masatoshi Nakamura
正寿 中村
Katsura Kondo
桂 今藤
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2007025861A priority Critical patent/JP2008192833A/ja
Priority to KR1020080007383A priority patent/KR20080073213A/ko
Priority to US12/021,664 priority patent/US7901997B2/en
Priority to TW097104164A priority patent/TW200836309A/zh
Publication of JP2008192833A publication Critical patent/JP2008192833A/ja
Publication of JP2008192833A5 publication Critical patent/JP2008192833A5/ja
Pending legal-status Critical Current

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    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
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    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
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    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
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    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/3457Solder materials or compositions; Methods of application thereof
    • H05K3/3473Plating of solder
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Wire Bonding (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2007025861A 2007-02-05 2007-02-05 半導体装置の製造方法 Pending JP2008192833A (ja)

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JP2007025861A JP2008192833A (ja) 2007-02-05 2007-02-05 半導体装置の製造方法
KR1020080007383A KR20080073213A (ko) 2007-02-05 2008-01-24 반도체 장치의 제조 방법
US12/021,664 US7901997B2 (en) 2007-02-05 2008-01-29 Method of manufacturing semiconductor device
TW097104164A TW200836309A (en) 2007-02-05 2008-02-04 Method of manufacturing semiconductor device

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012084681A (ja) * 2010-10-12 2012-04-26 Shinko Electric Ind Co Ltd 電子部品装置及びその製造方法と配線基板

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8143096B2 (en) * 2008-08-19 2012-03-27 Stats Chippac Ltd. Integrated circuit package system flip chip
TWI559826B (zh) * 2015-12-14 2016-11-21 財團法人工業技術研究院 接合結構及可撓式裝置

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005217388A (ja) * 2004-01-30 2005-08-11 Phoenix Precision Technology Corp 半導体パッケージ基板のプリ半田構造及びその製法
JP2006100552A (ja) * 2004-09-29 2006-04-13 Rohm Co Ltd 配線基板および半導体装置
JP2007201469A (ja) * 2006-01-23 2007-08-09 Samsung Electro Mech Co Ltd 半導体パッケージ用プリント基板及びその製造方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3121734B2 (ja) 1994-11-18 2001-01-09 新日本製鐵株式会社 半導体装置及び半導体装置バンプ用金属ボール
US20030001286A1 (en) * 2000-01-28 2003-01-02 Ryoichi Kajiwara Semiconductor package and flip chip bonding method therein
JP3829325B2 (ja) * 2002-02-07 2006-10-04 日本電気株式会社 半導体素子およびその製造方法並びに半導体装置の製造方法
US20040084206A1 (en) * 2002-11-06 2004-05-06 I-Chung Tung Fine pad pitch organic circuit board for flip chip joints and board to board solder joints and method
WO2007060812A1 (ja) * 2005-11-22 2007-05-31 Sony Corporation 半導体装置および半導体装置の製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005217388A (ja) * 2004-01-30 2005-08-11 Phoenix Precision Technology Corp 半導体パッケージ基板のプリ半田構造及びその製法
JP2006100552A (ja) * 2004-09-29 2006-04-13 Rohm Co Ltd 配線基板および半導体装置
JP2007201469A (ja) * 2006-01-23 2007-08-09 Samsung Electro Mech Co Ltd 半導体パッケージ用プリント基板及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012084681A (ja) * 2010-10-12 2012-04-26 Shinko Electric Ind Co Ltd 電子部品装置及びその製造方法と配線基板

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