JP2008177384A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2008177384A JP2008177384A JP2007009802A JP2007009802A JP2008177384A JP 2008177384 A JP2008177384 A JP 2008177384A JP 2007009802 A JP2007009802 A JP 2007009802A JP 2007009802 A JP2007009802 A JP 2007009802A JP 2008177384 A JP2008177384 A JP 2008177384A
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- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01013—Aluminum [Al]
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- H01—ELECTRIC ELEMENTS
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H—ELECTRICITY
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- H01L2924/01—Chemical elements
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/049—Nitrides composed of metals from groups of the periodic table
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- H01L2924/04953—TaN
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- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19041—Component type being a capacitor
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- H—ELECTRICITY
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Semiconductor Integrated Circuits (AREA)
- Structure Of Printed Boards (AREA)
Abstract
【解決手段】 電源プレーン11とグランドプレーン12との間に位置する誘電体層13に高誘電正接層13−1を設ける。高誘電正接層は、そのエッジが電源プレーンのエッジとグランドプレーンのエッジとの間位置するように設けられる。高誘電正接層のエッジは、内側に位置するエッジより所定の距離以上離すことが望ましい。
【選択図】図1
Description
11 電源プレーン
12 グランドプレーン
13 誘電体層
13−1 高誘電正接層
13−2,13−3 通常誘電正接層
14,15 ソルダーレジスト
61 半田ボール
62 引き出し線
63 半導体チップ
64 エラストマー
65 Alパッド
71 オーバーシュート
72 アンダーシュート
Claims (6)
- 誘電体層を挟んで互いに対向するよう配置されたグランドプレーン及び電源プレーンを有し、前記グランドプレーンのエッジと前記電源プレーンのエッジとが厚み方向に直交する方向に関して互いにずれている基板を備えた半導体装置において、
前記誘電体層中であって前記厚み方向に直交する方向に関して前記グランドプレーンのエッジと前記電源プレーンのエッジとの間に周囲より高いtanδを持つ高誘電正接層を設け、かつ前記厚み方向に直交する方向に関して外側に位置する当該高誘電正接層のエッジを前記厚み方向に直交する方向に関して前記グランドプレーンのエッジと前記電源プレーンのエッジの間に位置させたことを特徴とする半導体装置。 - 請求項1に記載の半導体装置において、
前記高誘電正接層のエッジを、前記厚み方向に直交する方向に関して内側に位置する前記グランドプレーンのエッジ又は前記電源プレーンのエッジから所定の距離以上離したことを特徴とする半導体装置。 - 請求項2に記載の半導体装置において、
前記所定の距離を、前記誘電体層の厚みをdとして0.8dとしたことを特徴とする半導体装置。 - 請求項2に記載の半導体装置において、
前記所定の距離を、前記高誘電正接層のtanδが大きい程、大きくしたことを特徴とする半導体装置。 - 請求項1乃至4のいずれか一つに記載の半導体装置において、
前記高誘電正接層が、前記厚み方向に関して、当該厚み方向に直交する方向に関して内側に位置するエッジを持つ前記グランドプレーン又は前記電源プレーン寄りに設けられていることを特徴とする半導体装置。 - 請求項1乃至5のいずれか一つに記載の半導体装置において、
高誘電正接層のtanδが0.2以上であることを特徴とする半導体装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007009802A JP4309433B2 (ja) | 2007-01-19 | 2007-01-19 | 半導体装置 |
US12/007,758 US7816768B2 (en) | 2007-01-19 | 2008-01-15 | Semiconductor device including ground and power-supply planes and a dielectric layer between the ground and power-supply planes |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007009802A JP4309433B2 (ja) | 2007-01-19 | 2007-01-19 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2008177384A true JP2008177384A (ja) | 2008-07-31 |
JP4309433B2 JP4309433B2 (ja) | 2009-08-05 |
Family
ID=39640434
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007009802A Active JP4309433B2 (ja) | 2007-01-19 | 2007-01-19 | 半導体装置 |
Country Status (2)
Country | Link |
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US (1) | US7816768B2 (ja) |
JP (1) | JP4309433B2 (ja) |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010219498A (ja) * | 2009-02-20 | 2010-09-30 | Elpida Memory Inc | 半導体装置 |
US8576578B2 (en) | 2011-06-27 | 2013-11-05 | International Business Machines Corporation | Robust power plane configuration in printed circuit boards |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06302760A (ja) * | 1993-04-13 | 1994-10-28 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JPH07335779A (ja) | 1994-06-08 | 1995-12-22 | Fujitsu Ltd | マルチチップモジュール |
JP2000183540A (ja) | 1998-12-17 | 2000-06-30 | Nec Corp | プリント配線基板 |
JP2001111184A (ja) | 1999-10-12 | 2001-04-20 | Murata Mfg Co Ltd | 多層基板およびそれを用いた電子部品およびそれを用いた電子装置 |
JP4004333B2 (ja) | 2001-06-05 | 2007-11-07 | 松下電器産業株式会社 | 半導体モジュール |
US7385286B2 (en) * | 2001-06-05 | 2008-06-10 | Matsushita Electric Industrial Co., Ltd. | Semiconductor module |
US7102876B2 (en) * | 2003-03-05 | 2006-09-05 | Industrial Technology Research Institute | Structure of an interleaving striped capacitor substrate |
JP2005129619A (ja) | 2003-10-22 | 2005-05-19 | Toppan Printing Co Ltd | 共振抑制用多層配線基板 |
JP4611758B2 (ja) | 2004-10-12 | 2011-01-12 | 信越ポリマー株式会社 | 伝導ノイズ抑制体および伝導ノイズ抑制体付電子部品 |
-
2007
- 2007-01-19 JP JP2007009802A patent/JP4309433B2/ja active Active
-
2008
- 2008-01-15 US US12/007,758 patent/US7816768B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US7816768B2 (en) | 2010-10-19 |
US20080173987A1 (en) | 2008-07-24 |
JP4309433B2 (ja) | 2009-08-05 |
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