JP2008176360A - マルチプロセッサシステム - Google Patents

マルチプロセッサシステム Download PDF

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Publication number
JP2008176360A
JP2008176360A JP2007006621A JP2007006621A JP2008176360A JP 2008176360 A JP2008176360 A JP 2008176360A JP 2007006621 A JP2007006621 A JP 2007006621A JP 2007006621 A JP2007006621 A JP 2007006621A JP 2008176360 A JP2008176360 A JP 2008176360A
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JP
Japan
Prior art keywords
interrupt
processor
factor
request
priority
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007006621A
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English (en)
Japanese (ja)
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JP2008176360A5 (enExample
Inventor
Hirokazu Takada
浩和 高田
Naohito Sugai
尚人 菅井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Technology Corp
Original Assignee
Renesas Technology Corp
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Filing date
Publication date
Application filed by Renesas Technology Corp filed Critical Renesas Technology Corp
Priority to JP2007006621A priority Critical patent/JP2008176360A/ja
Priority to US12/007,838 priority patent/US7805555B2/en
Publication of JP2008176360A publication Critical patent/JP2008176360A/ja
Publication of JP2008176360A5 publication Critical patent/JP2008176360A5/ja
Priority to US12/872,423 priority patent/US8051234B2/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP2007006621A 2007-01-16 2007-01-16 マルチプロセッサシステム Pending JP2008176360A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2007006621A JP2008176360A (ja) 2007-01-16 2007-01-16 マルチプロセッサシステム
US12/007,838 US7805555B2 (en) 2007-01-16 2008-01-16 Multiprocessor system
US12/872,423 US8051234B2 (en) 2007-01-16 2010-08-31 Multiprocessor system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2007006621A JP2008176360A (ja) 2007-01-16 2007-01-16 マルチプロセッサシステム

Publications (2)

Publication Number Publication Date
JP2008176360A true JP2008176360A (ja) 2008-07-31
JP2008176360A5 JP2008176360A5 (enExample) 2010-02-25

Family

ID=39618635

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007006621A Pending JP2008176360A (ja) 2007-01-16 2007-01-16 マルチプロセッサシステム

Country Status (2)

Country Link
US (2) US7805555B2 (enExample)
JP (1) JP2008176360A (enExample)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010102540A (ja) * 2008-10-24 2010-05-06 Fujitsu Microelectronics Ltd マルチプロセッサシステムｌｓｉ
JP2010250821A (ja) * 2009-04-15 2010-11-04 Asml Netherlands Bv リソグラフィ装置、制御システム、マルチコアプロセッサ、およびマルチコアプロセッサにおいてタスクを開始する方法
JP2012003478A (ja) * 2010-06-16 2012-01-05 Mitsubishi Electric Corp 割込み制御装置
US9298251B2 (en) 2012-01-30 2016-03-29 Samsung Electronics Co., Ltd. Methods of spreading plurality of interrupts, interrupt request signal spreader circuits, and systems-on-chips having the same

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2075696A3 (en) * 2007-05-10 2010-01-27 Texas Instruments Incorporated Interrupt- related circuits, systems and processes
US7707344B2 (en) * 2008-01-29 2010-04-27 International Business Machines Corporation Interrupt mitigation on multiple network adapters
US8024504B2 (en) * 2008-06-26 2011-09-20 Microsoft Corporation Processor interrupt determination
KR20110097447A (ko) * 2010-02-25 2011-08-31 삼성전자주식회사 인터럽트 프록시 기능을 구비한 시스템 온 칩 및 그에 따른 인터럽트 프록시 처리방법
JP5512383B2 (ja) * 2010-05-12 2014-06-04 ルネサスエレクトロニクス株式会社 計算機システム
US8601194B2 (en) * 2011-02-08 2013-12-03 Red Hat Israel, Ltd. On-demand interrupt vector allocation based on activity detection
CN104380272A (zh) * 2012-07-17 2015-02-25 西门子公司 用于中断结合的装置和方法
US9424212B2 (en) 2013-06-13 2016-08-23 Microsoft Technology Licensing, Llc Operating system-managed interrupt steering in multiprocessor systems

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07160656A (ja) * 1993-12-13 1995-06-23 Nippon Telegr & Teleph Corp <Ntt> 外部割込み制御方法
JPH1124948A (ja) * 1997-06-27 1999-01-29 Fujitsu Ltd マルチプロセッサシステムの割込み制御方式および装置

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US4768149A (en) * 1985-08-29 1988-08-30 International Business Machines Corporation System for managing a plurality of shared interrupt handlers in a linked-list data structure
JP2855298B2 (ja) * 1990-12-21 1999-02-10 インテル・コーポレーション 割込み要求の仲裁方法およびマルチプロセッサシステム
US5410710A (en) * 1990-12-21 1995-04-25 Intel Corporation Multiprocessor programmable interrupt controller system adapted to functional redundancy checking processor systems
JPH04318654A (ja) * 1991-02-13 1992-11-10 Hewlett Packard Co <Hp> マイクロプロセッサへの割り込みのリダイレクションシステム
JPH05324569A (ja) 1992-05-21 1993-12-07 Mitsubishi Electric Corp 割り込み制御方式
US5675807A (en) * 1992-12-17 1997-10-07 Tandem Computers Incorporated Interrupt message delivery identified by storage location of received interrupt data
JPH0836498A (ja) 1994-07-25 1996-02-06 Nec Software Ltd マルチプロセッサシステム
US5940610A (en) * 1995-10-05 1999-08-17 Brooktree Corporation Using prioritized interrupt callback routines to process different types of multimedia information
JP3059098B2 (ja) 1996-01-31 2000-07-04 株式会社東芝 マルチプロセッサシステム
US5905897A (en) * 1997-03-20 1999-05-18 Industrial Technology Research Institute Method and apparatus for selecting a nonblocked interrupt request
US6006301A (en) * 1997-09-30 1999-12-21 Intel Corporation Multi-delivery scheme interrupt router
US6189065B1 (en) * 1998-09-28 2001-02-13 International Business Machines Corporation Method and apparatus for interrupt load balancing for powerPC processors
JP2001236238A (ja) 2000-02-24 2001-08-31 Matsushita Electric Ind Co Ltd 割込処理方法
US6738847B1 (en) * 2000-11-10 2004-05-18 Unisys Corporation Method for assigning a multiplicity of interrupt vectors in a symmetric multi-processor computing environment
US6772252B1 (en) * 2001-01-31 2004-08-03 Efficient Networks, Inc. System and method for identifying a product for use with a computing device
US6813665B2 (en) * 2001-09-21 2004-11-02 Intel Corporation Interrupt method, system and medium
US7328294B2 (en) * 2001-12-03 2008-02-05 Sun Microsystems, Inc. Methods and apparatus for distributing interrupts
KR100456630B1 (ko) * 2001-12-11 2004-11-10 한국전자통신연구원 프로세서간 통신을 위한 인터럽트 중계 장치 및 방법
US7444639B2 (en) * 2001-12-20 2008-10-28 Texas Insturments Incorporated Load balanced interrupt handling in an embedded symmetric multiprocessor system
JP2005182177A (ja) 2003-12-16 2005-07-07 Canon Inc 割り込み処理方法
JP4247228B2 (ja) * 2005-11-28 2009-04-02 株式会社日立製作所 ヘテロマルチプロセッサシステムおよびそのｏｓ構成方法
US8296768B2 (en) * 2007-06-30 2012-10-23 Intel Corporation Method and apparatus to enable runtime processor migration with operating system assistance

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07160656A (ja) * 1993-12-13 1995-06-23 Nippon Telegr & Teleph Corp <Ntt> 外部割込み制御方法
JPH1124948A (ja) * 1997-06-27 1999-01-29 Fujitsu Ltd マルチプロセッサシステムの割込み制御方式および装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010102540A (ja) * 2008-10-24 2010-05-06 Fujitsu Microelectronics Ltd マルチプロセッサシステムｌｓｉ
US8549200B2 (en) 2008-10-24 2013-10-01 Fujitsu Semiconductor Limited Multiprocessor system configured as system LSI
JP2010250821A (ja) * 2009-04-15 2010-11-04 Asml Netherlands Bv リソグラフィ装置、制御システム、マルチコアプロセッサ、およびマルチコアプロセッサにおいてタスクを開始する方法
JP2012003478A (ja) * 2010-06-16 2012-01-05 Mitsubishi Electric Corp 割込み制御装置
US9298251B2 (en) 2012-01-30 2016-03-29 Samsung Electronics Co., Ltd. Methods of spreading plurality of interrupts, interrupt request signal spreader circuits, and systems-on-chips having the same

Also Published As

Publication number Publication date
US20080172511A1 (en) 2008-07-17
US20110022759A1 (en) 2011-01-27
US8051234B2 (en) 2011-11-01
US7805555B2 (en) 2010-09-28

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