JP2008159815A5 - - Google Patents
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- Publication number
- JP2008159815A5 JP2008159815A5 JP2006346753A JP2006346753A JP2008159815A5 JP 2008159815 A5 JP2008159815 A5 JP 2008159815A5 JP 2006346753 A JP2006346753 A JP 2006346753A JP 2006346753 A JP2006346753 A JP 2006346753A JP 2008159815 A5 JP2008159815 A5 JP 2008159815A5
- Authority
- JP
- Japan
- Prior art keywords
- chip
- terminal
- memory
- asic
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- NJPPVKZQTLUDBO-UHFFFAOYSA-N novaluron Chemical compound C1=C(Cl)C(OC(F)(F)C(OC(F)(F)F)F)=CC=C1NC(=O)NC(=O)C1=C(F)C=CC=C1F NJPPVKZQTLUDBO-UHFFFAOYSA-N 0.000 claims 11
- 238000004519 manufacturing process Methods 0.000 claims 6
- 239000004065 semiconductor Substances 0.000 claims 6
- 238000000034 method Methods 0.000 claims 2
- 125000006850 spacer group Chemical group 0.000 claims 1
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006346753A JP5006640B2 (ja) | 2006-12-22 | 2006-12-22 | 半導体装置の製造方法 |
| KR1020070133021A KR20080059047A (ko) | 2006-12-22 | 2007-12-18 | 반도체 장치의 제조 방법 |
| CNA2007103006847A CN101207053A (zh) | 2006-12-22 | 2007-12-21 | 半导体器件制造方法 |
| US11/962,212 US20080153203A1 (en) | 2006-12-22 | 2007-12-21 | Semiconductor device manufacturing method |
| TW096149165A TW200828474A (en) | 2006-12-22 | 2007-12-21 | Semiconductor device manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006346753A JP5006640B2 (ja) | 2006-12-22 | 2006-12-22 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2008159815A JP2008159815A (ja) | 2008-07-10 |
| JP2008159815A5 true JP2008159815A5 (enExample) | 2009-11-19 |
| JP5006640B2 JP5006640B2 (ja) | 2012-08-22 |
Family
ID=39543426
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006346753A Active JP5006640B2 (ja) | 2006-12-22 | 2006-12-22 | 半導体装置の製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US20080153203A1 (enExample) |
| JP (1) | JP5006640B2 (enExample) |
| KR (1) | KR20080059047A (enExample) |
| CN (1) | CN101207053A (enExample) |
| TW (1) | TW200828474A (enExample) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009194143A (ja) * | 2008-02-14 | 2009-08-27 | Elpida Memory Inc | 半導体装置 |
| JP5297992B2 (ja) | 2009-12-15 | 2013-09-25 | ルネサスエレクトロニクス株式会社 | 外部記憶装置 |
| KR20120056018A (ko) * | 2010-11-24 | 2012-06-01 | 삼성전자주식회사 | 범프들과 테스트 패드들이 십자 모양으로 배열되는 반도체 장치 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2725657B2 (ja) * | 1995-10-25 | 1998-03-11 | 日本電気株式会社 | 半導体装置およびその製造方法 |
| US6351028B1 (en) * | 1999-02-08 | 2002-02-26 | Micron Technology, Inc. | Multiple die stack apparatus employing T-shaped interposer elements |
| US8089142B2 (en) * | 2002-02-13 | 2012-01-03 | Micron Technology, Inc. | Methods and apparatus for a stacked-die interposer |
| JP4580671B2 (ja) * | 2004-03-29 | 2010-11-17 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4703300B2 (ja) * | 2005-07-20 | 2011-06-15 | 富士通セミコンダクター株式会社 | 中継基板及び当該中継基板を備えた半導体装置 |
| KR100761860B1 (ko) * | 2006-09-20 | 2007-09-28 | 삼성전자주식회사 | 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법 |
-
2006
- 2006-12-22 JP JP2006346753A patent/JP5006640B2/ja active Active
-
2007
- 2007-12-18 KR KR1020070133021A patent/KR20080059047A/ko not_active Withdrawn
- 2007-12-21 US US11/962,212 patent/US20080153203A1/en not_active Abandoned
- 2007-12-21 TW TW096149165A patent/TW200828474A/zh unknown
- 2007-12-21 CN CNA2007103006847A patent/CN101207053A/zh active Pending