CN101207053A - 半导体器件制造方法 - Google Patents

半导体器件制造方法 Download PDF

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Publication number
CN101207053A
CN101207053A CNA2007103006847A CN200710300684A CN101207053A CN 101207053 A CN101207053 A CN 101207053A CN A2007103006847 A CNA2007103006847 A CN A2007103006847A CN 200710300684 A CN200710300684 A CN 200710300684A CN 101207053 A CN101207053 A CN 101207053A
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chip
terminals
memory
memory chips
terminal
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Chinese (zh)
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佐藤仁志
井上英俊
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Publication of CN101207053A publication Critical patent/CN101207053A/zh
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  • Engineering & Computer Science (AREA)
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  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
CNA2007103006847A 2006-12-22 2007-12-21 半导体器件制造方法 Pending CN101207053A (zh)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006346753 2006-12-22
JP2006346753A JP5006640B2 (ja) 2006-12-22 2006-12-22 半導体装置の製造方法

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Publication Number Publication Date
CN101207053A true CN101207053A (zh) 2008-06-25

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CNA2007103006847A Pending CN101207053A (zh) 2006-12-22 2007-12-21 半导体器件制造方法

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US (1) US20080153203A1 (enExample)
JP (1) JP5006640B2 (enExample)
KR (1) KR20080059047A (enExample)
CN (1) CN101207053A (enExample)
TW (1) TW200828474A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104253101A (zh) * 2009-12-15 2014-12-31 瑞萨电子株式会社 外部存储装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009194143A (ja) * 2008-02-14 2009-08-27 Elpida Memory Inc 半導体装置
KR20120056018A (ko) * 2010-11-24 2012-06-01 삼성전자주식회사 범프들과 테스트 패드들이 십자 모양으로 배열되는 반도체 장치

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2725657B2 (ja) * 1995-10-25 1998-03-11 日本電気株式会社 半導体装置およびその製造方法
US6351028B1 (en) * 1999-02-08 2002-02-26 Micron Technology, Inc. Multiple die stack apparatus employing T-shaped interposer elements
US8089142B2 (en) * 2002-02-13 2012-01-03 Micron Technology, Inc. Methods and apparatus for a stacked-die interposer
JP4580671B2 (ja) * 2004-03-29 2010-11-17 ルネサスエレクトロニクス株式会社 半導体装置
JP4703300B2 (ja) * 2005-07-20 2011-06-15 富士通セミコンダクター株式会社 中継基板及び当該中継基板を備えた半導体装置
KR100761860B1 (ko) * 2006-09-20 2007-09-28 삼성전자주식회사 와이어 본딩 모니터링이 가능한 인터포저 칩을 갖는 적층반도체 패키지 및 이의 제조방법

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104253101A (zh) * 2009-12-15 2014-12-31 瑞萨电子株式会社 外部存储装置
US9666659B2 (en) 2009-12-15 2017-05-30 Renesas Electronics Corporation External storage device and method of manufacturing external storage device
CN104253101B (zh) * 2009-12-15 2017-06-09 瑞萨电子株式会社 外部存储装置

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JP2008159815A (ja) 2008-07-10
US20080153203A1 (en) 2008-06-26
TW200828474A (en) 2008-07-01
JP5006640B2 (ja) 2012-08-22
KR20080059047A (ko) 2008-06-26

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