JP2007517320A5 - - Google Patents

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JP2007517320A5
JP2007517320A5 JP2006547247A JP2006547247A JP2007517320A5 JP 2007517320 A5 JP2007517320 A5 JP 2007517320A5 JP 2006547247 A JP2006547247 A JP 2006547247A JP 2006547247 A JP2006547247 A JP 2006547247A JP 2007517320 A5 JP2007517320 A5 JP 2007517320A5
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Claims (12)

  1. 不揮発性メモリシステムにおいて、
    少なくとも2つのサブアレイに分割された不揮発性メモリセルのアレイであって、前記
    少なくとも2つのサブアレイの各々においてデータが同時にアクセス可能な不揮発性メモ
    リセルのアレイと、
    少なくとも第1および第2の異なるインタリーブ配列で前記少なくとも2つのサブアレ
    イ内に記憶されたデータと、
    を備える不揮発性メモリシステム。
  2. 前記少なくとも2つのサブアレイの各々において同時にアクセス可能な前記データは、
    データのセクタを含み、前記少なくとも2つのサブアレイ内に記憶されたデータのセクタ
    は、
    前記第1のインタリーブ配列に従って前記サブアレイを跨いでインタリーブされた第1
    の連続した論理アドレスのセットによって識別される少なくとも第1のデータセクタのセ
    ットと、
    前記第2のインタリーブ配列に従って前記少なくとも2つのサブアレイのうちの単一の
    サブアレイ内にインタリーブされた第2の連続した論理アドレスのセットによって識別さ
    れる少なくとも第2のデータセクタのセットと、
    を備える請求項1記載のメモリシステム。
  3. 記憶されたデータのセクタのインタリービングの度合いを示す表示も記憶される請求項
    2記載のメモリシステム。
  4. 前記インタリービングの度合いを示す表示は、それらが関係する前記記憶されたデータ
    のセクタ内にオーバーヘッドとして記憶される請求項3記載のメモリシステム。
  5. 前記インタリービングの度合いを示す表示は、それらが関係する前記記憶されたデータ
    のセクタとは別のセクタに記憶される請求項3記載のメモリシステム。
  6. 複数単位のデータをプログラムするために、またデータを並列に読み出すために同時に
    アクセス可能な複数のメモリセルサブアレイを有する不揮発性メモリにおいて、個々のサ
    ブアレイが同時に消去可能なある最小数のメモリセルのブロックに分割され、前記メモリ
    を動作させる方法は、
    前記複数のサブアレイの各々における1ブロックの総データ記憶容量よりも小さく、か
    つ連続した論理アドレスを有する所定数の単位のデータを前記メモリ内へプログラムする
    コマンドを受信するステップと、
    プログラム対象の前記所定数の単位のデータを受信するステップと、
    前記サブアレイの各々における1ブロックの前記総データ記憶容量を基準としてプログ
    ラムされている前記所定数の単位のデータに合わせて前記複数のメモリセルサブアレイの
    うちの1つまたはそれ以上のサブアレイの複数ブロックにわたって順番に配列された連続
    した論理アドレスを有する前記受信された単位のデータをプログラムするステップと、
    を含む方法。
  7. 不揮発性メモリシステムを動作させる方法において、
    少なくとも第1の並列処理度および第2の並列処理度の各々でデータを書き込みおよび
    読み出しを実行して前記メモリを動作させるステップと、
    前記メモリシステムによって受信されたデータ書き込み要求を観察するステップと、
    前記受信された書き込み要求の個々の要求に添付されたデータを、前記受信された書き
    込み要求の少なくとも1つの特性に応じて、前記少なくとも第1および第2の並列処理度
    のうちの1つで書き込むステップと、
    を含む方法。
  8. 前記少なくとも1つの特性は、前記メモリ内に書き込まれるべき書き込み要求と共に受
    信されたある量のデータを含む請求項記載の方法。
  9. 消去の単位としてブロック内に配列された不揮発性メモリセルのアレイ、その内部に配
    置されたデータのプログラミングおよび読み出しの単位としてのページ、および独立して
    アクセス可能な複数のブロックからなるプレーンを有するフラッシュメモリシステムにお
    ける動作方法は、
    複数の前記プレーンからのブロックを個々に含むメタブロックを論理的に形成するステ
    ップと、
    さまざまな量のデータを有する書き込みコマンドを連続して受信するステップと、
    前記書き込みコマンドのさまざまな特性に応じて、前記プレーンのうちの1つのプレー
    ンの個々のブロック内のページに並列または順次に、あるいは前記メタブロックのうちの
    1つのメタブロックの2つまたはそれ以上のブロック内のページに並列に、前記受信され
    たデータをさまざまに書き込むステップと、
    を含む方法。
  10. データが並列に書き込まれている前記ブロックを識別する表示を、前記受信されたデー
    タと同時に書き込むステップをさらに含む請求項記載の方法。
  11. 共に消去可能でかつ複数のデータの単位を個々に記憶するセルのブロックに構成された
    メモリセルのアレイを有する不揮発性メモリシステムにおいて、書き込み対象の1つまた
    はそれ以上の単位のデータの論理アドレスを個々に指定し、かつ連続して受信されている
    前記指定された1つまたはそれ以上の単位のデータが添付されている一連の書き込みコマ
    ンドに応答する方法は、
    個々の書き込みコマンドの前記論理アドレスを、前記添付の1つまたはそれ以上の単位
    のデータを並列に書き込むことができる1つまたはそれ以上の前記ブロックのメモリセル
    内の物理アドレスに変換するステップであって、ある数の前記1つまたはそれ以上のブロ
    ックが、前記1つまたはそれ以上の単位のデータを受信するために、前記受信された一連
    の書き込みコマンドのうちの少なくとも1つによって指定されたデータの単位数の関数と
    して選択されるステップと、
    前記選択された1つまたはそれ以上の単位のデータを前記1つまたはそれ以上のブロッ
    クに並列に書き込むステップと、
    を含む方法。
  12. 不揮発性メモリのメモリセルのアレイを動作させる方法において、
    第1および第2の異なるインタリーブ配列でデータを記憶するステップと、
    前記第2のインタリーブ配列で記憶することによってより最適な性能特性がもたらされ
    ると考えられる前記第1のインタリーブ配列で記憶された前記データのうちの少なくとも
    一部を更新するコマンドの受信に応答して、前記第1のインタリーブ配列で記憶されたデ
    ータを読み出すステップと、
    前記読み出されたデータおよび前記更新されたデータを、前記第2のインタリーブ配列
    で前記メモリアレイに書き込むステップと、
    を含む方法。
JP2006547247A 2003-12-30 2004-12-16 ホストの使用特性に基づいたフラッシュメモリのアドレスマッピングの適応的モード切り換え Expired - Fee Related JP5001011B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/750,190 2003-12-30
US10/750,190 US7631138B2 (en) 2003-12-30 2003-12-30 Adaptive mode switching of flash memory address mapping based on host usage characteristics
PCT/US2004/042862 WO2005066794A2 (en) 2003-12-30 2004-12-16 Adaptive mode switching of flash memory address mapping based on host usage characteristics

Publications (3)

Publication Number Publication Date
JP2007517320A JP2007517320A (ja) 2007-06-28
JP2007517320A5 true JP2007517320A5 (ja) 2008-02-14
JP5001011B2 JP5001011B2 (ja) 2012-08-15

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Country Status (8)

Country Link
US (2) US7631138B2 (ja)
EP (1) EP1700221B1 (ja)
JP (1) JP5001011B2 (ja)
KR (1) KR101014599B1 (ja)
CN (1) CN1918552B (ja)
AT (1) ATE554448T1 (ja)
TW (1) TWI303365B (ja)
WO (1) WO2005066794A2 (ja)

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