JP2007514268A5 - - Google Patents

Download PDF

Info

Publication number
JP2007514268A5
JP2007514268A5 JP2006545648A JP2006545648A JP2007514268A5 JP 2007514268 A5 JP2007514268 A5 JP 2007514268A5 JP 2006545648 A JP2006545648 A JP 2006545648A JP 2006545648 A JP2006545648 A JP 2006545648A JP 2007514268 A5 JP2007514268 A5 JP 2007514268A5
Authority
JP
Japan
Prior art keywords
bit lines
memory unit
transistors
memory
discharge
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006545648A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007514268A (ja
Filing date
Publication date
Priority claimed from US10/737,058 external-priority patent/US7050354B2/en
Application filed filed Critical
Publication of JP2007514268A publication Critical patent/JP2007514268A/ja
Publication of JP2007514268A5 publication Critical patent/JP2007514268A5/ja
Pending legal-status Critical Current

Links

JP2006545648A 2003-12-16 2004-11-15 コンパイラによりプログラム可能な高速アクセスタイミングを有する低電力メモリ Pending JP2007514268A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/737,058 US7050354B2 (en) 2003-12-16 2003-12-16 Low-power compiler-programmable memory with fast access timing
PCT/US2004/038027 WO2005060465A2 (en) 2003-12-16 2004-11-15 Low-power compiler-programmable memory with fast access timing

Publications (2)

Publication Number Publication Date
JP2007514268A JP2007514268A (ja) 2007-05-31
JP2007514268A5 true JP2007514268A5 (https=) 2007-12-27

Family

ID=34654015

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006545648A Pending JP2007514268A (ja) 2003-12-16 2004-11-15 コンパイラによりプログラム可能な高速アクセスタイミングを有する低電力メモリ

Country Status (7)

Country Link
US (1) US7050354B2 (https=)
EP (1) EP1704570B1 (https=)
JP (1) JP2007514268A (https=)
KR (1) KR101129078B1 (https=)
CN (1) CN1886796B (https=)
TW (1) TWI369684B (https=)
WO (1) WO2005060465A2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006004514A (ja) * 2004-06-17 2006-01-05 Matsushita Electric Ind Co Ltd 半導体記憶装置
DE102006022867B4 (de) * 2006-05-16 2009-04-02 Infineon Technologies Ag Ausleseschaltung für oder in einem ROM-Speicher und ROM-Speicher
KR101034616B1 (ko) * 2009-11-30 2011-05-12 주식회사 하이닉스반도체 센스앰프 및 반도체 메모리장치
US9910473B2 (en) 2013-03-14 2018-03-06 Silicon Storage Technology, Inc. Power management for a memory device
US9905278B2 (en) * 2015-09-21 2018-02-27 Intel Corporation Memory device including encoded data line-multiplexer
CN109086229B (zh) * 2018-07-17 2020-07-07 京信通信系统(中国)有限公司 器件访问方法、装置、控制器和存储介质

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2637314B2 (ja) * 1991-08-30 1997-08-06 株式会社東芝 不揮発性メモリ回路
ATE133327T1 (de) * 1992-01-16 1996-02-15 Sulzer Medizinaltechnik Ag Zweiteilige hüftgelenkpfanne
US5434822A (en) * 1994-07-07 1995-07-18 Intel Corporation Apparatus and method for adjusting and maintaining a bitline precharge level
JPH08123838A (ja) * 1994-10-21 1996-05-17 Hitachi Ltd Asicメモリおよびそれを用いたマイクロコンピュータ、ならびにメモリ設計方法
US5627788A (en) * 1995-05-05 1997-05-06 Intel Corporation Memory unit with bit line discharger
JP3672633B2 (ja) * 1995-09-07 2005-07-20 株式会社ルネサステクノロジ 半導体メモリ装置
JPH09231783A (ja) * 1996-02-26 1997-09-05 Sharp Corp 半導体記憶装置
JPH09265791A (ja) * 1996-03-28 1997-10-07 Nec Corp 半導体記憶装置
JP3586966B2 (ja) * 1996-04-26 2004-11-10 松下電器産業株式会社 不揮発性半導体記憶装置
US5856949A (en) * 1997-03-07 1999-01-05 Advanced Micro Devices, Inc. Current sense amplifier for RAMs
KR100268420B1 (ko) * 1997-12-31 2000-10-16 윤종용 반도체 메모리 장치 및 그 장치의 독출 방법
JP3116921B2 (ja) * 1998-09-22 2000-12-11 日本電気株式会社 半導体記憶装置
FR2794277B1 (fr) 1999-05-25 2001-08-10 St Microelectronics Sa Memoire morte a faible consommation
EP1094465A1 (de) * 1999-10-20 2001-04-25 Infineon Technologies AG Speichereinrichtung
US6285590B1 (en) * 2000-06-28 2001-09-04 National Semiconductor Corporation Low power consumption semiconductor ROM, EPROM, EEPROM and like circuit
JP2002063794A (ja) * 2000-08-21 2002-02-28 New Japan Radio Co Ltd Romデータ読み出し回路
JP3709132B2 (ja) * 2000-09-20 2005-10-19 シャープ株式会社 不揮発性半導体記憶装置
US6301176B1 (en) * 2000-12-27 2001-10-09 Lsi Logic Corporation Asynchronous memory self time scheme
US6621758B2 (en) * 2001-05-04 2003-09-16 Texas Instruments Incorporated Method for providing a low power read only memory banking methodology with efficient bus muxing
US6430099B1 (en) * 2001-05-11 2002-08-06 Broadcom Corporation Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation
JP2003228981A (ja) * 2002-02-05 2003-08-15 Toshiba Corp 半導体記憶装置
KR100423894B1 (ko) * 2002-05-09 2004-03-22 삼성전자주식회사 저전압 반도체 메모리 장치
WO2004015713A1 (en) 2002-08-13 2004-02-19 Motorola, Inc., A Corporation Of The State Of Delaware Method and apparatus for reading an integrated circuit memory

Similar Documents

Publication Publication Date Title
EP2263234B1 (en) Advanced bit line tracking in high performance memory compilers
CN100541662C (zh) 在存储设备中防止功率噪声的级联唤醒电路
US9880609B2 (en) Power management
US8947968B2 (en) Memory having power saving mode
US10014033B2 (en) Apparatus for power management
US9070432B2 (en) Negative bitline boost scheme for SRAM write-assist
JP2007272938A5 (https=)
JP2008521157A5 (https=)
JP2003132682A5 (https=)
US7724594B2 (en) Leakage current control device of semiconductor memory device
CN104981875A (zh) 用于存储器设备中的写辅助的写激励器
TW200802404A (en) Volatile memory cell two-pass writing method
GB2513714A (en) A memory device and method of controlling leakage current within such a memory device
Kim et al. LL-PCM: Low-latency phase change memory architecture
JP2009545834A5 (https=)
Kutila et al. Comparison of 130 nm technology 6T and 8T SRAM cell designs for Near-Threshold operation
CN108122570A (zh) 具有确定的时间窗口的存储器装置
JP2007514268A5 (https=)
JP2003109393A5 (https=)
TW201633311A (zh) 可變電阻記憶體裝置及操作該可變電阻記憶體裝置的方法
JP2013037746A5 (https=)
US9886988B1 (en) Memory cell having a reduced peak wake-up current
JP2011054233A5 (https=)
JP2006127738A5 (https=)
WO2008023334A3 (en) Method for testing a static random access memory