CN1886796B - 具有快速访问时序的低功率编译器可编程的存储器 - Google Patents

具有快速访问时序的低功率编译器可编程的存储器 Download PDF

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Publication number
CN1886796B
CN1886796B CN2004800353120A CN200480035312A CN1886796B CN 1886796 B CN1886796 B CN 1886796B CN 2004800353120 A CN2004800353120 A CN 2004800353120A CN 200480035312 A CN200480035312 A CN 200480035312A CN 1886796 B CN1886796 B CN 1886796B
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China
Prior art keywords
memory
bit lines
charge pulse
delay
pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
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CN2004800353120A
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English (en)
Chinese (zh)
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CN1886796A (zh
Inventor
詹姆斯·W.·尼古拉斯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP USA Inc
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Freescale Semiconductor Inc
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Publication of CN1886796A publication Critical patent/CN1886796A/zh
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C17/00Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/30Circuit design
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065Differential amplifiers of latching type
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2227Standby or low power modes
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22Control and timing of internal memory operations
    • G11C2207/2281Timing of a read operation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Evolutionary Computation (AREA)
  • Geometry (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Static Random-Access Memory (AREA)
CN2004800353120A 2003-12-16 2004-11-15 具有快速访问时序的低功率编译器可编程的存储器 Expired - Lifetime CN1886796B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/737,058 US7050354B2 (en) 2003-12-16 2003-12-16 Low-power compiler-programmable memory with fast access timing
US10/737,058 2003-12-16
PCT/US2004/038027 WO2005060465A2 (en) 2003-12-16 2004-11-15 Low-power compiler-programmable memory with fast access timing

Publications (2)

Publication Number Publication Date
CN1886796A CN1886796A (zh) 2006-12-27
CN1886796B true CN1886796B (zh) 2010-09-01

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CN2004800353120A Expired - Lifetime CN1886796B (zh) 2003-12-16 2004-11-15 具有快速访问时序的低功率编译器可编程的存储器

Country Status (7)

Country Link
US (1) US7050354B2 (https=)
EP (1) EP1704570B1 (https=)
JP (1) JP2007514268A (https=)
KR (1) KR101129078B1 (https=)
CN (1) CN1886796B (https=)
TW (1) TWI369684B (https=)
WO (1) WO2005060465A2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006004514A (ja) * 2004-06-17 2006-01-05 Matsushita Electric Ind Co Ltd 半導体記憶装置
DE102006022867B4 (de) * 2006-05-16 2009-04-02 Infineon Technologies Ag Ausleseschaltung für oder in einem ROM-Speicher und ROM-Speicher
KR101034616B1 (ko) * 2009-11-30 2011-05-12 주식회사 하이닉스반도체 센스앰프 및 반도체 메모리장치
US9910473B2 (en) 2013-03-14 2018-03-06 Silicon Storage Technology, Inc. Power management for a memory device
US9905278B2 (en) * 2015-09-21 2018-02-27 Intel Corporation Memory device including encoded data line-multiplexer
CN109086229B (zh) * 2018-07-17 2020-07-07 京信通信系统(中国)有限公司 器件访问方法、装置、控制器和存储介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5627788A (en) * 1995-05-05 1997-05-06 Intel Corporation Memory unit with bit line discharger
US6282114B1 (en) * 1999-05-25 2001-08-28 Stmicroelectronics S.A. Low consumption ROM
US6301176B1 (en) * 2000-12-27 2001-10-09 Lsi Logic Corporation Asynchronous memory self time scheme
CN1382295A (zh) * 1999-10-20 2002-11-27 因芬尼昂技术股份公司 存储装置

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Publication number Priority date Publication date Assignee Title
JP2637314B2 (ja) * 1991-08-30 1997-08-06 株式会社東芝 不揮発性メモリ回路
ATE133327T1 (de) * 1992-01-16 1996-02-15 Sulzer Medizinaltechnik Ag Zweiteilige hüftgelenkpfanne
US5434822A (en) * 1994-07-07 1995-07-18 Intel Corporation Apparatus and method for adjusting and maintaining a bitline precharge level
JPH08123838A (ja) * 1994-10-21 1996-05-17 Hitachi Ltd Asicメモリおよびそれを用いたマイクロコンピュータ、ならびにメモリ設計方法
JP3672633B2 (ja) * 1995-09-07 2005-07-20 株式会社ルネサステクノロジ 半導体メモリ装置
JPH09231783A (ja) * 1996-02-26 1997-09-05 Sharp Corp 半導体記憶装置
JPH09265791A (ja) * 1996-03-28 1997-10-07 Nec Corp 半導体記憶装置
JP3586966B2 (ja) * 1996-04-26 2004-11-10 松下電器産業株式会社 不揮発性半導体記憶装置
US5856949A (en) * 1997-03-07 1999-01-05 Advanced Micro Devices, Inc. Current sense amplifier for RAMs
KR100268420B1 (ko) * 1997-12-31 2000-10-16 윤종용 반도체 메모리 장치 및 그 장치의 독출 방법
JP3116921B2 (ja) * 1998-09-22 2000-12-11 日本電気株式会社 半導体記憶装置
US6285590B1 (en) * 2000-06-28 2001-09-04 National Semiconductor Corporation Low power consumption semiconductor ROM, EPROM, EEPROM and like circuit
JP2002063794A (ja) * 2000-08-21 2002-02-28 New Japan Radio Co Ltd Romデータ読み出し回路
JP3709132B2 (ja) * 2000-09-20 2005-10-19 シャープ株式会社 不揮発性半導体記憶装置
US6621758B2 (en) * 2001-05-04 2003-09-16 Texas Instruments Incorporated Method for providing a low power read only memory banking methodology with efficient bus muxing
US6430099B1 (en) * 2001-05-11 2002-08-06 Broadcom Corporation Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation
JP2003228981A (ja) * 2002-02-05 2003-08-15 Toshiba Corp 半導体記憶装置
KR100423894B1 (ko) * 2002-05-09 2004-03-22 삼성전자주식회사 저전압 반도체 메모리 장치
WO2004015713A1 (en) 2002-08-13 2004-02-19 Motorola, Inc., A Corporation Of The State Of Delaware Method and apparatus for reading an integrated circuit memory

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5627788A (en) * 1995-05-05 1997-05-06 Intel Corporation Memory unit with bit line discharger
US6282114B1 (en) * 1999-05-25 2001-08-28 Stmicroelectronics S.A. Low consumption ROM
CN1382295A (zh) * 1999-10-20 2002-11-27 因芬尼昂技术股份公司 存储装置
US6301176B1 (en) * 2000-12-27 2001-10-09 Lsi Logic Corporation Asynchronous memory self time scheme

Also Published As

Publication number Publication date
WO2005060465A3 (en) 2005-09-09
TWI369684B (en) 2012-08-01
EP1704570A2 (en) 2006-09-27
EP1704570A4 (en) 2009-05-06
TW200601337A (en) 2006-01-01
JP2007514268A (ja) 2007-05-31
US7050354B2 (en) 2006-05-23
KR101129078B1 (ko) 2012-03-27
KR20060114343A (ko) 2006-11-06
CN1886796A (zh) 2006-12-27
WO2005060465A2 (en) 2005-07-07
EP1704570B1 (en) 2020-01-15
US20050128836A1 (en) 2005-06-16

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Address after: Texas in the United States

Patentee after: NXP USA, Inc.

Address before: Texas in the United States

Patentee before: FREESCALE SEMICONDUCTOR, Inc.

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CX01 Expiry of patent term

Granted publication date: 20100901

CX01 Expiry of patent term