JP2007511099A5 - - Google Patents

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Publication number
JP2007511099A5
JP2007511099A5 JP2006539755A JP2006539755A JP2007511099A5 JP 2007511099 A5 JP2007511099 A5 JP 2007511099A5 JP 2006539755 A JP2006539755 A JP 2006539755A JP 2006539755 A JP2006539755 A JP 2006539755A JP 2007511099 A5 JP2007511099 A5 JP 2007511099A5
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JP
Japan
Prior art keywords
layer
silicon
nitrogen
photoresist
dielectric
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006539755A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007511099A (ja
Filing date
Publication date
Priority claimed from US10/712,326 external-priority patent/US20050101135A1/en
Application filed filed Critical
Publication of JP2007511099A publication Critical patent/JP2007511099A/ja
Publication of JP2007511099A5 publication Critical patent/JP2007511099A5/ja
Pending legal-status Critical Current

Links

JP2006539755A 2003-11-12 2004-11-09 フォトレジストストリッピングの間のバリヤー物質損失の最小化 Pending JP2007511099A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/712,326 US20050101135A1 (en) 2003-11-12 2003-11-12 Minimizing the loss of barrier materials during photoresist stripping
PCT/US2004/037376 WO2005048335A1 (en) 2003-11-12 2004-11-09 Minimizing the loss of barrier materials during photoresist stripping

Publications (2)

Publication Number Publication Date
JP2007511099A JP2007511099A (ja) 2007-04-26
JP2007511099A5 true JP2007511099A5 (enExample) 2007-10-18

Family

ID=34552671

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006539755A Pending JP2007511099A (ja) 2003-11-12 2004-11-09 フォトレジストストリッピングの間のバリヤー物質損失の最小化

Country Status (8)

Country Link
US (1) US20050101135A1 (enExample)
EP (1) EP1683192A1 (enExample)
JP (1) JP2007511099A (enExample)
KR (1) KR20060123144A (enExample)
CN (1) CN1868039A (enExample)
IL (1) IL174648A0 (enExample)
TW (1) TW200524051A (enExample)
WO (1) WO2005048335A1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7517801B1 (en) * 2003-12-23 2009-04-14 Lam Research Corporation Method for selectivity control in a plasma processing system
US8222155B2 (en) * 2004-06-29 2012-07-17 Lam Research Corporation Selectivity control in a plasma processing system
US7396769B2 (en) * 2004-08-02 2008-07-08 Lam Research Corporation Method for stripping photoresist from etched wafer
US7479457B2 (en) * 2005-09-08 2009-01-20 Lam Research Corporation Gas mixture for removing photoresist and post etch residue from low-k dielectric material and method of use thereof
JP2007180420A (ja) * 2005-12-28 2007-07-12 Fujitsu Ltd 半導体装置の製造方法及び磁気ヘッドの製造方法
US7244313B1 (en) * 2006-03-24 2007-07-17 Applied Materials, Inc. Plasma etch and photoresist strip process with intervening chamber de-fluorination and wafer de-fluorination steps
US7932181B2 (en) * 2006-06-20 2011-04-26 Lam Research Corporation Edge gas injection for critical dimension uniformity improvement
US20090078675A1 (en) * 2007-09-26 2009-03-26 Silverbrook Research Pty Ltd Method of removing photoresist
WO2009039551A1 (en) * 2007-09-26 2009-04-02 Silverbrook Research Pty Ltd Method of removing photoresist
JP5532826B2 (ja) * 2009-11-04 2014-06-25 富士通セミコンダクター株式会社 半導体素子の製造方法
CN102877041B (zh) * 2011-07-14 2014-11-19 中国科学院微电子研究所 薄膜沉积方法以及半导体器件制造方法
CN102610511A (zh) * 2012-03-21 2012-07-25 中微半导体设备(上海)有限公司 光刻胶的去除方法
US8901007B2 (en) * 2013-01-03 2014-12-02 Taiwan Semiconductor Manufacturing Co., Ltd. Addition of carboxyl groups plasma during etching for interconnect reliability enhancement
US10354860B2 (en) * 2015-01-29 2019-07-16 Versum Materials Us, Llc Method and precursors for manufacturing 3D devices
JP6523091B2 (ja) 2015-07-24 2019-05-29 株式会社Kokusai Electric 半導体装置の製造方法、基板処理装置およびプログラム

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09330911A (ja) * 1996-06-11 1997-12-22 Toshiba Corp 半導体装置の製造方法
US6455232B1 (en) * 1998-04-14 2002-09-24 Applied Materials, Inc. Method of reducing stop layer loss in a photoresist stripping process using a fluorine scavenger
JP3803523B2 (ja) * 1999-12-28 2006-08-02 株式会社東芝 ドライエッチング方法及び半導体装置の製造方法
US6372636B1 (en) * 2000-06-05 2002-04-16 Chartered Semiconductor Manufacturing Ltd. Composite silicon-metal nitride barrier to prevent formation of metal fluorides in copper damascene
US6352921B1 (en) * 2000-07-19 2002-03-05 Chartered Semiconductor Manufacturing Ltd. Use of boron carbide as an etch-stop and barrier layer for copper dual damascene metallization
US6479391B2 (en) * 2000-12-22 2002-11-12 Intel Corporation Method for making a dual damascene interconnect using a multilayer hard mask
US6647994B1 (en) * 2002-01-02 2003-11-18 Taiwan Semiconductor Manufacturing Company Method of resist stripping over low-k dielectric material
JP4326746B2 (ja) * 2002-01-07 2009-09-09 東京エレクトロン株式会社 プラズマ処理方法

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