JP2007294735A5 - - Google Patents

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Publication number
JP2007294735A5
JP2007294735A5 JP2006122114A JP2006122114A JP2007294735A5 JP 2007294735 A5 JP2007294735 A5 JP 2007294735A5 JP 2006122114 A JP2006122114 A JP 2006122114A JP 2006122114 A JP2006122114 A JP 2006122114A JP 2007294735 A5 JP2007294735 A5 JP 2007294735A5
Authority
JP
Japan
Prior art keywords
resist layer
solder resist
connection pad
exposed
exposed area
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006122114A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007294735A (ja
JP4758813B2 (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from JP2006122114A external-priority patent/JP4758813B2/ja
Priority to JP2006122114A priority Critical patent/JP4758813B2/ja
Priority to KR1020070037742A priority patent/KR20070105853A/ko
Priority to US11/736,916 priority patent/US7598608B2/en
Priority to TW096114223A priority patent/TW200807662A/zh
Priority to EP07008530A priority patent/EP1850381A3/en
Publication of JP2007294735A publication Critical patent/JP2007294735A/ja
Publication of JP2007294735A5 publication Critical patent/JP2007294735A5/ja
Publication of JP4758813B2 publication Critical patent/JP4758813B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2006122114A 2006-04-26 2006-04-26 実装基板 Expired - Fee Related JP4758813B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2006122114A JP4758813B2 (ja) 2006-04-26 2006-04-26 実装基板
KR1020070037742A KR20070105853A (ko) 2006-04-26 2007-04-18 실장 기판
US11/736,916 US7598608B2 (en) 2006-04-26 2007-04-18 Mounting substrate
TW096114223A TW200807662A (en) 2006-04-26 2007-04-23 Mounting substrate
EP07008530A EP1850381A3 (en) 2006-04-26 2007-04-26 Mounting substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006122114A JP4758813B2 (ja) 2006-04-26 2006-04-26 実装基板

Publications (3)

Publication Number Publication Date
JP2007294735A JP2007294735A (ja) 2007-11-08
JP2007294735A5 true JP2007294735A5 (cg-RX-API-DMAC10.html) 2009-04-16
JP4758813B2 JP4758813B2 (ja) 2011-08-31

Family

ID=38344758

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006122114A Expired - Fee Related JP4758813B2 (ja) 2006-04-26 2006-04-26 実装基板

Country Status (5)

Country Link
US (1) US7598608B2 (cg-RX-API-DMAC10.html)
EP (1) EP1850381A3 (cg-RX-API-DMAC10.html)
JP (1) JP4758813B2 (cg-RX-API-DMAC10.html)
KR (1) KR20070105853A (cg-RX-API-DMAC10.html)
TW (1) TW200807662A (cg-RX-API-DMAC10.html)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101005242B1 (ko) * 2008-03-03 2011-01-04 삼성전기주식회사 방열 인쇄회로기판 및 반도체 칩 패키지
KR20110044793A (ko) * 2008-08-21 2011-04-29 에이저 시스템즈 인크 Ｓｎ-필름 내의 휘스커의 완화
US8536718B2 (en) * 2010-06-24 2013-09-17 Stats Chippac Ltd. Integrated circuit packaging system with trenches and method of manufacture thereof
US8766461B1 (en) * 2013-01-16 2014-07-01 Texas Instruments Incorporated Substrate with bond fingers
JP6251828B2 (ja) * 2017-01-30 2017-12-20 ルネサスエレクトロニクス株式会社 半導体装置
JP7072644B2 (ja) * 2018-04-26 2022-05-20 京セラ株式会社 電子素子実装用基板、電子装置、および電子モジュール

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040061220A1 (en) * 1996-03-22 2004-04-01 Chuichi Miyazaki Semiconductor device and manufacturing method thereof
JP3420076B2 (ja) 1998-08-31 2003-06-23 新光電気工業株式会社 フリップチップ実装基板の製造方法及びフリップチップ実装基板及びフリップチップ実装構造
JP4177950B2 (ja) * 2000-03-28 2008-11-05 ローム株式会社 半導体装置の製造方法
JP3914094B2 (ja) * 2002-06-04 2007-05-16 松下電器産業株式会社 半導体装置
JP2005109187A (ja) * 2003-09-30 2005-04-21 Tdk Corp フリップチップ実装回路基板およびその製造方法ならびに集積回路装置
TWI240389B (en) * 2004-05-06 2005-09-21 Advanced Semiconductor Eng High-density layout substrate for flip-chip package
US7057284B2 (en) * 2004-08-12 2006-06-06 Texas Instruments Incorporated Fine pitch low-cost flip chip substrate

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