JP2007173834A5 - - Google Patents
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- Publication number
- JP2007173834A5 JP2007173834A5 JP2006344661A JP2006344661A JP2007173834A5 JP 2007173834 A5 JP2007173834 A5 JP 2007173834A5 JP 2006344661 A JP2006344661 A JP 2006344661A JP 2006344661 A JP2006344661 A JP 2006344661A JP 2007173834 A5 JP2007173834 A5 JP 2007173834A5
- Authority
- JP
- Japan
- Prior art keywords
- active region
- well
- eeprom
- floating gate
- erase
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 claims 17
- 239000012535 impurity Substances 0.000 claims 12
- 239000004065 semiconductor Substances 0.000 claims 12
- 239000003990 capacitor Substances 0.000 claims 4
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| KR10-2005-0127770 | 2005-12-22 | ||
| KR1020050127770A KR100660901B1 (ko) | 2005-12-22 | 2005-12-22 | 단일 게이트 구조를 갖는 이이피롬, 상기 이이피롬의동작방법 및 상기 이이피롬의 제조방법 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007173834A JP2007173834A (ja) | 2007-07-05 |
| JP2007173834A5 true JP2007173834A5 (enExample) | 2010-02-12 |
| JP5259081B2 JP5259081B2 (ja) | 2013-08-07 |
Family
ID=37815403
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006344661A Expired - Fee Related JP5259081B2 (ja) | 2005-12-22 | 2006-12-21 | 単一ゲート構造を有するeeprom、該eepromの動作方法及び該eepromの製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (2) | US7593261B2 (enExample) |
| JP (1) | JP5259081B2 (enExample) |
| KR (1) | KR100660901B1 (enExample) |
| CN (1) | CN101013701A (enExample) |
| DE (1) | DE102006062381B4 (enExample) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE102005002739B4 (de) | 2005-01-20 | 2010-11-25 | Infineon Technologies Ag | Verfahren zum Herstellen eines Feldeffekttransistors, Tunnel-Feldeffekttransistor und integrierte Schaltungsanordnung mit mindestens einem Feldeffekttransistor |
| KR100660901B1 (ko) * | 2005-12-22 | 2006-12-26 | 삼성전자주식회사 | 단일 게이트 구조를 갖는 이이피롬, 상기 이이피롬의동작방법 및 상기 이이피롬의 제조방법 |
| US8472251B2 (en) * | 2008-02-11 | 2013-06-25 | Aplus Flash Technology, Inc. | Single-polycrystalline silicon electrically erasable and programmable nonvolatile memory device |
| US7989875B2 (en) * | 2008-11-24 | 2011-08-02 | Nxp B.V. | BiCMOS integration of multiple-times-programmable non-volatile memories |
| KR20100072979A (ko) * | 2008-12-22 | 2010-07-01 | 주식회사 동부하이텍 | 싱글 게이트 구조의 반도체 메모리 소자 |
| JP5467809B2 (ja) * | 2009-07-16 | 2014-04-09 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP2011176163A (ja) | 2010-02-25 | 2011-09-08 | Panasonic Corp | 不揮発性半導体記憶装置 |
| US8199578B2 (en) * | 2010-06-03 | 2012-06-12 | Ememory Technology Inc. | Single polysilicon layer non-volatile memory and operating method thereof |
| KR101291750B1 (ko) | 2011-10-14 | 2013-07-31 | 주식회사 동부하이텍 | 이이피롬과 그 제조 방법 |
| JP5690873B2 (ja) * | 2013-06-07 | 2015-03-25 | イーメモリー テクノロジー インコーポレイテッド | 消去可能プログラム可能単一ポリ不揮発性メモリ |
| US9450052B1 (en) * | 2015-07-01 | 2016-09-20 | Chengdu Monolithic Power Systems Co., Ltd. | EEPROM memory cell with a coupler region and method of making the same |
| JP6954854B2 (ja) * | 2017-03-31 | 2021-10-27 | 旭化成エレクトロニクス株式会社 | 不揮発性記憶素子および基準電圧生成回路 |
| US10896979B2 (en) * | 2017-09-28 | 2021-01-19 | International Business Machines Corporation | Compact vertical injection punch through floating gate analog memory and a manufacture thereof |
| US10685716B1 (en) * | 2019-04-11 | 2020-06-16 | Yield Microelectronics Corp. | Method of fast erasing low-current EEPROM array |
| IT202100008075A1 (it) * | 2021-03-31 | 2022-10-01 | St Microelectronics Srl | Memoria non volatile a singolo poly, porta flottante, programmabile poche volte e relativo metodo di polarizzazone |
| US11984165B2 (en) * | 2022-05-24 | 2024-05-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Memory device with reduced area |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5640346A (en) | 1992-03-03 | 1997-06-17 | Harris Corporation | Electrically programmable memory cell |
| US5523964A (en) * | 1994-04-07 | 1996-06-04 | Symetrix Corporation | Ferroelectric non-volatile memory unit |
| JP2596695B2 (ja) * | 1993-05-07 | 1997-04-02 | インターナショナル・ビジネス・マシーンズ・コーポレイション | Eeprom |
| US5615150A (en) * | 1995-11-02 | 1997-03-25 | Advanced Micro Devices, Inc. | Control gate-addressed CMOS non-volatile cell that programs through gates of CMOS transistors |
| US5587945A (en) * | 1995-11-06 | 1996-12-24 | Advanced Micro Devices, Inc. | CMOS EEPROM cell with tunneling window in the read path |
| US5646901A (en) | 1996-03-26 | 1997-07-08 | Advanced Micro Devices, Inc. | CMOS memory cell with tunneling during program and erase through the NMOS and PMOS transistors and a pass gate separating the NMOS and PMOS transistors |
| US6005270A (en) * | 1997-11-10 | 1999-12-21 | Sony Corporation | Semiconductor nonvolatile memory device and method of production of same |
| US5886920A (en) * | 1997-12-01 | 1999-03-23 | Motorola, Inc. | Variable conducting element and method of programming |
| US6198652B1 (en) * | 1998-04-13 | 2001-03-06 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor integrated memory device |
| US5969992A (en) | 1998-12-21 | 1999-10-19 | Vantis Corporation | EEPROM cell using P-well for tunneling across a channel |
| JP4212178B2 (ja) * | 1999-03-12 | 2009-01-21 | 株式会社東芝 | 半導体集積回路の製造方法 |
| US6326663B1 (en) | 1999-03-26 | 2001-12-04 | Vantis Corporation | Avalanche injection EEPROM memory cell with P-type control gate |
| JP3377762B2 (ja) * | 1999-05-19 | 2003-02-17 | 株式会社半導体理工学研究センター | 強誘電体不揮発性メモリ |
| JP2001085660A (ja) * | 1999-09-10 | 2001-03-30 | Toshiba Corp | 固体撮像装置及びその制御方法 |
| JP2001185633A (ja) * | 1999-12-15 | 2001-07-06 | Texas Instr Inc <Ti> | Eepromデバイス |
| JP3762658B2 (ja) * | 2001-05-17 | 2006-04-05 | シャープ株式会社 | 不揮発性半導体記憶装置の駆動方法 |
| JP4859292B2 (ja) * | 2001-07-02 | 2012-01-25 | 富士通セミコンダクター株式会社 | 半導体集積回路装置およびnand型不揮発性半導体装置 |
| JP2005353984A (ja) | 2004-06-14 | 2005-12-22 | Seiko Epson Corp | 不揮発性記憶装置 |
| US7098499B2 (en) * | 2004-08-16 | 2006-08-29 | Chih-Hsin Wang | Electrically alterable non-volatile memory cell |
| KR100660901B1 (ko) * | 2005-12-22 | 2006-12-26 | 삼성전자주식회사 | 단일 게이트 구조를 갖는 이이피롬, 상기 이이피롬의동작방법 및 상기 이이피롬의 제조방법 |
-
2005
- 2005-12-22 KR KR1020050127770A patent/KR100660901B1/ko not_active Expired - Fee Related
-
2006
- 2006-12-21 JP JP2006344661A patent/JP5259081B2/ja not_active Expired - Fee Related
- 2006-12-22 CN CNA2006100643942A patent/CN101013701A/zh active Pending
- 2006-12-22 US US11/643,837 patent/US7593261B2/en not_active Expired - Fee Related
- 2006-12-22 DE DE102006062381A patent/DE102006062381B4/de not_active Expired - Fee Related
-
2009
- 2009-08-18 US US12/542,787 patent/US8050091B2/en not_active Expired - Fee Related
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