JP2007172739A - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置 Download PDFInfo
- Publication number
- JP2007172739A JP2007172739A JP2005368793A JP2005368793A JP2007172739A JP 2007172739 A JP2007172739 A JP 2007172739A JP 2005368793 A JP2005368793 A JP 2005368793A JP 2005368793 A JP2005368793 A JP 2005368793A JP 2007172739 A JP2007172739 A JP 2007172739A
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- JP
- Japan
- Prior art keywords
- memory
- management
- nonvolatile semiconductor
- memory cell
- bit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 26
- 230000015654 memory Effects 0.000 claims abstract description 119
- 238000000034 method Methods 0.000 claims abstract description 5
- 230000003936 working memory Effects 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 5
- 230000007257 malfunction Effects 0.000 description 5
- 230000008878 coupling Effects 0.000 description 4
- 238000010168 coupling process Methods 0.000 description 4
- 238000005859 coupling reaction Methods 0.000 description 4
- 238000003491 array Methods 0.000 description 3
- 230000000630 rising effect Effects 0.000 description 2
- 239000003990 capacitor Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000013507 mapping Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/26—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/08—Address circuits; Decoders; Word-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
- G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
Abstract
【解決手段】メモリを構成する1ビットは、複数個のメモリセル1〜4で構成され、該メモリセルは、メインのメモリのメモリセルと同一の構造を有し、隣接するビットの隣接ビット線のいずれか一方のビット線8は、読み出し時において常時非選択となる不揮発性半導体記憶装置が、メインのメモリと共に同一のプロセスにより1チィップ上に作製されて構成される。
【選択図】 図1
Description
5〜8 ビット線
9〜12 ビット線選択トランジスタ
13 ビット線グループ選択トランジスタ
14 センスアンプ・ラッチ回路
15 ビット選択回路
16、17 選択線
18 ワード線群
19 ワードドライバ
20 ダミーワード線群
21 Vss線
22 ビット線間結合容量
Claims (4)
- メインのメモリと、前記メインのメモリのオペレーション管理を行うための内部処理用コンディションデータを蓄積する管理用メモリとを有する不揮発性半導体記憶装置において、
前記管理用メモリの1ビットは、複数個のメモリセルで構成され、
前記複数個のメモリセルは、ワード線に沿って一列に配置され、ワード線及びビット線方向に所定の数だけアレイ状に展開され、
前記ワード線は、ワードドライバにより読み出し駆動され、前記ビット線は、読み出しされた出力信号を、ビット線選択トランジスタを介して読み出し回路へ伝達して読み出し動作が行われ、
前記読み出し動作時に、互いに隣接するビット間で隣のビットと隣接し合ういずれか一方のメモリセルが、読み出し動作において非選択となること特徴とする不揮発性半導体記憶装置。 - 請求項1に記載の不揮発性半導体記憶装置において、
前記管理用メモリのメモリセルアレイは、前記管理用メモリとして動作する実働メモリセルエリアと、メモリとしては動作しないダミーメモリセルエリアとを有することを特徴とする不揮発性半導体記憶装置。 - 請求項1又は2に記載の不揮発性半導体記憶装置において、
前記メモリセルは、前記メインのメモリのメモリセルと同一の構造を有し、
前記管理用メモリは、前記メインのメモリと共に同一のプロセスにより1チィップ上に作製されて構成されることを特徴とする不揮発性半導体記憶装置。 - 請求項1乃至3のいずれかに記載の不揮発性半導体記憶装置において、前記メモリセルは、フラッシュメモリセル構造を有することを特徴とする不揮発性半導体記憶装置。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005368793A JP4939804B2 (ja) | 2005-12-21 | 2005-12-21 | 不揮発性半導体記憶装置 |
KR1020060080685A KR100794662B1 (ko) | 2005-12-21 | 2006-08-24 | 불휘발성 반도체 메모리 장치 |
US11/612,173 US7499318B2 (en) | 2005-12-21 | 2006-12-18 | Nonvolatile semiconductor memory device having a management memory capable of suppressing bitline interference during a read operation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005368793A JP4939804B2 (ja) | 2005-12-21 | 2005-12-21 | 不揮発性半導体記憶装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007172739A true JP2007172739A (ja) | 2007-07-05 |
JP4939804B2 JP4939804B2 (ja) | 2012-05-30 |
Family
ID=38173236
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005368793A Active JP4939804B2 (ja) | 2005-12-21 | 2005-12-21 | 不揮発性半導体記憶装置 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7499318B2 (ja) |
JP (1) | JP4939804B2 (ja) |
KR (1) | KR100794662B1 (ja) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8335307B2 (en) | 2008-02-08 | 2012-12-18 | Grape Technology Group, Inc. | System and method for improved directory assistance including re-dial feature |
KR102400098B1 (ko) * | 2017-01-25 | 2022-05-23 | 삼성전자주식회사 | 비휘발성 메모리 장치 및 상기 비휘발성 메모리 장치의 프로그램 방법 |
KR102490567B1 (ko) * | 2018-03-27 | 2023-01-20 | 에스케이하이닉스 주식회사 | 디스터번스를 방지하는 반도체 메모리 장치 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05226340A (ja) * | 1991-11-28 | 1993-09-03 | Samsung Electron Co Ltd | 半導体メモリ装置 |
JPH0730000A (ja) * | 1993-07-09 | 1995-01-31 | Toshiba Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP2001043143A (ja) * | 1997-09-30 | 2001-02-16 | Sony Corp | 記憶装置、データ処理システム並びにデータの書き込み及び読み出し方法 |
JP2001176275A (ja) * | 1999-12-14 | 2001-06-29 | Sony Corp | 不揮発性半導体記憶装置およびその読み出し方法 |
JP2002288988A (ja) * | 2001-03-28 | 2002-10-04 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JP2005259334A (ja) * | 2004-02-10 | 2005-09-22 | Semiconductor Energy Lab Co Ltd | 不揮発性メモリ |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2721185B2 (ja) | 1988-07-25 | 1998-03-04 | 株式会社東芝 | リブ導波路型発光半導体装置 |
JP3397499B2 (ja) * | 1994-12-12 | 2003-04-14 | 株式会社東芝 | 半導体記憶装置 |
JPH09245493A (ja) * | 1996-03-07 | 1997-09-19 | Hitachi Ltd | 不揮発性半導体記憶装置 |
KR100206709B1 (ko) * | 1996-09-21 | 1999-07-01 | 윤종용 | 멀티비트 불휘발성 반도체 메모리의 셀 어레이의 구조 및 그의 구동방법 |
KR100256053B1 (ko) * | 1997-11-20 | 2000-05-01 | 윤종용 | 트리플 웰 구조를 갖는 반도체 메모리 장치의 레이 아웃 |
JP2004087002A (ja) * | 2002-08-27 | 2004-03-18 | Fujitsu Ltd | Acセンス方式のメモリ回路 |
JP2004095001A (ja) * | 2002-08-29 | 2004-03-25 | Fujitsu Ltd | 不揮発性半導体記憶装置、不揮発性半導体記憶装置組込システムおよび不良ブロック検出方法 |
JP2004193483A (ja) | 2002-12-13 | 2004-07-08 | Renesas Technology Corp | 半導体記憶装置 |
-
2005
- 2005-12-21 JP JP2005368793A patent/JP4939804B2/ja active Active
-
2006
- 2006-08-24 KR KR1020060080685A patent/KR100794662B1/ko active IP Right Grant
- 2006-12-18 US US11/612,173 patent/US7499318B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05226340A (ja) * | 1991-11-28 | 1993-09-03 | Samsung Electron Co Ltd | 半導体メモリ装置 |
JPH0730000A (ja) * | 1993-07-09 | 1995-01-31 | Toshiba Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP2001043143A (ja) * | 1997-09-30 | 2001-02-16 | Sony Corp | 記憶装置、データ処理システム並びにデータの書き込み及び読み出し方法 |
JP2001176275A (ja) * | 1999-12-14 | 2001-06-29 | Sony Corp | 不揮発性半導体記憶装置およびその読み出し方法 |
JP2002288988A (ja) * | 2001-03-28 | 2002-10-04 | Mitsubishi Electric Corp | 不揮発性半導体記憶装置 |
JP2005259334A (ja) * | 2004-02-10 | 2005-09-22 | Semiconductor Energy Lab Co Ltd | 不揮発性メモリ |
Also Published As
Publication number | Publication date |
---|---|
US20070139990A1 (en) | 2007-06-21 |
KR20070066840A (ko) | 2007-06-27 |
KR100794662B1 (ko) | 2008-01-14 |
JP4939804B2 (ja) | 2012-05-30 |
US7499318B2 (en) | 2009-03-03 |
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