JP2007053119A - 半導体ウェーハの製造方法および半導体ウェーハ - Google Patents

半導体ウェーハの製造方法および半導体ウェーハ Download PDF

Info

Publication number
JP2007053119A
JP2007053119A JP2002247560A JP2002247560A JP2007053119A JP 2007053119 A JP2007053119 A JP 2007053119A JP 2002247560 A JP2002247560 A JP 2002247560A JP 2002247560 A JP2002247560 A JP 2002247560A JP 2007053119 A JP2007053119 A JP 2007053119A
Authority
JP
Japan
Prior art keywords
grinding
semiconductor wafer
wafer
polishing
ddg
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002247560A
Other languages
English (en)
Japanese (ja)
Inventor
Georg J Pietsch
ヨット ピーチュ ゲオルク
Michael Kerstan
ケルスタン ミヒャエル
Anton Huber
フーバー アントン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siltronic AG
Original Assignee
Siltronic AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siltronic AG filed Critical Siltronic AG
Publication of JP2007053119A publication Critical patent/JP2007053119A/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002Preparing wafers
    • H01L21/02005Preparing bulk and homogeneous wafers
    • H01L21/02008Multistep processes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304Mechanical treatment, e.g. grinding, polishing, cutting
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
JP2002247560A 2001-08-30 2002-08-27 半導体ウェーハの製造方法および半導体ウェーハ Pending JP2007053119A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10142400A DE10142400B4 (de) 2001-08-30 2001-08-30 Halbleiterscheibe mit verbesserter lokaler Ebenheit und Verfahren zu deren Herstellung

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010171493A Division JP5358531B2 (ja) 2001-08-30 2010-07-30 半導体ウェーハの製造方法

Publications (1)

Publication Number Publication Date
JP2007053119A true JP2007053119A (ja) 2007-03-01

Family

ID=7697042

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2002247560A Pending JP2007053119A (ja) 2001-08-30 2002-08-27 半導体ウェーハの製造方法および半導体ウェーハ
JP2010171493A Expired - Lifetime JP5358531B2 (ja) 2001-08-30 2010-07-30 半導体ウェーハの製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2010171493A Expired - Lifetime JP5358531B2 (ja) 2001-08-30 2010-07-30 半導体ウェーハの製造方法

Country Status (6)

Country Link
US (1) US7077726B2 (th)
JP (2) JP2007053119A (th)
KR (1) KR100511381B1 (th)
CN (1) CN1265439C (th)
DE (1) DE10142400B4 (th)
TW (1) TW575929B (th)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009302408A (ja) * 2008-06-16 2009-12-24 Sumco Corp 半導体ウェーハの製造方法
JP2010109370A (ja) * 2008-10-29 2010-05-13 Siltronic Ag 半導体ウェーハの両面をポリッシングする方法
JP2014057081A (ja) * 2010-10-20 2014-03-27 Siltronic Ag 単結晶シリコンで構成された半導体ウェハを熱処理中に支持するための支持リング、該半導体ウェハの熱処理のための方法、および単結晶シリコンで構成された熱処理された半導体ウェハ

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4093793B2 (ja) * 2002-04-30 2008-06-04 信越半導体株式会社 半導体ウエーハの製造方法及びウエーハ
JP4092993B2 (ja) * 2002-09-13 2008-05-28 信越半導体株式会社 単結晶育成方法
US7597815B2 (en) * 2003-05-29 2009-10-06 Dressel Pte. Ltd. Process for producing a porous track membrane
DE10344602A1 (de) * 2003-09-25 2005-05-19 Siltronic Ag Verfahren zur Herstellung von Halbleiterscheiben
DE102004005702A1 (de) * 2004-02-05 2005-09-01 Siltronic Ag Halbleiterscheibe, Vorrichtung und Verfahren zur Herstellung der Halbleiterscheibe
DE102004031966A1 (de) * 2004-07-01 2006-01-19 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
DE102005046726B4 (de) * 2005-09-29 2012-02-02 Siltronic Ag Nichtpolierte monokristalline Siliziumscheibe und Verfahren zu ihrer Herstellung
US7662023B2 (en) * 2006-01-30 2010-02-16 Memc Electronic Materials, Inc. Double side wafer grinder and methods for assessing workpiece nanotopology
US7601049B2 (en) * 2006-01-30 2009-10-13 Memc Electronic Materials, Inc. Double side wafer grinder and methods for assessing workpiece nanotopology
US7930058B2 (en) * 2006-01-30 2011-04-19 Memc Electronic Materials, Inc. Nanotopography control and optimization using feedback from warp data
JP5518338B2 (ja) * 2006-01-30 2014-06-11 エムイーエムシー・エレクトロニック・マテリアルズ・インコーポレイテッド 加工対象物のナノトポロジを評価するためのウェハ両面グラインダ及び方法
DE102006062871B4 (de) * 2006-07-13 2012-06-21 Peter Wolters Gmbh Verfahren zum gleichzeitigen beidseitigen Schleifen mehrerer Halbleiterscheiben
DE102006062872B4 (de) * 2006-07-13 2012-06-14 Peter Wolters Gmbh Verfahren zum gleichzeitigen beidseitigen Schleifen mehrerer Halbleiterscheiben
DE102007030958B4 (de) 2007-07-04 2014-09-11 Siltronic Ag Verfahren zum Schleifen von Halbleiterscheiben
CH701168B1 (de) * 2007-08-17 2010-12-15 Kellenberger & Co Ag L Verfahren und Bearbeitungsmaschine zur Behandlung von Werkstücken.
JP2010073137A (ja) * 2008-09-22 2010-04-02 Nec Electronics Corp 半導体集積回路設計方法及び設計プログラム
DE102009025243B4 (de) 2009-06-17 2011-11-17 Siltronic Ag Verfahren zur Herstellung und Verfahren zur Bearbeitung einer Halbleiterscheibe aus Silicium
DE102009051008B4 (de) * 2009-10-28 2013-05-23 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
DE102010005904B4 (de) * 2010-01-27 2012-11-22 Siltronic Ag Verfahren zur Herstellung einer Halbleiterscheibe
JP6045542B2 (ja) * 2014-09-11 2016-12-14 信越半導体株式会社 半導体ウェーハの加工方法、貼り合わせウェーハの製造方法、及びエピタキシャルウェーハの製造方法
CN106482692A (zh) * 2016-09-29 2017-03-08 广州兴森快捷电路科技有限公司 3d打印阻焊厚度均匀性的测试方法及测试装置
EP3364247A1 (en) 2017-02-17 2018-08-22 ASML Netherlands B.V. Methods & apparatus for monitoring a lithographic manufacturing process
CN112454014B (zh) * 2020-10-29 2022-10-11 中国工程物理研究院激光聚变研究中心 一种红外透明陶瓷晶粒尺寸的测量方法
CN112621557B (zh) * 2020-12-17 2022-08-09 江苏集萃精凯高端装备技术有限公司 Yag晶片的抛光方法
EP4047635A1 (de) 2021-02-18 2022-08-24 Siltronic AG Verfahren zur herstellung von scheiben aus einem zylindrischen stab aus halbleitermaterial
CN113611593B (zh) * 2021-08-02 2024-06-14 中国电子科技集团公司第四十六研究所 一种超薄锗片翘曲形貌的控制方法

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0226608Y2 (th) * 1985-10-23 1990-07-19
JPS63127872A (ja) * 1986-11-17 1988-05-31 Kobe Steel Ltd 薄板円板の鏡面加工方法
JPH02106259A (ja) * 1988-10-14 1990-04-18 Daisho Seiki Kk 両頭平面研削装置
JP2839801B2 (ja) * 1992-09-18 1998-12-16 三菱マテリアル株式会社 ウェーハの製造方法
JP3923107B2 (ja) * 1995-07-03 2007-05-30 株式会社Sumco シリコンウェーハの製造方法およびその装置
KR100227924B1 (ko) * 1995-07-28 1999-11-01 가이데 히사오 반도체 웨이퍼 제조방법, 그 방법에 사용되는 연삭방법 및 이에 사용되는 장치
JPH0976147A (ja) * 1995-09-08 1997-03-25 Kao Corp 表面加工基板及びその製造方法
JP3620554B2 (ja) * 1996-03-25 2005-02-16 信越半導体株式会社 半導体ウェーハ製造方法
JPH09270396A (ja) * 1996-03-29 1997-10-14 Komatsu Electron Metals Co Ltd 半導体ウェハの製法
JP3339545B2 (ja) * 1996-05-22 2002-10-28 信越半導体株式会社 半導体ウエーハの製造方法
DE19704546A1 (de) * 1997-02-06 1998-08-13 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer einseitig beschichteten und mit einem Finish versehenen Halbleiterscheibe
JPH10256203A (ja) * 1997-03-11 1998-09-25 Super Silicon Kenkyusho:Kk 鏡面仕上げされた薄板状ウェーハの製造方法
US6296553B1 (en) 1997-04-02 2001-10-02 Nippei Toyama Corporation Grinding method, surface grinder, workpiece support, mechanism and work rest
JPH11154655A (ja) * 1997-11-21 1999-06-08 Komatsu Electron Metals Co Ltd 半導体ウェハの製造方法
DE19823904A1 (de) * 1998-05-28 1999-12-02 Wacker Siltronic Halbleitermat Hochebene Halbleiterscheibe aus Silicium und Verfahren zur Herstellung von Halbleiterscheiben
JP3328193B2 (ja) 1998-07-08 2002-09-24 信越半導体株式会社 半導体ウエーハの製造方法
DE19833257C1 (de) * 1998-07-23 1999-09-30 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer Halbleiterscheibe
JP3664593B2 (ja) * 1998-11-06 2005-06-29 信越半導体株式会社 半導体ウエーハおよびその製造方法
JP4493062B2 (ja) * 1999-06-30 2010-06-30 株式会社Sumco 両面研磨ウェーハの製造方法
JP3794538B2 (ja) * 1999-09-02 2006-07-05 信越半導体株式会社 両面同時研削装置および両面同時研削方法
US6726525B1 (en) * 1999-09-24 2004-04-27 Shin-Estu Handotai Co., Ltd. Method and device for grinding double sides of thin disk work

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009302408A (ja) * 2008-06-16 2009-12-24 Sumco Corp 半導体ウェーハの製造方法
JP2010109370A (ja) * 2008-10-29 2010-05-13 Siltronic Ag 半導体ウェーハの両面をポリッシングする方法
US9224613B2 (en) 2008-10-29 2015-12-29 Siltronic Ag Method for polishing both sides of a semiconductor wafer
JP2014057081A (ja) * 2010-10-20 2014-03-27 Siltronic Ag 単結晶シリコンで構成された半導体ウェハを熱処理中に支持するための支持リング、該半導体ウェハの熱処理のための方法、および単結晶シリコンで構成された熱処理された半導体ウェハ

Also Published As

Publication number Publication date
TW575929B (en) 2004-02-11
DE10142400B4 (de) 2009-09-03
US20030060050A1 (en) 2003-03-27
JP5358531B2 (ja) 2013-12-04
CN1265439C (zh) 2006-07-19
KR20030019144A (ko) 2003-03-06
JP2010283371A (ja) 2010-12-16
DE10142400A1 (de) 2003-03-27
CN1434489A (zh) 2003-08-06
US7077726B2 (en) 2006-07-18
KR100511381B1 (ko) 2005-08-31

Similar Documents

Publication Publication Date Title
JP5358531B2 (ja) 半導体ウェーハの製造方法
US7250368B2 (en) Semiconductor wafer manufacturing method and wafer
Pei et al. Grinding of silicon wafers: a review from historical perspectives
US6884154B2 (en) Method for apparatus for polishing outer peripheral chamfered part of wafer
US7867059B2 (en) Semiconductor wafer, apparatus and process for producing the semiconductor wafer
KR101002250B1 (ko) 에피택셜 웨이퍼 제조 방법
JP3400765B2 (ja) 半導体ウェハの製造方法および該製造方法の使用
JP5538253B2 (ja) 半導体ウェハの製造方法
KR100818683B1 (ko) 경면 면취 웨이퍼, 경면 면취용 연마 클로스 및 경면 면취연마장치 및 방법
US6284658B1 (en) Manufacturing process for semiconductor wafer
CN112513348B (zh) SiC晶片和SiC晶片的制造方法
JP2007306000A (ja) 異形成形されたエッジを備えた半導体ウェーハを製作するための方法
EP1145296B1 (en) Semiconductor wafer manufacturing method
US20030060020A1 (en) Method and apparatus for finishing substrates for wafer to wafer bonding
JPH10180624A (ja) ラッピング装置及び方法
JP4133935B2 (ja) シリコンウエハの加工方法
US6599760B2 (en) Epitaxial semiconductor wafer manufacturing method
TWI427690B (zh) 雙面化學研磨半導體晶圓的方法
KR20150073214A (ko) 연마물의 제조 방법
JP3648239B2 (ja) シリコンウエハの製造方法
KR101086966B1 (ko) 반도체 웨이퍼 연마방법
WO2000047369A1 (en) Method of polishing semiconductor wafers
CN114667594A (zh) 晶片的研磨方法及硅晶片
JP2010153844A (ja) 活性層用ウェーハの製造方法

Legal Events

Date Code Title Description
A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070202

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20070323

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20070328

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070720

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20080403

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080729

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20080812

A912 Re-examination (zenchi) completed and case transferred to appeal board

Free format text: JAPANESE INTERMEDIATE CODE: A912

Effective date: 20081031

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20100506

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20100511

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20100512

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20100602

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20100607

A601 Written request for extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A601

Effective date: 20100705

A602 Written permission of extension of time

Free format text: JAPANESE INTERMEDIATE CODE: A602

Effective date: 20100708

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20100730

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20101227

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20101228