JP2006524431A - デュアルメタルゲート電極を有するｃｍｏｓデバイスの製造方法 - Google Patents

デュアルメタルゲート電極を有するｃｍｏｓデバイスの製造方法 Download PDF

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JP2006524431A
JP2006524431A JP2006508066A JP2006508066A JP2006524431A JP 2006524431 A JP2006524431 A JP 2006524431A JP 2006508066 A JP2006508066 A JP 2006508066A JP 2006508066 A JP2006508066 A JP 2006508066A JP 2006524431 A JP2006524431 A JP 2006524431A
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Prior art keywords
metal
buffer layer
gate
work function
alloy
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JP2006508066A
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Japanese (ja)
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JP2006524431A5 (enExample
Inventor
ソ パク，チャン
ジン チョ，ビュン
ナラヤナン，バラスブラマニアン
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National University of Singapore
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National University of Singapore
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Publication of JP2006524431A publication Critical patent/JP2006524431A/ja
Publication of JP2006524431A5 publication Critical patent/JP2006524431A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/681—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered
    • H10D64/685—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator having a compositional variation, e.g. multilayered being perpendicular to the channel plane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28079—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a single metal, e.g. Ta, W, Mo, Al
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/665—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of elemental metal contacting the insulator, e.g. tungsten or molybdenum
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0177—Manufacturing their gate conductors the gate conductors having different materials or different implants
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2006508066A 2003-04-22 2004-04-19 デュアルメタルゲート電極を有するｃｍｏｓデバイスの製造方法 Pending JP2006524431A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US46493603P 2003-04-22 2003-04-22
PCT/SG2004/000100 WO2004095572A1 (en) 2003-04-22 2004-04-19 A method of fabricating a cmos device with dual metal gate electrodes

Publications (2)

Publication Number Publication Date
JP2006524431A true JP2006524431A (ja) 2006-10-26
JP2006524431A5 JP2006524431A5 (enExample) 2007-06-21

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JP2006508066A Pending JP2006524431A (ja) 2003-04-22 2004-04-19 デュアルメタルゲート電極を有するｃｍｏｓデバイスの製造方法

Country Status (3)

Country Link
US (1) US7316950B2 (enExample)
JP (1) JP2006524431A (enExample)
WO (1) WO2004095572A1 (enExample)

Cited By (1)

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JP2006196610A (ja) * 2005-01-12 2006-07-27 Fujitsu Ltd 半導体装置及びその製造方法

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US7018883B2 (en) * 2004-05-05 2006-03-28 Taiwan Semiconductor Manufacturing Company, Ltd. Dual work function gate electrodes
US7528024B2 (en) * 2004-05-24 2009-05-05 Texas Instruments Incorporated Dual work function metal gate integration in semiconductor devices
JP2008510296A (ja) * 2004-08-13 2008-04-03 コーニンクレッカ フィリップス エレクトロニクス エヌ ヴィ デュアル・ゲートｃｍｏｓの製造
US7432553B2 (en) * 2005-01-19 2008-10-07 International Business Machines Corporation Structure and method to optimize strain in CMOSFETs
US20070048920A1 (en) * 2005-08-25 2007-03-01 Sematech Methods for dual metal gate CMOS integration
US7332433B2 (en) * 2005-09-22 2008-02-19 Sematech Inc. Methods of modulating the work functions of film layers
JP2007123548A (ja) 2005-10-28 2007-05-17 Renesas Technology Corp 半導体装置の製造方法
US7425497B2 (en) * 2006-01-20 2008-09-16 International Business Machines Corporation Introduction of metal impurity to change workfunction of conductive electrodes
US8008144B2 (en) 2006-05-11 2011-08-30 Micron Technology, Inc. Dual work function recessed access device and methods of forming
US20070262395A1 (en) 2006-05-11 2007-11-15 Gibbons Jasper S Memory cell access devices and methods of making the same
US8860174B2 (en) * 2006-05-11 2014-10-14 Micron Technology, Inc. Recessed antifuse structures and methods of making the same
US7378713B2 (en) * 2006-10-25 2008-05-27 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor devices with dual-metal gate structures and fabrication methods thereof
JP4271230B2 (ja) * 2006-12-06 2009-06-03 株式会社東芝 半導体装置
US7812414B2 (en) * 2007-01-23 2010-10-12 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid process for forming metal gates
KR100814372B1 (ko) * 2007-01-24 2008-03-18 삼성전자주식회사 반도체 장치의 제조 방법
JP2008205012A (ja) * 2007-02-16 2008-09-04 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US8536660B2 (en) * 2008-03-12 2013-09-17 Taiwan Semiconductor Manufacturing Company, Ltd. Hybrid process for forming metal gates of MOS devices
US7863126B2 (en) * 2008-05-15 2011-01-04 International Business Machines Corporation Fabrication of a CMOS structure with a high-k dielectric layer oxidizing an aluminum layer in PFET region
WO2009150557A1 (en) * 2008-06-11 2009-12-17 Nxp B.V. Semiconductor device manufacturing method an integrated circuit comprising such a device
US8524588B2 (en) 2008-08-18 2013-09-03 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a single metal that performs N work function and P work function in a high-k/metal gate process
US8778754B2 (en) * 2008-09-15 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a single metal that performs N and P work functions in high-K/metal gate devices
US7824986B2 (en) * 2008-11-05 2010-11-02 Micron Technology, Inc. Methods of forming a plurality of transistor gates, and methods of forming a plurality of transistor gates having at least two different work functions
US20110095379A1 (en) * 2009-10-28 2011-04-28 International Business Machines Corporation Scaling of metal gate with aluminum containing metal layer for threshold voltage shift
US8435878B2 (en) 2010-04-06 2013-05-07 International Business Machines Corporation Field effect transistor device and fabrication
US9269634B2 (en) 2011-05-16 2016-02-23 Globalfoundries Inc. Self-aligned metal gate CMOS with metal base layer and dummy gate structure
US9064865B2 (en) 2013-10-11 2015-06-23 Taiwan Semiconductor Manufacturing Co., Ltd. Mechanisms for forming gate dielectric layer
US20230268419A1 (en) * 2022-02-23 2023-08-24 Haitao Liu Devices having a transistor with a modified channel region

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JP2002110815A (ja) * 2000-09-27 2002-04-12 Toshiba Corp 半導体装置及びその製造方法
JP2002217313A (ja) * 2000-11-30 2002-08-02 Texas Instruments Inc 金属及び対応する金属珪化物から形成した各ゲートを有する相補形トランジスタ
JP2002252285A (ja) * 2000-12-29 2002-09-06 Hynix Semiconductor Inc 半導体素子の製造方法
JP2004503932A (ja) * 2000-06-12 2004-02-05 モトローラ・インコーポレイテッド Ｃｍｏｓプロセスのためのデュアルメタルゲートトランジスタ
JP2004228547A (ja) * 2002-11-29 2004-08-12 Sony Corp 半導体装置およびその製造方法

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JPS61140176A (ja) * 1984-12-13 1986-06-27 Semiconductor Energy Lab Co Ltd 半導体装置
US5989950A (en) * 1998-01-26 1999-11-23 Texas Instruments - Acer Incorporated Reduced mask CMOS salicided process
US6352913B1 (en) 1998-04-28 2002-03-05 Compaq Computer Corporation Damascene process for MOSFET fabrication
US6255204B1 (en) * 1999-05-21 2001-07-03 Motorola, Inc. Method for forming a semiconductor device
US6265302B1 (en) * 1999-07-12 2001-07-24 Chartered Semiconductor Manufacturing Ltd. Partially recessed shallow trench isolation method for fabricating borderless contacts
KR20020056260A (ko) * 2000-12-29 2002-07-10 박종섭 반도체 소자의 금속 게이트 형성방법
US6794252B2 (en) * 2001-09-28 2004-09-21 Texas Instruments Incorporated Method and system for forming dual work function gate electrodes in a semiconductor device
US6653698B2 (en) 2001-12-20 2003-11-25 International Business Machines Corporation Integration of dual workfunction metal gate CMOS devices
US6794234B2 (en) * 2002-01-30 2004-09-21 The Regents Of The University Of California Dual work function CMOS gate technology based on metal interdiffusion
US7045406B2 (en) * 2002-12-03 2006-05-16 Asm International, N.V. Method of forming an electrode with adjusted work function

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JP2004503932A (ja) * 2000-06-12 2004-02-05 モトローラ・インコーポレイテッド Ｃｍｏｓプロセスのためのデュアルメタルゲートトランジスタ
JP2002110815A (ja) * 2000-09-27 2002-04-12 Toshiba Corp 半導体装置及びその製造方法
JP2002217313A (ja) * 2000-11-30 2002-08-02 Texas Instruments Inc 金属及び対応する金属珪化物から形成した各ゲートを有する相補形トランジスタ
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Publication number Priority date Publication date Assignee Title
JP2006196610A (ja) * 2005-01-12 2006-07-27 Fujitsu Ltd 半導体装置及びその製造方法

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US20040245578A1 (en) 2004-12-09
US7316950B2 (en) 2008-01-08

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