JP5579828B2 - 金属High−kFETのためのデュアル金属およびデュアル誘電体集積 - Google Patents
金属High−kFETのためのデュアル金属およびデュアル誘電体集積 Download PDFInfo
- Publication number
- JP5579828B2 JP5579828B2 JP2012506148A JP2012506148A JP5579828B2 JP 5579828 B2 JP5579828 B2 JP 5579828B2 JP 2012506148 A JP2012506148 A JP 2012506148A JP 2012506148 A JP2012506148 A JP 2012506148A JP 5579828 B2 JP5579828 B2 JP 5579828B2
- Authority
- JP
- Japan
- Prior art keywords
- conductivity type
- type region
- gate dielectric
- metal gate
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 229910052751 metal Inorganic materials 0.000 title claims description 94
- 239000002184 metal Substances 0.000 title claims description 93
- 230000009977 dual effect Effects 0.000 title 2
- 230000010354 integration Effects 0.000 title 1
- 239000004020 conductor Substances 0.000 claims description 98
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 82
- 239000004065 semiconductor Substances 0.000 claims description 55
- 239000000758 substrate Substances 0.000 claims description 45
- 229910052757 nitrogen Inorganic materials 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 36
- 229920002120 photoresistant polymer Polymers 0.000 claims description 29
- 238000005530 etching Methods 0.000 claims description 22
- 150000004767 nitrides Chemical class 0.000 claims description 15
- 239000000463 material Substances 0.000 claims description 13
- 229910052735 hafnium Inorganic materials 0.000 claims description 6
- VBJZVLUMGGDVMO-UHFFFAOYSA-N hafnium atom Chemical compound [Hf] VBJZVLUMGGDVMO-UHFFFAOYSA-N 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 5
- 238000005121 nitriding Methods 0.000 claims description 4
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 2
- 229910021193 La 2 O 3 Inorganic materials 0.000 claims description 2
- BPQQTUXANYXVAA-UHFFFAOYSA-N Orthosilicate Chemical compound [O-][Si]([O-])([O-])[O-] BPQQTUXANYXVAA-UHFFFAOYSA-N 0.000 claims description 2
- 229910002367 SrTiO Inorganic materials 0.000 claims description 2
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 229910052741 iridium Inorganic materials 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052697 platinum Inorganic materials 0.000 claims description 2
- 229910052702 rhenium Inorganic materials 0.000 claims description 2
- 229910052703 rhodium Inorganic materials 0.000 claims description 2
- 229910052707 ruthenium Inorganic materials 0.000 claims description 2
- 229910052709 silver Inorganic materials 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- 229910052719 titanium Inorganic materials 0.000 claims description 2
- 229910052721 tungsten Inorganic materials 0.000 claims description 2
- 239000010410 layer Substances 0.000 description 36
- 239000003989 dielectric material Substances 0.000 description 26
- 230000005669 field effect Effects 0.000 description 11
- 238000002955 isolation Methods 0.000 description 11
- 230000008569 process Effects 0.000 description 10
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 8
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 7
- 239000010703 silicon Substances 0.000 description 7
- 229910004298 SiO 2 Inorganic materials 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 6
- 230000000694 effects Effects 0.000 description 5
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 4
- 238000005229 chemical vapour deposition Methods 0.000 description 4
- 238000011049 filling Methods 0.000 description 4
- 239000012535 impurity Substances 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 3
- 239000011230 binding agent Substances 0.000 description 3
- 239000000969 carrier Substances 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 238000004377 microelectronic Methods 0.000 description 3
- 239000001301 oxygen Substances 0.000 description 3
- 229910052760 oxygen Inorganic materials 0.000 description 3
- 239000002245 particle Substances 0.000 description 3
- -1 region Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229910052814 silicon oxide Inorganic materials 0.000 description 3
- 238000004544 sputter deposition Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 2
- KRHYYFGTRYWZRS-UHFFFAOYSA-M Fluoride anion Chemical compound [F-] KRHYYFGTRYWZRS-UHFFFAOYSA-M 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 2
- 229910000577 Silicon-germanium Inorganic materials 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052787 antimony Inorganic materials 0.000 description 2
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 2
- 229910052785 arsenic Inorganic materials 0.000 description 2
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 2
- 238000004380 ashing Methods 0.000 description 2
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 229910052796 boron Inorganic materials 0.000 description 2
- 230000000295 complement effect Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 239000003574 free electron Substances 0.000 description 2
- 229910052733 gallium Inorganic materials 0.000 description 2
- CJNBYAVZURUTKZ-UHFFFAOYSA-N hafnium(iv) oxide Chemical compound O=[Hf]=O CJNBYAVZURUTKZ-UHFFFAOYSA-N 0.000 description 2
- 239000012212 insulator Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229920003986 novolac Polymers 0.000 description 2
- 230000003647 oxidation Effects 0.000 description 2
- 238000007254 oxidation reaction Methods 0.000 description 2
- 229910052698 phosphorus Inorganic materials 0.000 description 2
- 239000011574 phosphorus Substances 0.000 description 2
- 238000000206 photolithography Methods 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 239000010936 titanium Substances 0.000 description 2
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 description 1
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 description 1
- PXGOKWXKJXAPGV-UHFFFAOYSA-N Fluorine Chemical compound FF PXGOKWXKJXAPGV-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 229910000673 Indium arsenide Inorganic materials 0.000 description 1
- CERQOIWHTDAKMF-UHFFFAOYSA-N Methacrylic acid Chemical compound CC(=C)C(O)=O CERQOIWHTDAKMF-UHFFFAOYSA-N 0.000 description 1
- 229910003811 SiGeC Inorganic materials 0.000 description 1
- CEPICIBPGDWCRU-UHFFFAOYSA-N [Si].[Hf] Chemical compound [Si].[Hf] CEPICIBPGDWCRU-UHFFFAOYSA-N 0.000 description 1
- 239000002253 acid Substances 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 230000003213 activating effect Effects 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- IVHJCRXBQPGLOV-UHFFFAOYSA-N azanylidynetungsten Chemical compound [W]#N IVHJCRXBQPGLOV-UHFFFAOYSA-N 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000000224 chemical solution deposition Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 239000011247 coating layer Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000000280 densification Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 229910052731 fluorine Inorganic materials 0.000 description 1
- 239000011737 fluorine Substances 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 229910052732 germanium Inorganic materials 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- RPQDHPTXJYYUPQ-UHFFFAOYSA-N indium arsenide Chemical compound [In]#[As] RPQDHPTXJYYUPQ-UHFFFAOYSA-N 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000001459 lithography Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910052914 metal silicate Inorganic materials 0.000 description 1
- 150000002739 metals Chemical class 0.000 description 1
- 229910003465 moissanite Inorganic materials 0.000 description 1
- 239000000178 monomer Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- JMOHEPRYPIIZQU-UHFFFAOYSA-N oxygen(2-);tantalum(2+) Chemical compound [O-2].[Ta+2] JMOHEPRYPIIZQU-UHFFFAOYSA-N 0.000 description 1
- 238000001020 plasma etching Methods 0.000 description 1
- 238000009832 plasma treatment Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000006116 polymerization reaction Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 150000004760 silicates Chemical class 0.000 description 1
- 229910010271 silicon carbide Inorganic materials 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 238000005549 size reduction Methods 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000007921 spray Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/51—Insulating materials associated therewith
- H01L29/517—Insulating materials associated therewith the insulating material comprising a metallic compound, e.g. metal oxide, metal silicate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/28008—Making conductor-insulator-semiconductor electrodes
- H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
- H01L21/28158—Making the insulator
- H01L21/28167—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
- H01L21/28185—Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation with a treatment, e.g. annealing, after the formation of the gate insulator and before the formation of the definitive gate conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823828—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
- H01L21/823842—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes gate conductors with different gate conductor materials or different gate conductor implants, e.g. dual gate structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
- H01L21/8238—Complementary field-effect transistors, e.g. CMOS
- H01L21/823857—Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the gate insulating layers, e.g. different gate insulating layer thicknesses, particular gate insulator materials or particular gate insulator implants
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Chemical & Material Sciences (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Electrodes Of Semiconductors (AREA)
- Thin Film Transistor (AREA)
Description
Claims (10)
- 半導体デバイスを形成する方法であって、
基板の第一導電型領域および第二導電型領域の上に、ゲート誘電体および第一金属ゲート導体を含むゲート構造を形成するステップと、
前記第一金属ゲート導体の前記第一導電型領域中に所在する部分を除去して、前記第一導電型領域中に所在する前記ゲート誘電体を露出させるステップであって、前記第一金属ゲート導体の残りの部分は前記第二導電型領域中に所在する、該ステップと、
前記第一導電型領域中に所在する前記ゲート誘電体、および前記第二導電型領域中に所在する前記第一金属ゲート導体を窒化するステップと、
少なくとも前記第一導電型領域中に所在する前記ゲート誘電体上を覆う第二金属ゲート導体を形成するステップと、
を含み、
前記窒化するステップは、窒素ベース・プラズマを印加するステップを含み、
前記窒素ベース・プラズマを前記印加するステップは、O 2 およびSiから成るラジカルを包含するN 2 /H 2 プラズマをさらに含む、
前記方法。 - 前記第一導電型領域が処理されて少なくとも一つのnFETデバイスが提供され、前記第二導電型領域が処理されて少なくとも一つのpFETデバイスが提供される、請求項1に記載の方法。
- 前記ゲート誘電体はHigh−kゲート誘電体から成る、請求項1に記載の方法。
- 前記第一金属ゲート導体の前記第一導電型領域中に所在する前記部分を除去して、前記第一導電型領域中に所在する前記ゲート誘電体を露出させるステップは、前記第二導電型領域上を覆うエッチング・マスクを形成し、前記第一導電型領域は露出させておく、前記マスクを形成するステップと、前記第一金属ゲート導体の前記第一導電型領域中に所在する前記部分を除去して、前記第一導電型領域中に所在する前記ゲート誘電体を露出させるステップと、前記エッチング・マスクを除去するステップとを含む、請求項1に記載の方法。
- 前記窒素ベース・プラズマは、前記第一導電型領域中に所在する前記ゲート誘電体を窒化し、前記第二導電型領域中に所在する前記第一金属ゲート導体を窒化し、前記ゲート誘電体の窒素含有量は0%〜50%の範囲にあり、前記第一金属ゲート導体の窒素含有量は0%〜60%の範囲にある、請求項1に記載の方法。
- 半導体デバイスを形成する方法であって、
基板の第一導電型領域および第二導電型領域の上に、ゲート誘電体および第一金属ゲート導体を含むゲート・スタックを形成するステップと、
前記第二導電型領域上を覆ってエッチング・マスクを形成し、前記第一導電型領域は露出させておく、前記マスクを形成するステップと、
前記第一金属ゲート導体の前記第一導電型領域中に所在する部分を除去して、前記第一導電型領域中に所在する前記ゲート誘電体を露出させるステップと、
前記エッチング・マスクを除去するステップと、
前記第一導電型領域中に所在する前記ゲート誘電体、および前記第二導電型領域中に所在する前記第一金属ゲート導体に対し窒素ベース・プラズマを印加するステップと、
少なくとも前記第一導電型領域中に所在する前記ゲート誘電体上を覆う第二金属ゲート導体を形成するステップと、
を含み、
前記窒素ベース・プラズマを前記基板に前記印加するステップはN 2 /H 2 プラズマを含む、
前記方法。 - 前記第一金属ゲート導体は、W、Ni、Ti、Mo、Ta、Cu、Pt、Ag、Au、Ru、Ir、Rh、およびReの少なくとも一つを含む、請求項6に記載の方法。
- 前記ゲート誘電体は、HfO2、ケイ酸ハフニウム、酸窒化ハフニウムシリコン、ZrO2、Al2O3、TiO2、La2O3、SrTiO3、LaAlO3、Y2O3、またはこれらの混合物を含む、請求項6に記載の方法。
- 前記エッチング・マスクはフォトレジスト材料から成る、請求項6に記載の方法。
- 前記窒素ベース・プラズマを前記基板に前記印加するステップはO2およびSiから成るラジカルをさらに含む、請求項6に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US12/423,236 | 2009-04-14 | ||
US12/423,236 US7943457B2 (en) | 2009-04-14 | 2009-04-14 | Dual metal and dual dielectric integration for metal high-k FETs |
PCT/US2010/030980 WO2010120842A1 (en) | 2009-04-14 | 2010-04-14 | Dual metal and dual dielectric integration for metal high-k fets |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2012524413A JP2012524413A (ja) | 2012-10-11 |
JP5579828B2 true JP5579828B2 (ja) | 2014-08-27 |
Family
ID=42933697
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2012506148A Expired - Fee Related JP5579828B2 (ja) | 2009-04-14 | 2010-04-14 | 金属High−kFETのためのデュアル金属およびデュアル誘電体集積 |
Country Status (7)
Country | Link |
---|---|
US (2) | US7943457B2 (ja) |
EP (1) | EP2419925B1 (ja) |
JP (1) | JP5579828B2 (ja) |
CN (1) | CN102341894A (ja) |
BR (1) | BRPI1006585A2 (ja) |
TW (1) | TWI476822B (ja) |
WO (1) | WO2010120842A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9786761B2 (en) | 2015-04-21 | 2017-10-10 | Samsung Electronics Co., Ltd. | Integrated circuit device having an interfacial layer and method of manufacturing the same |
Families Citing this family (68)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8106455B2 (en) * | 2009-04-30 | 2012-01-31 | International Business Machines Corporation | Threshold voltage adjustment through gate dielectric stack modification |
US8273617B2 (en) | 2009-09-30 | 2012-09-25 | Suvolta, Inc. | Electronic devices and systems, and methods for making and using the same |
US8421162B2 (en) | 2009-09-30 | 2013-04-16 | Suvolta, Inc. | Advanced transistors with punch through suppression |
US7943458B2 (en) * | 2009-10-06 | 2011-05-17 | International Business Machines Corporation | Methods for obtaining gate stacks with tunable threshold voltage and scaling |
US8530286B2 (en) | 2010-04-12 | 2013-09-10 | Suvolta, Inc. | Low power semiconductor transistor structure and method of fabrication thereof |
US8354313B2 (en) * | 2010-04-30 | 2013-01-15 | International Business Machines Corporation | Method to optimize work function in complementary metal oxide semiconductor (CMOS) structures |
US8569128B2 (en) | 2010-06-21 | 2013-10-29 | Suvolta, Inc. | Semiconductor structure and method of fabrication thereof with mixed metal types |
US8759872B2 (en) | 2010-06-22 | 2014-06-24 | Suvolta, Inc. | Transistor with threshold voltage set notch and method of fabrication thereof |
US8377783B2 (en) | 2010-09-30 | 2013-02-19 | Suvolta, Inc. | Method for reducing punch-through in a transistor device |
US8404551B2 (en) | 2010-12-03 | 2013-03-26 | Suvolta, Inc. | Source/drain extension control for advanced transistors |
US8461875B1 (en) | 2011-02-18 | 2013-06-11 | Suvolta, Inc. | Digital circuits having improved transistors, and methods therefor |
US8525271B2 (en) | 2011-03-03 | 2013-09-03 | Suvolta, Inc. | Semiconductor structure with improved channel stack and method for fabrication thereof |
TWI566300B (zh) * | 2011-03-23 | 2017-01-11 | 斯克林集團公司 | 熱處理方法及熱處理裝置 |
US8400219B2 (en) | 2011-03-24 | 2013-03-19 | Suvolta, Inc. | Analog circuits having improved transistors, and methods therefor |
US8748270B1 (en) | 2011-03-30 | 2014-06-10 | Suvolta, Inc. | Process for manufacturing an improved analog transistor |
US8999861B1 (en) | 2011-05-11 | 2015-04-07 | Suvolta, Inc. | Semiconductor structure with substitutional boron and method for fabrication thereof |
US8796048B1 (en) | 2011-05-11 | 2014-08-05 | Suvolta, Inc. | Monitoring and measurement of thin film layers |
US8811068B1 (en) | 2011-05-13 | 2014-08-19 | Suvolta, Inc. | Integrated circuit devices and methods |
US8569156B1 (en) | 2011-05-16 | 2013-10-29 | Suvolta, Inc. | Reducing or eliminating pre-amorphization in transistor manufacture |
US8735987B1 (en) | 2011-06-06 | 2014-05-27 | Suvolta, Inc. | CMOS gate stack structures and processes |
US8995204B2 (en) | 2011-06-23 | 2015-03-31 | Suvolta, Inc. | Circuit devices and methods having adjustable transistor body bias |
US8629016B1 (en) | 2011-07-26 | 2014-01-14 | Suvolta, Inc. | Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer |
US8748986B1 (en) | 2011-08-05 | 2014-06-10 | Suvolta, Inc. | Electronic device with controlled threshold voltage |
WO2013022753A2 (en) | 2011-08-05 | 2013-02-14 | Suvolta, Inc. | Semiconductor devices having fin structures and fabrication methods thereof |
US8645878B1 (en) | 2011-08-23 | 2014-02-04 | Suvolta, Inc. | Porting a circuit design from a first semiconductor process to a second semiconductor process |
US8614128B1 (en) | 2011-08-23 | 2013-12-24 | Suvolta, Inc. | CMOS structures and processes based on selective thinning |
US8713511B1 (en) | 2011-09-16 | 2014-04-29 | Suvolta, Inc. | Tools and methods for yield-aware semiconductor manufacturing process target generation |
US9236466B1 (en) | 2011-10-07 | 2016-01-12 | Mie Fujitsu Semiconductor Limited | Analog circuits having improved insulated gate transistors, and methods therefor |
US9595443B2 (en) | 2011-10-20 | 2017-03-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Metal gate structure of a semiconductor device |
US8895327B1 (en) | 2011-12-09 | 2014-11-25 | Suvolta, Inc. | Tipless transistors, short-tip transistors, and methods and circuits therefor |
US8819603B1 (en) | 2011-12-15 | 2014-08-26 | Suvolta, Inc. | Memory circuits and methods of making and designing the same |
US8883600B1 (en) | 2011-12-22 | 2014-11-11 | Suvolta, Inc. | Transistor having reduced junction leakage and methods of forming thereof |
US8599623B1 (en) | 2011-12-23 | 2013-12-03 | Suvolta, Inc. | Circuits and methods for measuring circuit elements in an integrated circuit device |
US8877619B1 (en) | 2012-01-23 | 2014-11-04 | Suvolta, Inc. | Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom |
US8970289B1 (en) | 2012-01-23 | 2015-03-03 | Suvolta, Inc. | Circuits and devices for generating bi-directional body bias voltages, and methods therefor |
US9093550B1 (en) | 2012-01-31 | 2015-07-28 | Mie Fujitsu Semiconductor Limited | Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same |
US9406567B1 (en) | 2012-02-28 | 2016-08-02 | Mie Fujitsu Semiconductor Limited | Method for fabricating multiple transistor devices on a substrate with varying threshold voltages |
US8863064B1 (en) | 2012-03-23 | 2014-10-14 | Suvolta, Inc. | SRAM cell layout structure and devices therefrom |
US9299698B2 (en) | 2012-06-27 | 2016-03-29 | Mie Fujitsu Semiconductor Limited | Semiconductor structure with multiple transistors having various threshold voltages |
US8941177B2 (en) | 2012-06-27 | 2015-01-27 | International Business Machines Corporation | Semiconductor devices having different gate oxide thicknesses |
KR20140016694A (ko) * | 2012-07-31 | 2014-02-10 | 삼성전자주식회사 | 반도체 장치 및 이의 제조 방법 |
US8637955B1 (en) | 2012-08-31 | 2014-01-28 | Suvolta, Inc. | Semiconductor structure with reduced junction leakage and method of fabrication thereof |
US9112057B1 (en) | 2012-09-18 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Semiconductor devices with dopant migration suppression and method of fabrication thereof |
US9041126B2 (en) | 2012-09-21 | 2015-05-26 | Mie Fujitsu Semiconductor Limited | Deeply depleted MOS transistors having a screening layer and methods thereof |
US8829616B2 (en) | 2012-10-25 | 2014-09-09 | International Business Machines Corporation | Method and structure for body contacted FET with reduced body resistance and source to drain contact leakage |
WO2014071049A2 (en) | 2012-10-31 | 2014-05-08 | Suvolta, Inc. | Dram-type device with low variation transistor peripheral circuits, and related methods |
US8816754B1 (en) | 2012-11-02 | 2014-08-26 | Suvolta, Inc. | Body bias circuits and methods |
US9093997B1 (en) | 2012-11-15 | 2015-07-28 | Mie Fujitsu Semiconductor Limited | Slew based process and bias monitors and related methods |
US9070477B1 (en) | 2012-12-12 | 2015-06-30 | Mie Fujitsu Semiconductor Limited | Bit interleaved low voltage static random access memory (SRAM) and related methods |
US9112484B1 (en) | 2012-12-20 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Integrated circuit process and bias monitors and related methods |
US9268885B1 (en) | 2013-02-28 | 2016-02-23 | Mie Fujitsu Semiconductor Limited | Integrated circuit device methods and models with predicted device metric variations |
US8994415B1 (en) | 2013-03-01 | 2015-03-31 | Suvolta, Inc. | Multiple VDD clock buffer |
US8988153B1 (en) | 2013-03-09 | 2015-03-24 | Suvolta, Inc. | Ring oscillator with NMOS or PMOS variation insensitivity |
US9299801B1 (en) | 2013-03-14 | 2016-03-29 | Mie Fujitsu Semiconductor Limited | Method for fabricating a transistor device with a tuned dopant profile |
US9449967B1 (en) | 2013-03-15 | 2016-09-20 | Fujitsu Semiconductor Limited | Transistor array structure |
US9112495B1 (en) | 2013-03-15 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Integrated circuit device body bias circuits and methods |
US9219078B2 (en) | 2013-04-18 | 2015-12-22 | International Business Machines Corporation | Simplified multi-threshold voltage scheme for fully depleted SOI MOSFETs |
US9478571B1 (en) | 2013-05-24 | 2016-10-25 | Mie Fujitsu Semiconductor Limited | Buried channel deeply depleted channel transistor |
US8976575B1 (en) | 2013-08-29 | 2015-03-10 | Suvolta, Inc. | SRAM performance monitor |
US9093387B1 (en) * | 2014-01-08 | 2015-07-28 | International Business Machines Corporation | Metallic mask patterning process for minimizing collateral etch of an underlayer |
US9710006B2 (en) | 2014-07-25 | 2017-07-18 | Mie Fujitsu Semiconductor Limited | Power up body bias circuits and methods |
US9319013B2 (en) | 2014-08-19 | 2016-04-19 | Mie Fujitsu Semiconductor Limited | Operational amplifier input offset correction with transistor threshold voltage adjustment |
US9837487B2 (en) | 2015-11-30 | 2017-12-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of semiconductor device structure with gate stack |
US9768171B2 (en) * | 2015-12-16 | 2017-09-19 | International Business Machines Corporation | Method to form dual tin layers as pFET work metal stack |
US9559016B1 (en) * | 2016-01-15 | 2017-01-31 | International Business Machines Corporation | Semiconductor device having a gate stack with tunable work function |
US10593600B2 (en) * | 2016-02-24 | 2020-03-17 | International Business Machines Corporation | Distinct gate stacks for III-V-based CMOS circuits comprising a channel cap |
US10062693B2 (en) | 2016-02-24 | 2018-08-28 | International Business Machines Corporation | Patterned gate dielectrics for III-V-based CMOS circuits |
US10535524B1 (en) | 2019-03-11 | 2020-01-14 | Taiwan Semiconductor Manufacturing Company, Ltd. | Tuning threshold voltage through meta stable plasma treatment |
Family Cites Families (29)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6291282B1 (en) * | 1999-02-26 | 2001-09-18 | Texas Instruments Incorporated | Method of forming dual metal gate structures or CMOS devices |
JP2002198441A (ja) * | 2000-11-16 | 2002-07-12 | Hynix Semiconductor Inc | 半導体素子のデュアル金属ゲート形成方法 |
US8026161B2 (en) * | 2001-08-30 | 2011-09-27 | Micron Technology, Inc. | Highly reliable amorphous high-K gate oxide ZrO2 |
US6900122B2 (en) * | 2001-12-20 | 2005-05-31 | Micron Technology, Inc. | Low-temperature grown high-quality ultra-thin praseodymium gate dielectrics |
US6767795B2 (en) * | 2002-01-17 | 2004-07-27 | Micron Technology, Inc. | Highly reliable amorphous high-k gate dielectric ZrOXNY |
US6893984B2 (en) * | 2002-02-20 | 2005-05-17 | Micron Technology Inc. | Evaporated LaA1O3 films for gate dielectrics |
US6693004B1 (en) * | 2002-02-27 | 2004-02-17 | Advanced Micro Devices, Inc. | Interfacial barrier layer in semiconductor devices with high-K gate dielectric material |
US6750066B1 (en) * | 2002-04-08 | 2004-06-15 | Advanced Micro Devices, Inc. | Precision high-K intergate dielectric layer |
US7160577B2 (en) * | 2002-05-02 | 2007-01-09 | Micron Technology, Inc. | Methods for atomic-layer deposition of aluminum oxides in integrated circuits |
US7135421B2 (en) * | 2002-06-05 | 2006-11-14 | Micron Technology, Inc. | Atomic layer-deposited hafnium aluminum oxide |
US6767847B1 (en) * | 2002-07-02 | 2004-07-27 | Taiwan Semiconductor Manufacturing Company | Method of forming a silicon nitride-silicon dioxide gate stack |
US6982230B2 (en) * | 2002-11-08 | 2006-01-03 | International Business Machines Corporation | Deposition of hafnium oxide and/or zirconium oxide and fabrication of passivated electronic structures |
US7192892B2 (en) * | 2003-03-04 | 2007-03-20 | Micron Technology, Inc. | Atomic layer deposited dielectric layers |
US7135369B2 (en) * | 2003-03-31 | 2006-11-14 | Micron Technology, Inc. | Atomic layer deposited ZrAlxOy dielectric layers including Zr4AlO9 |
US6809394B1 (en) * | 2003-08-13 | 2004-10-26 | Texas Instruments Incorporated | Dual metal-alloy nitride gate electrodes |
WO2005119762A1 (en) * | 2004-05-27 | 2005-12-15 | Massachusetts Institute Of Technology | Single metal gate material cmos using strained si-silicon germanium heterojunction layered substrate |
US7091118B1 (en) * | 2004-11-16 | 2006-08-15 | Advanced Micro Devices, Inc. | Replacement metal gate transistor with metal-rich silicon layer and method for making the same |
US7297586B2 (en) * | 2005-01-26 | 2007-11-20 | Freescale Semiconductor, Inc. | Gate dielectric and metal gate integration |
US7504700B2 (en) * | 2005-04-21 | 2009-03-17 | International Business Machines Corporation | Method of forming an ultra-thin [[HfSiO]] metal silicate film for high performance CMOS applications and semiconductor structure formed in said method |
US7504329B2 (en) * | 2005-05-11 | 2009-03-17 | Interuniversitair Microelektronica Centrum (Imec) | Method of forming a Yb-doped Ni full silicidation low work function gate electrode for n-MOSFET |
US7569466B2 (en) * | 2005-12-16 | 2009-08-04 | International Business Machines Corporation | Dual metal gate self-aligned integration |
US20070152276A1 (en) * | 2005-12-30 | 2007-07-05 | International Business Machines Corporation | High performance CMOS circuits, and methods for fabricating the same |
US7833849B2 (en) * | 2005-12-30 | 2010-11-16 | International Business Machines Corporation | Method of fabricating a semiconductor structure including one device region having a metal gate electrode located atop a thinned polygate electrode |
US7611979B2 (en) * | 2007-02-12 | 2009-11-03 | International Business Machines Corporation | Metal gates with low charge trapping and enhanced dielectric reliability characteristics for high-k gate dielectric stacks |
US20080203485A1 (en) * | 2007-02-28 | 2008-08-28 | International Business Machines Corporation | Strained metal gate structure for cmos devices with improved channel mobility and methods of forming the same |
US7772016B2 (en) * | 2007-04-04 | 2010-08-10 | International Business Machines Corporation | Method for composition control of a metal compound film |
US7863124B2 (en) * | 2007-05-10 | 2011-01-04 | International Business Machines Corporation | Residue free patterned layer formation method applicable to CMOS structures |
JP5151303B2 (ja) * | 2007-08-07 | 2013-02-27 | ソニー株式会社 | 半導体装置の製造方法 |
JP2009044051A (ja) * | 2007-08-10 | 2009-02-26 | Panasonic Corp | 半導体装置及びその製造方法 |
-
2009
- 2009-04-14 US US12/423,236 patent/US7943457B2/en active Active
-
2010
- 2010-03-30 TW TW099109564A patent/TWI476822B/zh active
- 2010-04-14 JP JP2012506148A patent/JP5579828B2/ja not_active Expired - Fee Related
- 2010-04-14 WO PCT/US2010/030980 patent/WO2010120842A1/en active Application Filing
- 2010-04-14 CN CN2010800101888A patent/CN102341894A/zh active Pending
- 2010-04-14 EP EP10765059.0A patent/EP2419925B1/en active Active
- 2010-04-14 BR BRPI1006585-7A patent/BRPI1006585A2/pt not_active IP Right Cessation
-
2011
- 2011-04-06 US US13/080,962 patent/US8436427B2/en active Active
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US9786761B2 (en) | 2015-04-21 | 2017-10-10 | Samsung Electronics Co., Ltd. | Integrated circuit device having an interfacial layer and method of manufacturing the same |
Also Published As
Publication number | Publication date |
---|---|
WO2010120842A1 (en) | 2010-10-21 |
CN102341894A (zh) | 2012-02-01 |
US7943457B2 (en) | 2011-05-17 |
TWI476822B (zh) | 2015-03-11 |
US8436427B2 (en) | 2013-05-07 |
BRPI1006585A2 (pt) | 2019-04-02 |
EP2419925A4 (en) | 2016-03-30 |
JP2012524413A (ja) | 2012-10-11 |
EP2419925A1 (en) | 2012-02-22 |
US20100258881A1 (en) | 2010-10-14 |
TW201108309A (en) | 2011-03-01 |
EP2419925B1 (en) | 2020-07-08 |
US20110180880A1 (en) | 2011-07-28 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5579828B2 (ja) | 金属High−kFETのためのデュアル金属およびデュアル誘電体集積 | |
US9263445B2 (en) | Method of fabricating dual high-k metal gates for MOS devices | |
US7344934B2 (en) | CMOS transistor and method of manufacture thereof | |
US7927943B2 (en) | Method for tuning a work function of high-k metal gate devices | |
US9087919B2 (en) | Methods of fabricating semiconductor devices and structures thereof | |
TWI419264B (zh) | 製造半導體裝置的方法 | |
TWI395296B (zh) | 半導體裝置之製造方法 | |
US7084024B2 (en) | Gate electrode forming methods using conductive hard mask | |
US8357603B2 (en) | Metal gate fill and method of making | |
US7776757B2 (en) | Method of fabricating high-k metal gate devices | |
US9196611B2 (en) | Reduced substrate coupling for inductors in semiconductor devices | |
US9147679B2 (en) | Method of semiconductor integrated circuit fabrication | |
US20100213555A1 (en) | Metal oxide semiconductor devices having capping layers and methods for fabricating the same | |
KR101347943B1 (ko) | 금속 게이트를 갖는 cmos 장치와, 이런 장치를 형성하기 위한 방법 | |
US10109492B2 (en) | Method of forming a high quality interfacial layer for a semiconductor device by performing a low temperature ALD process | |
US7498271B1 (en) | Nitrogen based plasma process for metal gate MOS device | |
US8574980B2 (en) | Method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device | |
US11990522B2 (en) | Effective work function tuning via silicide induced interface dipole modulation for metal gates |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20121219 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20140303 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20140311 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140529 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20140624 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20140709 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5579828 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
LAPS | Cancellation because of no payment of annual fees |