JP2006507686A5 - - Google Patents

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Publication number
JP2006507686A5
JP2006507686A5 JP2004555419A JP2004555419A JP2006507686A5 JP 2006507686 A5 JP2006507686 A5 JP 2006507686A5 JP 2004555419 A JP2004555419 A JP 2004555419A JP 2004555419 A JP2004555419 A JP 2004555419A JP 2006507686 A5 JP2006507686 A5 JP 2006507686A5
Authority
JP
Japan
Prior art keywords
bonding
wire
substrate
integrated circuit
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004555419A
Other languages
English (en)
Japanese (ja)
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JP2006507686A (ja
Filing date
Publication date
Priority claimed from US10/304,416 external-priority patent/US6921979B2/en
Application filed filed Critical
Publication of JP2006507686A publication Critical patent/JP2006507686A/ja
Publication of JP2006507686A5 publication Critical patent/JP2006507686A5/ja
Pending legal-status Critical Current

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JP2004555419A 2002-11-26 2003-11-12 ボンディングパッドを有する半導体装置及びその形成方法 Pending JP2006507686A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/304,416 US6921979B2 (en) 2002-03-13 2002-11-26 Semiconductor device having a bond pad and method therefor
PCT/US2003/035964 WO2004049436A1 (en) 2002-11-26 2003-11-12 Semiconductor device having a bond pad and method for its fabrication

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010043549A Division JP2010153901A (ja) 2002-11-26 2010-02-26 ボンディングパッドを有する半導体装置及びその形成方法

Publications (2)

Publication Number Publication Date
JP2006507686A JP2006507686A (ja) 2006-03-02
JP2006507686A5 true JP2006507686A5 (enExample) 2006-12-28

Family

ID=32392430

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2004555419A Pending JP2006507686A (ja) 2002-11-26 2003-11-12 ボンディングパッドを有する半導体装置及びその形成方法
JP2010043549A Pending JP2010153901A (ja) 2002-11-26 2010-02-26 ボンディングパッドを有する半導体装置及びその形成方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2010043549A Pending JP2010153901A (ja) 2002-11-26 2010-02-26 ボンディングパッドを有する半導体装置及びその形成方法

Country Status (8)

Country Link
US (1) US6921979B2 (enExample)
EP (1) EP1565939A1 (enExample)
JP (2) JP2006507686A (enExample)
KR (1) KR20050075447A (enExample)
CN (1) CN1717802B (enExample)
AU (1) AU2003291472A1 (enExample)
TW (1) TWI313921B (enExample)
WO (1) WO2004049436A1 (enExample)

Families Citing this family (35)

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Publication number Priority date Publication date Assignee Title
US7305509B2 (en) * 2003-03-07 2007-12-04 Dell Products L.P. Method and apparatus for zero stub serial termination capacitor of resistor mounting option in an information handling system
JP4357862B2 (ja) * 2003-04-09 2009-11-04 シャープ株式会社 半導体装置
US7005369B2 (en) * 2003-08-21 2006-02-28 Intersil American Inc. Active area bonding compatible high current structures
US8274160B2 (en) 2003-08-21 2012-09-25 Intersil Americas Inc. Active area bonding compatible high current structures
US7115997B2 (en) * 2003-11-19 2006-10-03 International Business Machines Corporation Seedless wirebond pad plating
US20050127516A1 (en) * 2003-12-12 2005-06-16 Mercer Betty S. Small viatops for thick copper connectors
US7629689B2 (en) * 2004-01-22 2009-12-08 Kawasaki Microelectronics, Inc. Semiconductor integrated circuit having connection pads over active elements
US7777223B2 (en) * 2004-03-16 2010-08-17 Pansonic Corporation Semiconductor device
US20060060845A1 (en) * 2004-09-20 2006-03-23 Narahari Ramanuja Bond pad redistribution layer for thru semiconductor vias and probe touchdown
US7468545B2 (en) * 2005-05-06 2008-12-23 Megica Corporation Post passivation structure for a semiconductor device and packaging process for same
JP5148825B2 (ja) * 2005-10-14 2013-02-20 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
JPWO2007114057A1 (ja) * 2006-04-04 2009-08-13 パナソニック株式会社 半導体集積回路装置およびｐｄｐドライバおよびプラズマディスプレイパネル
US7808117B2 (en) * 2006-05-16 2010-10-05 Freescale Semiconductor, Inc. Integrated circuit having pads and input/output (I/O) cells
US7741195B2 (en) 2006-05-26 2010-06-22 Freescale Semiconductor, Inc. Method of stimulating die circuitry and structure therefor
KR100753795B1 (ko) * 2006-06-27 2007-08-31 하나 마이크론(주) 반도체 패키지 및 그 제조 방법
US7397127B2 (en) * 2006-10-06 2008-07-08 Taiwan Semiconductor Manufacturing Co., Ltd. Bonding and probing pad structures
US20080182120A1 (en) * 2007-01-28 2008-07-31 Lan Chu Tan Bond pad for semiconductor device
JP2008218442A (ja) * 2007-02-28 2008-09-18 Matsushita Electric Ind Co Ltd 半導体集積回路装置及びその製造方法
US7566648B2 (en) * 2007-04-22 2009-07-28 Freescale Semiconductor Inc. Method of making solder pad
JP4317245B2 (ja) * 2007-09-27 2009-08-19 新光電気工業株式会社 電子装置及びその製造方法
US20100171211A1 (en) * 2009-01-07 2010-07-08 Che-Yuan Jao Semiconductor device
CN102209433A (zh) * 2010-03-30 2011-10-05 鸿富锦精密工业（深圳）有限公司 电路板引脚布局架构
US8242613B2 (en) 2010-09-01 2012-08-14 Freescale Semiconductor, Inc. Bond pad for semiconductor die
FR2974665A1 (fr) * 2011-04-27 2012-11-02 St Microelectronics Crolles 2 Puce microelectronique, composant incluant une telle puce et procede de fabrication
JP2014241309A (ja) * 2011-10-06 2014-12-25 株式会社村田製作所 半導体装置およびその製造方法
US9599657B2 (en) * 2013-01-03 2017-03-21 Globalfoundries Inc. High power radio frequency (RF) in-line wafer testing
JP5772926B2 (ja) 2013-01-07 2015-09-02 株式会社デンソー 半導体装置
US9536833B2 (en) * 2013-02-01 2017-01-03 Mediatek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
US9455226B2 (en) * 2013-02-01 2016-09-27 Mediatek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
EP3131118B1 (en) * 2015-08-12 2019-04-17 MediaTek Inc. Semiconductor device allowing metal layer routing formed directly under metal pad
US10262926B2 (en) 2016-10-05 2019-04-16 Nexperia B.V. Reversible semiconductor die
JP2019169639A (ja) * 2018-03-23 2019-10-03 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
US11043435B1 (en) * 2020-05-18 2021-06-22 Innogrit Technologies Co., Ltd. Semiconductor die with hybrid wire bond pads
JP2022039620A (ja) * 2020-08-28 2022-03-10 キオクシア株式会社 半導体装置
US12176320B2 (en) * 2021-05-10 2024-12-24 Ap Memory Technology Corporation Semiconductor structure and methods for bonding tested wafers and testing pre-bonded wafers

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JPH01309340A (ja) * 1988-06-07 1989-12-13 Mitsubishi Electric Corp 半導体装置
JPH0456237A (ja) * 1990-06-25 1992-02-24 Matsushita Electron Corp 半導体装置
DE69330603T2 (de) * 1993-09-30 2002-07-04 Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno, Catania Verfahren zur Metallisierung und Verbindung bei der Herstellung von Leistungshalbleiterbauelementen
US5554940A (en) 1994-07-05 1996-09-10 Motorola, Inc. Bumped semiconductor device and method for probing the same
US5514892A (en) 1994-09-30 1996-05-07 Motorola, Inc. Electrostatic discharge protection device
US5506499A (en) 1995-06-05 1996-04-09 Neomagic Corp. Multiple probing of an auxilary test pad which allows for reliable bonding to a primary bonding pad
US5783868A (en) 1996-09-20 1998-07-21 Integrated Device Technology, Inc. Extended bond pads with a plurality of perforations
JP3351706B2 (ja) 1997-05-14 2002-12-03 株式会社東芝 半導体装置およびその製造方法
US6144100A (en) 1997-06-05 2000-11-07 Texas Instruments Incorporated Integrated circuit with bonding layer over active circuitry
JP3022819B2 (ja) * 1997-08-27 2000-03-21 日本電気アイシーマイコンシステム株式会社 半導体集積回路装置
US5886393A (en) * 1997-11-07 1999-03-23 National Semiconductor Corporation Bonding wire inductor for use in an integrated circuit package and method
US6232662B1 (en) 1998-07-14 2001-05-15 Texas Instruments Incorporated System and method for bonding over active integrated circuits
US6373143B1 (en) 1998-09-24 2002-04-16 International Business Machines Corporation Integrated circuit having wirebond pads suitable for probing
TW445616B (en) 1998-12-04 2001-07-11 Koninkl Philips Electronics Nv An integrated circuit device
US6303459B1 (en) 1999-11-15 2001-10-16 Taiwan Semiconductor Manufacturing Company Integration process for Al pad
US20020016070A1 (en) * 2000-04-05 2002-02-07 Gerald Friese Power pads for application of high current per bond pad in silicon technology
JP3631120B2 (ja) * 2000-09-28 2005-03-23 沖電気工業株式会社 半導体装置
US6844631B2 (en) 2002-03-13 2005-01-18 Freescale Semiconductor, Inc. Semiconductor device having a bond pad and method therefor

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