JP2006501676A5 - - Google Patents

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Publication number
JP2006501676A5
JP2006501676A5 JP2004541567A JP2004541567A JP2006501676A5 JP 2006501676 A5 JP2006501676 A5 JP 2006501676A5 JP 2004541567 A JP2004541567 A JP 2004541567A JP 2004541567 A JP2004541567 A JP 2004541567A JP 2006501676 A5 JP2006501676 A5 JP 2006501676A5
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JP
Japan
Prior art keywords
interconnect
workpiece
semiconductor wafer
site
manufacturing data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2004541567A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006501676A (ja
Filing date
Publication date
Priority claimed from US10/260,894 external-priority patent/US6842661B2/en
Application filed filed Critical
Publication of JP2006501676A publication Critical patent/JP2006501676A/ja
Publication of JP2006501676A5 publication Critical patent/JP2006501676A5/ja
Pending legal-status Critical Current

Links

JP2004541567A 2002-09-30 2003-09-19 相互接続レベルにおけるプロセス制御 Pending JP2006501676A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/260,894 US6842661B2 (en) 2002-09-30 2002-09-30 Process control at an interconnect level
PCT/US2003/029340 WO2004032225A1 (en) 2002-09-30 2003-09-19 Process control at an interconnect level

Publications (2)

Publication Number Publication Date
JP2006501676A JP2006501676A (ja) 2006-01-12
JP2006501676A5 true JP2006501676A5 (enExample) 2009-01-29

Family

ID=32029815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004541567A Pending JP2006501676A (ja) 2002-09-30 2003-09-19 相互接続レベルにおけるプロセス制御

Country Status (9)

Country Link
US (1) US6842661B2 (enExample)
JP (1) JP2006501676A (enExample)
KR (1) KR101001347B1 (enExample)
CN (1) CN1685494A (enExample)
AU (1) AU2003270745A1 (enExample)
DE (1) DE10393397B4 (enExample)
GB (1) GB2409339B (enExample)
TW (1) TWI289243B (enExample)
WO (1) WO2004032225A1 (enExample)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8301288B2 (en) * 2004-06-16 2012-10-30 International Business Machines Corporation Optimized scheduling based on sensitivity data
US7235414B1 (en) * 2005-03-01 2007-06-26 Advanced Micro Devices, Inc. Using scatterometry to verify contact hole opening during tapered bilayer etch
US7964422B1 (en) 2005-11-01 2011-06-21 Nvidia Corporation Method and system for controlling a semiconductor fabrication process
KR100759684B1 (ko) * 2006-04-17 2007-09-17 삼성에스디아이 주식회사 건식식각장치 및 이를 이용한 유기전계발광 표시장치의식각방법

Family Cites Families (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3320035B2 (ja) * 1991-08-23 2002-09-03 株式会社半導体エネルギー研究所 半導体装置
US5844416A (en) * 1995-11-02 1998-12-01 Sandia Corporation Ion-beam apparatus and method for analyzing and controlling integrated circuits
US6041270A (en) * 1997-12-05 2000-03-21 Advanced Micro Devices, Inc. Automatic recipe adjust and download based on process control window
JP3310608B2 (ja) * 1998-01-22 2002-08-05 アプライド マテリアルズ インコーポレイテッド スパッタリング装置
US6054868A (en) * 1998-06-10 2000-04-25 Boxer Cross Incorporated Apparatus and method for measuring a property of a layer in a multilayered structure
JP3897922B2 (ja) * 1998-12-15 2007-03-28 株式会社東芝 半導体装置の製造方法、及びコンピュ−タ読取り可能な記録媒体
US6157078A (en) * 1999-09-23 2000-12-05 Advanced Micro Devices, Inc. Reduced variation in interconnect resistance using run-to-run control of chemical-mechanical polishing during semiconductor fabrication
JP3910324B2 (ja) * 1999-10-26 2007-04-25 ファブソリューション株式会社 半導体製造装置
JP3556549B2 (ja) * 1999-12-10 2004-08-18 シャープ株式会社 シート抵抗測定器および電子部品製造方法
US6413867B1 (en) * 1999-12-23 2002-07-02 Applied Materials, Inc. Film thickness control using spectral interferometry
US6470230B1 (en) 2000-01-04 2002-10-22 Advanced Micro Devices, Inc. Supervisory method for determining optimal process targets based on product performance in microelectronic fabrication
US6747734B1 (en) 2000-07-08 2004-06-08 Semitool, Inc. Apparatus and method for processing a microelectronic workpiece using metrology
JP4437611B2 (ja) * 2000-11-16 2010-03-24 株式会社ルネサステクノロジ 半導体装置の製造方法
US6958814B2 (en) * 2002-03-01 2005-10-25 Applied Materials, Inc. Apparatus and method for measuring a property of a layer in a multilayered structure
US6828542B2 (en) * 2002-06-07 2004-12-07 Brion Technologies, Inc. System and method for lithography process monitoring and control

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