JP2006501676A - 相互接続レベルにおけるプロセス制御 - Google Patents
相互接続レベルにおけるプロセス制御 Download PDFInfo
- Publication number
- JP2006501676A JP2006501676A JP2004541567A JP2004541567A JP2006501676A JP 2006501676 A JP2006501676 A JP 2006501676A JP 2004541567 A JP2004541567 A JP 2004541567A JP 2004541567 A JP2004541567 A JP 2004541567A JP 2006501676 A JP2006501676 A JP 2006501676A
- Authority
- JP
- Japan
- Prior art keywords
- interconnect
- workpiece
- semiconductor wafer
- control
- site
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
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Classifications
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/4183—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by data acquisition, e.g. workpiece identification
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/20—Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/32—Operator till task planning
- G05B2219/32183—Test cell
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/36—Nc in input of data, input key till input tape
- G05B2219/36284—Use of database for machining parameters, material, cutting method, tools
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/45—Nc applications
- G05B2219/45026—Circuit board, pcb
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/45—Nc applications
- G05B2219/45031—Manufacturing semiconductor wafers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Quality & Reliability (AREA)
- General Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Control By Computers (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/260,894 US6842661B2 (en) | 2002-09-30 | 2002-09-30 | Process control at an interconnect level |
| PCT/US2003/029340 WO2004032225A1 (en) | 2002-09-30 | 2003-09-19 | Process control at an interconnect level |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2006501676A true JP2006501676A (ja) | 2006-01-12 |
| JP2006501676A5 JP2006501676A5 (enExample) | 2009-01-29 |
Family
ID=32029815
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2004541567A Pending JP2006501676A (ja) | 2002-09-30 | 2003-09-19 | 相互接続レベルにおけるプロセス制御 |
Country Status (9)
| Country | Link |
|---|---|
| US (1) | US6842661B2 (enExample) |
| JP (1) | JP2006501676A (enExample) |
| KR (1) | KR101001347B1 (enExample) |
| CN (1) | CN1685494A (enExample) |
| AU (1) | AU2003270745A1 (enExample) |
| DE (1) | DE10393397B4 (enExample) |
| GB (1) | GB2409339B (enExample) |
| TW (1) | TWI289243B (enExample) |
| WO (1) | WO2004032225A1 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8301288B2 (en) * | 2004-06-16 | 2012-10-30 | International Business Machines Corporation | Optimized scheduling based on sensitivity data |
| US7235414B1 (en) * | 2005-03-01 | 2007-06-26 | Advanced Micro Devices, Inc. | Using scatterometry to verify contact hole opening during tapered bilayer etch |
| US7964422B1 (en) | 2005-11-01 | 2011-06-21 | Nvidia Corporation | Method and system for controlling a semiconductor fabrication process |
| KR100759684B1 (ko) * | 2006-04-17 | 2007-09-17 | 삼성에스디아이 주식회사 | 건식식각장치 및 이를 이용한 유기전계발광 표시장치의식각방법 |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11209873A (ja) * | 1998-01-22 | 1999-08-03 | Applied Materials Inc | スパッタリング装置 |
| JP2000068521A (ja) * | 1991-08-23 | 2000-03-03 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| JP2000182917A (ja) * | 1998-12-15 | 2000-06-30 | Toshiba Corp | 半導体装置の製造方法、半導体装置の製造システム、半導体装置製造システム用制御プログラムを記録したコンピュ−タ読取り可能な記録媒体及び半導体装置製造システム用制御に用いるデ−タを記録したコンピュ−タ読取り可能な記録媒体 |
| US6157078A (en) * | 1999-09-23 | 2000-12-05 | Advanced Micro Devices, Inc. | Reduced variation in interconnect resistance using run-to-run control of chemical-mechanical polishing during semiconductor fabrication |
| JP2001196283A (ja) * | 1999-10-26 | 2001-07-19 | Nec Corp | 半導体製造装置及びその製造方法 |
| JP2002151465A (ja) * | 2000-11-16 | 2002-05-24 | Mitsubishi Electric Corp | 半導体装置の製造方法および製造システム、並びに半導体装置 |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5844416A (en) * | 1995-11-02 | 1998-12-01 | Sandia Corporation | Ion-beam apparatus and method for analyzing and controlling integrated circuits |
| US6041270A (en) * | 1997-12-05 | 2000-03-21 | Advanced Micro Devices, Inc. | Automatic recipe adjust and download based on process control window |
| US6054868A (en) * | 1998-06-10 | 2000-04-25 | Boxer Cross Incorporated | Apparatus and method for measuring a property of a layer in a multilayered structure |
| JP3556549B2 (ja) * | 1999-12-10 | 2004-08-18 | シャープ株式会社 | シート抵抗測定器および電子部品製造方法 |
| US6413867B1 (en) * | 1999-12-23 | 2002-07-02 | Applied Materials, Inc. | Film thickness control using spectral interferometry |
| US6470230B1 (en) | 2000-01-04 | 2002-10-22 | Advanced Micro Devices, Inc. | Supervisory method for determining optimal process targets based on product performance in microelectronic fabrication |
| US6747734B1 (en) | 2000-07-08 | 2004-06-08 | Semitool, Inc. | Apparatus and method for processing a microelectronic workpiece using metrology |
| US6958814B2 (en) * | 2002-03-01 | 2005-10-25 | Applied Materials, Inc. | Apparatus and method for measuring a property of a layer in a multilayered structure |
| US6828542B2 (en) * | 2002-06-07 | 2004-12-07 | Brion Technologies, Inc. | System and method for lithography process monitoring and control |
-
2002
- 2002-09-30 US US10/260,894 patent/US6842661B2/en not_active Expired - Fee Related
-
2003
- 2003-09-19 WO PCT/US2003/029340 patent/WO2004032225A1/en not_active Ceased
- 2003-09-19 AU AU2003270745A patent/AU2003270745A1/en not_active Abandoned
- 2003-09-19 GB GB0505536A patent/GB2409339B/en not_active Expired - Fee Related
- 2003-09-19 TW TW092125872A patent/TWI289243B/zh not_active IP Right Cessation
- 2003-09-19 JP JP2004541567A patent/JP2006501676A/ja active Pending
- 2003-09-19 DE DE10393397T patent/DE10393397B4/de not_active Expired - Fee Related
- 2003-09-19 CN CNA038232510A patent/CN1685494A/zh active Pending
- 2003-09-19 KR KR1020057005289A patent/KR101001347B1/ko not_active Expired - Fee Related
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2000068521A (ja) * | 1991-08-23 | 2000-03-03 | Semiconductor Energy Lab Co Ltd | 半導体装置 |
| JPH11209873A (ja) * | 1998-01-22 | 1999-08-03 | Applied Materials Inc | スパッタリング装置 |
| JP2000182917A (ja) * | 1998-12-15 | 2000-06-30 | Toshiba Corp | 半導体装置の製造方法、半導体装置の製造システム、半導体装置製造システム用制御プログラムを記録したコンピュ−タ読取り可能な記録媒体及び半導体装置製造システム用制御に用いるデ−タを記録したコンピュ−タ読取り可能な記録媒体 |
| US6157078A (en) * | 1999-09-23 | 2000-12-05 | Advanced Micro Devices, Inc. | Reduced variation in interconnect resistance using run-to-run control of chemical-mechanical polishing during semiconductor fabrication |
| JP2001196283A (ja) * | 1999-10-26 | 2001-07-19 | Nec Corp | 半導体製造装置及びその製造方法 |
| JP2002151465A (ja) * | 2000-11-16 | 2002-05-24 | Mitsubishi Electric Corp | 半導体装置の製造方法および製造システム、並びに半導体装置 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20040064214A1 (en) | 2004-04-01 |
| AU2003270745A1 (en) | 2004-04-23 |
| KR101001347B1 (ko) | 2010-12-14 |
| GB0505536D0 (en) | 2005-04-27 |
| GB2409339B (en) | 2006-05-10 |
| DE10393397T5 (de) | 2005-08-11 |
| US6842661B2 (en) | 2005-01-11 |
| TWI289243B (en) | 2007-11-01 |
| GB2409339A (en) | 2005-06-22 |
| WO2004032225A1 (en) | 2004-04-15 |
| DE10393397B4 (de) | 2010-09-02 |
| KR20050054969A (ko) | 2005-06-10 |
| CN1685494A (zh) | 2005-10-19 |
| TW200408920A (en) | 2004-06-01 |
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Legal Events
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|---|---|---|---|
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Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20060911 |
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