JP2006196922A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2006196922A5 JP2006196922A5 JP2006072498A JP2006072498A JP2006196922A5 JP 2006196922 A5 JP2006196922 A5 JP 2006196922A5 JP 2006072498 A JP2006072498 A JP 2006072498A JP 2006072498 A JP2006072498 A JP 2006072498A JP 2006196922 A5 JP2006196922 A5 JP 2006196922A5
- Authority
- JP
- Japan
- Prior art keywords
- metal layer
- cutting
- manufacturing
- semiconductor device
- resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002184 metal Substances 0.000 claims 13
- 229910052751 metal Inorganic materials 0.000 claims 13
- 239000004065 semiconductor Substances 0.000 claims 9
- 238000004519 manufacturing process Methods 0.000 claims 4
- 238000004070 electrodeposition Methods 0.000 claims 3
- 238000000034 method Methods 0.000 claims 2
- 239000011347 resin Substances 0.000 claims 2
- 229920005989 resin Polymers 0.000 claims 2
- 238000007789 sealing Methods 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- 229910001020 Au alloy Inorganic materials 0.000 claims 1
- 239000008393 encapsulating agent Substances 0.000 claims 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims 1
- 239000010931 gold Substances 0.000 claims 1
- 229910052737 gold Inorganic materials 0.000 claims 1
- 239000011159 matrix material Substances 0.000 claims 1
- 239000010935 stainless steel Substances 0.000 claims 1
- 229910001220 stainless steel Inorganic materials 0.000 claims 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006072498A JP3869849B2 (ja) | 2000-04-25 | 2006-03-16 | 半導体装置の製造方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2000124102 | 2000-04-25 | ||
| JP2006072498A JP3869849B2 (ja) | 2000-04-25 | 2006-03-16 | 半導体装置の製造方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001078791A Division JP2002016181A (ja) | 2000-04-25 | 2001-03-19 | 半導体装置、その製造方法、及び電着フレーム |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2006196922A JP2006196922A (ja) | 2006-07-27 |
| JP2006196922A5 true JP2006196922A5 (enExample) | 2006-09-21 |
| JP3869849B2 JP3869849B2 (ja) | 2007-01-17 |
Family
ID=36802682
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006072498A Expired - Lifetime JP3869849B2 (ja) | 2000-04-25 | 2006-03-16 | 半導体装置の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3869849B2 (enExample) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5098452B2 (ja) * | 2007-06-11 | 2012-12-12 | 住友金属鉱山株式会社 | 半導体装置の製造方法 |
| JP5151438B2 (ja) * | 2007-12-10 | 2013-02-27 | 大日本印刷株式会社 | 半導体装置およびその製造方法、ならびに半導体装置用基板およびその製造方法 |
| WO2010150365A1 (ja) * | 2009-06-24 | 2010-12-29 | アオイ電子株式会社 | 半導体装置および半導体装置の製造方法 |
| EP2337068A1 (en) | 2009-12-18 | 2011-06-22 | Nxp B.V. | Pre-soldered leadless package |
| JP5779748B2 (ja) | 2010-11-02 | 2015-09-16 | リコー電子デバイス株式会社 | 半導体パッケージ及び電子部品実装体 |
| TWI533380B (zh) * | 2011-05-03 | 2016-05-11 | 旭德科技股份有限公司 | 封裝結構及其製作方法 |
| JP2012084938A (ja) * | 2012-02-03 | 2012-04-26 | Sumitomo Metal Mining Co Ltd | 半導体装置製造用基板 |
-
2006
- 2006-03-16 JP JP2006072498A patent/JP3869849B2/ja not_active Expired - Lifetime
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US8329509B2 (en) | Packaging process to create wettable lead flank during board assembly | |
| JP5613463B2 (ja) | 半導体装置及びその製造方法 | |
| US6841414B1 (en) | Saw and etch singulation method for a chip package | |
| TWI705543B (zh) | 引線架及其製造方法 | |
| CN102742009A (zh) | 裸片附着垫接地接合增强 | |
| JP2007507108A5 (enExample) | ||
| US8552542B2 (en) | Lead frame, semiconductor device, method of manufacturing lead frame, and method of manufacturing semiconductor device | |
| CN101419920B (zh) | 用于制造半导体元器件的方法以及因之的结构 | |
| CN108878300B (zh) | 在模制期间具有背面保护层以防止模具溢料失效的封装件 | |
| JP2006196922A5 (enExample) | ||
| CN103325746B (zh) | 半导体封装及其形成方法 | |
| JP2004327903A (ja) | 樹脂封止型半導体装置とその製造方法 | |
| JP2012069690A5 (enExample) | ||
| CN101958257A (zh) | 双面图形芯片直接置放先镀后刻模组封装方法 | |
| CN101958303B (zh) | 双面图形芯片正装单颗封装结构及其封装方法 | |
| US20100301467A1 (en) | Wirebond structures | |
| US9252089B2 (en) | Universal lead frame for flat no-leads packages | |
| CN101958301B (zh) | 双面图形芯片直接置放单颗封装结构及其封装方法 | |
| JP2010050288A5 (enExample) | ||
| JP2010010634A5 (enExample) | ||
| JP2012182207A (ja) | Led素子用リードフレームおよびその製造方法 | |
| JP2015153987A (ja) | モールドパッケージ | |
| JP2009065201A5 (enExample) | ||
| JP4979661B2 (ja) | 半導体装置の製造方法 | |
| JP4715772B2 (ja) | 半導体装置 |