JP2006134912A5 - - Google Patents

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Publication number
JP2006134912A5
JP2006134912A5 JP2004318891A JP2004318891A JP2006134912A5 JP 2006134912 A5 JP2006134912 A5 JP 2006134912A5 JP 2004318891 A JP2004318891 A JP 2004318891A JP 2004318891 A JP2004318891 A JP 2004318891A JP 2006134912 A5 JP2006134912 A5 JP 2006134912A5
Authority
JP
Japan
Prior art keywords
insulating resin
resin layer
film member
semiconductor element
wiring pattern
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2004318891A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006134912A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2004318891A priority Critical patent/JP2006134912A/ja
Priority claimed from JP2004318891A external-priority patent/JP2006134912A/ja
Priority to US11/262,758 priority patent/US20060091524A1/en
Publication of JP2006134912A publication Critical patent/JP2006134912A/ja
Publication of JP2006134912A5 publication Critical patent/JP2006134912A5/ja
Withdrawn legal-status Critical Current

Links

JP2004318891A 2004-11-02 2004-11-02 半導体モジュールおよびその製造方法、ならびにフィルムインターポーザ Withdrawn JP2006134912A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2004318891A JP2006134912A (ja) 2004-11-02 2004-11-02 半導体モジュールおよびその製造方法、ならびにフィルムインターポーザ
US11/262,758 US20060091524A1 (en) 2004-11-02 2005-11-01 Semiconductor module, process for producing the same, and film interposer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004318891A JP2006134912A (ja) 2004-11-02 2004-11-02 半導体モジュールおよびその製造方法、ならびにフィルムインターポーザ

Publications (2)

Publication Number Publication Date
JP2006134912A JP2006134912A (ja) 2006-05-25
JP2006134912A5 true JP2006134912A5 (enExample) 2007-06-21

Family

ID=36260868

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004318891A Withdrawn JP2006134912A (ja) 2004-11-02 2004-11-02 半導体モジュールおよびその製造方法、ならびにフィルムインターポーザ

Country Status (2)

Country Link
US (1) US20060091524A1 (enExample)
JP (1) JP2006134912A (enExample)

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI289947B (en) * 2006-03-17 2007-11-11 Ind Tech Res Inst Bendable solid state planar light source, a flexible substrate therefor, and a manufacturing method therewith
DE102006032073B4 (de) * 2006-07-11 2016-07-07 Intel Deutschland Gmbh Elektrisch leitfähiger Verbund aus einem Bauelement und einer Trägerplatte
TWI375999B (en) * 2007-06-07 2012-11-01 Advanced Semiconductor Eng Substrate with bumps process and structure
US20090159128A1 (en) * 2007-12-21 2009-06-25 Gill Shook Leadframe receiver package for solar concentrator
US8505805B2 (en) * 2008-10-09 2013-08-13 Honeywell International Inc. Systems and methods for platinum ball bonding
US20100149773A1 (en) * 2008-12-17 2010-06-17 Mohd Hanafi Mohd Said Integrated circuit packages having shared die-to-die contacts and methods to manufacture the same
US9570376B2 (en) 2010-06-29 2017-02-14 General Electric Company Electrical interconnect for an integrated circuit package and method of making same
US8653670B2 (en) 2010-06-29 2014-02-18 General Electric Company Electrical interconnect for an integrated circuit package and method of making same
DE102011077614B4 (de) * 2011-06-16 2023-08-17 Osram Gmbh Verfahren zur Herstellung einer Leuchtvorrichtung und Leuchtvorrichtung
JP5985846B2 (ja) * 2011-06-29 2016-09-06 Flexceed株式会社 発光素子搭載用基板及びledパッケージ
JP2013033910A (ja) * 2011-06-29 2013-02-14 Hitachi Cable Ltd 発光素子搭載用基板、ledパッケージ、及びledパッケージの製造方法
JP2013033909A (ja) * 2011-06-29 2013-02-14 Hitachi Cable Ltd 発光素子搭載用基板及びledパッケージ
WO2013168196A1 (ja) 2012-05-10 2013-11-14 ユニテクノ株式会社 半導体搬送テスト治具
JP2015192555A (ja) * 2014-03-28 2015-11-02 株式会社東芝 半導体装置

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5745984A (en) * 1995-07-10 1998-05-05 Martin Marietta Corporation Method for making an electronic module
JPH09162320A (ja) * 1995-12-08 1997-06-20 Shinko Electric Ind Co Ltd 半導体パッケージおよび半導体装置
KR100298827B1 (ko) * 1999-07-09 2001-11-01 윤종용 재배선 기판을 사용한 웨이퍼 레벨 칩 스케일 패키지 제조방법
US6154366A (en) * 1999-11-23 2000-11-28 Intel Corporation Structures and processes for fabricating moisture resistant chip-on-flex packages
JP3865989B2 (ja) * 2000-01-13 2007-01-10 新光電気工業株式会社 多層配線基板、配線基板、多層配線基板の製造方法、配線基板の製造方法、及び半導体装置
JP2001320171A (ja) * 2000-05-08 2001-11-16 Shinko Electric Ind Co Ltd 多層配線基板及び半導体装置
US6680529B2 (en) * 2002-02-15 2004-01-20 Advanced Semiconductor Engineering, Inc. Semiconductor build-up package
JP3542350B2 (ja) * 2002-05-31 2004-07-14 沖電気工業株式会社 半導体装置及びその製造方法

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