JP2005184007A - 鉛直実装された半導体チップパッケージを有する半導体モジュール - Google Patents
鉛直実装された半導体チップパッケージを有する半導体モジュール Download PDFInfo
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Abstract
【解決手段】半導体モジュール100は、複数の接続ホール131が設けられるモジュール基板130と、第1端が接続ホールに鉛直方向に挿入される複数の半導体パッケージ110と、ベースプレート141及びベースプレートから鉛直下向きに突出する複数の突起143とが設けられるヒートシンク140とを有する。
【選択図】図4
Description
110 半導体チップパッケージ、
111 半導体チップ、
113 回路基板、
114 基板パッド、
115 基板接続パス、
117 接着剤、
119 ワイヤ、
121 封止部、
130 モジュール基板、
131 接続ホール、
133 内部接続パス、
137 はんだ、
140 ヒートシンク、
141 ベースプレート、
143 突起、
145 ヒートパイプ、
213 ダイパッド、
214a、214b リード、
216 絶縁接着剤、
423 ヒートスラグ、
512 チップパッド。
Claims (33)
- 複数の接続ホールを備えるモジュール基板と、
第1端が前記接続ホールに鉛直方向に挿入される複数の半導体パッケージと、
ベースプレートおよび前記ベースプレートから鉛直下向きに突出する複数の突起を備えるヒートシンクと、
を有することを特徴とする半導体モジュール。 - 前記モジュール基板は、第1面、第2面、および前記接続ホールに形成される複数の内部接続パスをさらに備え、
前記接続ホールは、相互に離隔して形成され、前記第1面及び第2面に接続されることを特徴とする請求項1に記載の半導体モジュール。 - 前記半導体パッケージは、前記モジュール基板の第1面に機械的に実装され、前記内部接続パスに電気的に接続可能に前記接続ホールに挿入されることを特徴とする請求項2に記載の半導体モジュール。
- 前記ベースプレートは、前記第2面に取り付けられ、
前記突起は、鉛直実装型の半導体パッケージが前記モジュール基板の接続ホールから延びる方向に対して逆方向に延びることを特徴とする請求項2に記載の半導体モジュール。 - 前記複数の半導体パッケージのうち少なくとも1つ以上の半導体パッケージは、少なくとも一つ以上の半導体チップを備えることを特徴とする請求項1に記載の半導体モジュール。
- 前記半導体チップを備える半導体パッケージは、前記半導体チップが取り付けられる回路基板を備えることを特徴とする請求項5に記載の半導体モジュール。
- 前記回路基板は、前記半導体チップと電気的に接続され、前記内部接続パスと接続可能に内部接続パスと密接して配置される複数の基板接続パスを備えることを特徴とする請求項6に記載の半導体モジュール。
- 前記回路基板は、前記半導体チップの下部に配置されるヒートスラグを備えることを特徴とする請求項6に記載の半導体モジュール。
- 前記半導体チップを備える半導体チップパッケージは、前記半導体チップが取り付けられるリードフレームを備えることを特徴とする請求項5に記載の半導体モジュール。
- 前記リードフレームは、前記半導体チップと電気的に接続され、前記内部接続パスと接続可能に内部接続パスと密接して配置される複数のリードペアを備えることを特徴とする請求項9に記載の半導体モジュール。
- 前記半導体チップは、複数の再配線パスが形成され前記内部接続パスと接続可能に内部接続パスと密接して配置された再配線チップであることを特徴とする請求項5に記載の半導体モジュール。
- 前記複数の半導体パッケージのうち少なくとも一つ以上の半導体パッケージは、少なくとも二つ以上の単位パッケージが左右に積層された積層型の半導体パッケージであることを特徴とする請求項1に記載の半導体モジュール。
- 前記二つ以上の積層型の半導体パッケージのうち少なくとも一つ以上の積層型の半導体パッケージにおける単位パッケージは、少なくとも一つ以上の半導体チップを備えることを特徴とする請求項12に記載の半導体モジュール。
- 前記半導体チップを備える単位パッケージは、半導体チップが取り付けられる回路基板を備えることを特徴とする請求項13に記載の半導体モジュール。
- 前記回路基板は、前記チップと電気的に接続され、前記内部接続パスと接続可能に内部接続パスと密接して配置される複数の基板接続パスを備えることを特徴とする請求項14に記載の半導体モジュール。
- 前記複数の半導体パッケージのうち少なくとも一つ以上の半導体パッケージは、少なくとも二つ以上の半導体チップが左右に積層されるチップ積層型の半導体パッケージであることを特徴とする請求項1に記載の半導体モジュール。
- 前記チップ積層型の半導体パッケージは、半導体チップがそれぞれ取り付けられる二つの回路基板を備えることを特徴とする請求項16に記載の半導体モジュール。
- 前記二つの回路基板のうち少なくとも一つ以上の回路基板は、前記半導体チップと電気的に接続され、前記内部接続パスと接続可能に内部接続パスと密接して配置される複数の基板接続パスを備えることを特徴とする請求項17に記載の半導体モジュール。
- 前記半導体チップは、複数の再配線パスを備え、前記内部接続パスと接続可能に内部接続パスと密接して配置される再配線チップであることを特徴とする請求項16に記載の半導体モジュール。
- 前記チップ積層型の半導体パッケージに積層される2つの半導体チップのうち、第1チップは、複数の再配線パスを備える再配線チップであり、第2チップは、複数のバンプを備え、当該第1チップの再配線パスと電気的に接続される半導体チップであることを特徴とする請求項16に記載の半導体モジュール。
- 前記チップ積層型の半導体パッケージは、前記第1チップと第2チップとの間に形成されて前記第1チップの再配線パスと連結される複数の接続リードを備え、前記接続リードは、前記内部接続パスと接続可能に内部接続パスと密接して配置されることを特徴とする請求項20に記載の半導体モジュール。
- 前記チップ積層型の半導体パッケージは、前記第1チップと第2チップとの間に形成されて前記第1チップの再配線パスと連結される複数の接続ワイヤを備え、前記接続ワイヤは、前記内部接続パスと接続可能に内部接続パスと密接して配置されることを特徴とする請求項20に記載の半導体モジュール。
- 前記接続ホールに形成される複数の内部接続パスと、
前記半導体パッケージと内部接続パスとの間に形成されるはんだと、
をさらに有することを特徴とする請求項1に記載の半導体モジュール。 - 前記ベースプレートは、前記接続ホールから鉛直下向きに突出する前記半導体パッケージの第1端が挿入可能な複数の溝を備えることを特徴とする請求項1に記載の半導体モジュール。
- 前記ヒートシンクは、前記ベースプレートから鉛直下向きに延びて前記モジュールから外部環境への冷却空気の流れを導くために折れ曲がる形状を呈する突起を備えることを特徴とする請求項1に記載の半導体モジュール。
- 前記ヒートシンクは、前記ベースプレートに配置され、前記モジュールの重心方向に傾斜する複数のヒートパイプを備えることを特徴とする請求項1に記載の半導体モジュール。
- 前記ヒートシンクは、接着剤により前記モジュール基板に取り付けられることを特徴とする請求項1に記載の半導体モジュール。
- 前記モジュールはメモリモジュールであることを特徴とする請求項1に記載の半導体モジュール。
- モジュール基板を形成する第1の形成段階と、
前記モジュール基板に複数の接続ホールを形成する第2の形成段階と、
複数の半導体パッケージの第1端を前記接続ホールに鉛直方向に挿入する挿入段階と、
ベースプレート及び前記ベースプレートから前記モジュール基板へと鉛直下向きに延びる複数の突起を備えるヒートシンクを取り付ける取り付け段階と、
を有することを特徴とする半導体モジュール製造方法。 - 前記接続ホールに複数の内部接続パスを形成する第3の形成段階をさらに有し、
前記第1の形成段階において、モジュール基板は、第1面と第2面とを備えるように形成され、
前記第2の形成段階において、接続ホールは、相互に離隔して形成され、前記第1及び第2面と接続されることを特徴とする請求項29に記載の半導体モジュール製造方法。 - 前記挿入段階において、前記半導体パッケージが前記モジュール基板の第1面に機械的に実装されて前記内部接続パスと電気的に接続可能なように前記接続ホールに前記半導体パッケージを挿入することを特徴とする請求項30に記載の半導体モジュール製造方法。
- 前記取り付け段階において、
前記ベースプレートを前記第2面に取り付け、
前記鉛直方向に挿入された半導体パッケージが前記モジュール基板の接続ホールから延びる方向に対して逆方向に延伸するように、前記突起を前記ベースプレートに取り付けることを特徴とする請求項30に記載の半導体モジュール製造方法。 - 請求項29の半導体モジュール製造方法により製造された半導体モジュール。
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