JP2005026648A - 実装基板の製造方法 - Google Patents
実装基板の製造方法 Download PDFInfo
- Publication number
- JP2005026648A JP2005026648A JP2003396908A JP2003396908A JP2005026648A JP 2005026648 A JP2005026648 A JP 2005026648A JP 2003396908 A JP2003396908 A JP 2003396908A JP 2003396908 A JP2003396908 A JP 2003396908A JP 2005026648 A JP2005026648 A JP 2005026648A
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- 239000000758 substrate Substances 0.000 title claims abstract description 66
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 23
- 238000004806 packaging method and process Methods 0.000 title abstract 4
- 229910000679 solder Inorganic materials 0.000 claims abstract description 60
- 238000000034 method Methods 0.000 claims abstract description 19
- 238000005476 soldering Methods 0.000 claims description 4
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 238000010030 laminating Methods 0.000 abstract 1
- 230000004907 flux Effects 0.000 description 20
- 239000004065 semiconductor Substances 0.000 description 14
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 5
- 239000006071 cream Substances 0.000 description 5
- 238000007650 screen-printing Methods 0.000 description 4
- 229910052709 silver Inorganic materials 0.000 description 4
- 239000004332 silver Substances 0.000 description 4
- 238000002844 melting Methods 0.000 description 3
- 230000008018 melting Effects 0.000 description 3
- 239000011347 resin Substances 0.000 description 3
- 229920005989 resin Polymers 0.000 description 3
- 238000007789 sealing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 239000010408 film Substances 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 239000002245 particle Substances 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Images
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K13/00—Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
- H05K13/04—Mounting of components, e.g. of leadless components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/061—Disposition
- H01L2224/0612—Layout
- H01L2224/0613—Square or rectangular array
- H01L2224/06134—Square or rectangular array covering only portions of the surface to be connected
- H01L2224/06135—Covering only the peripheral area of the surface to be connected, i.e. peripheral arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
- H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
- H01L2225/04—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
- H01L2225/065—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L2225/06503—Stacked arrangements of devices
- H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
- H01L2225/06568—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking the devices decreasing in size, e.g. pyramidical stack
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10515—Stacked components
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/1053—Mounted components directly electrically connected to each other, i.e. not via the PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3457—Solder materials or compositions; Methods of application thereof
- H05K3/3485—Applying solder paste, slurry or powder
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Combinations Of Printed Boards (AREA)
- Wire Bonding (AREA)
Abstract
【解決手段】下面に半田バンプが形成された第1の電子部品11,第2の電子部品12を基板3に複数段に積層して実装して成る実装基板を製造する実装基板の製造方法において、半田供給後の基板3に第1の電子部品11を搭載した後、第1の電子部品11の上面に形成された電極17に第2の電子部品12の半田バンプ18を搭載し、この後リフロー工程において基板3を加熱して第1の電子部品11を基板3に半田接合するとともに第2の電子部品12を第1の電子部品11に半田接合する。これにより、積層構造を低コストで広範囲の電子部品の種類に対して適用することができる。
【選択図】図6
Description
装基板製造ラインの構成図、図2は本発明の一実施の形態の電子部品実装装置の平面図、図3、図4は本発明の一実施の形態の実装基板に実装される電子部品の構造説明図、図5、図6は本発明の一実施の形態の実装基板の製造方法の工程説明図である。
品12などのパッケージ部品を積層した構成の高実装密度の実装基板が完成する。上述の実装基板の製造方法においては、積層構造を構成する第1の電子部品11、第2の電子部品12は単独のパッケージ部品としての製造過程において機能検査に合格していることから、これらの電子部品を電極17と半田バンプ18を介して半田接合によって実装した電子部品の実装構造は高い信頼性を有している。しかもこの実装構造は、既存の電子部品実装装置を用いて実現することができる。
3a、3b 電極
11 第1の電子部品
12 第2の電子部品
16、18 半田バンプ
17 電極
19 クリーム半田
20 フラックス
Claims (1)
- 下面に半田バンプが形成された電子部品を基板に複数段に積層して実装して成る実装基板を製造する実装基板の製造方法であって、前記基板の電極に半田を供給する半田供給工程と、前記基板の位置を認識する第1認識工程と、半田供給後の前記基板に第1段目の電子部品を前記第1認識工程の認識結果に基づいて位置合わせし前記半田バンプを前記電極上に着地させて搭載する第1搭載工程と、前記第1段目の電子部品の位置を認識する第2認識工程と、前記第1段目の電子部品に第2段目の電子部品を前記第2認識工程の認識結果に基づいて位置合わせし第2段目の電子部品の半田バンプを第1段目の電子部品の上面に形成された接続用電極上に着地させて搭載する第2搭載工程と、第1段目の電子部品と第2の電子部品が搭載された基板を加熱することにより、第1段目の電子部品を前記基板に半田接合するとともに第2段目の電子部品を第1段目の電子部品に半田接合するリフロー工程とを含むことを特徴とする実装基板の製造方法。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003396908A JP4357940B2 (ja) | 2003-06-09 | 2003-11-27 | 実装基板の製造方法 |
TW093116369A TW200507712A (en) | 2003-06-09 | 2004-06-08 | Method of manufacturing mounting boards |
US10/863,398 US7163137B2 (en) | 2003-06-09 | 2004-06-08 | Method of manufacturing mounting boards |
KR1020040042135A KR101053091B1 (ko) | 2003-06-09 | 2004-06-09 | 실장기판의 제조방법 |
CNB2004100493876A CN100531524C (zh) | 2003-06-09 | 2004-06-09 | 安装板的制造方法 |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003163624 | 2003-06-09 | ||
JP2003396908A JP4357940B2 (ja) | 2003-06-09 | 2003-11-27 | 実装基板の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2005026648A true JP2005026648A (ja) | 2005-01-27 |
JP4357940B2 JP4357940B2 (ja) | 2009-11-04 |
Family
ID=34196872
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003396908A Expired - Lifetime JP4357940B2 (ja) | 2003-06-09 | 2003-11-27 | 実装基板の製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7163137B2 (ja) |
JP (1) | JP4357940B2 (ja) |
KR (1) | KR101053091B1 (ja) |
CN (1) | CN100531524C (ja) |
TW (1) | TW200507712A (ja) |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007023825A1 (en) * | 2005-08-25 | 2007-03-01 | Matsushita Electric Industrial Co., Ltd. | Electronic component mounting method |
JP2007165580A (ja) * | 2005-12-14 | 2007-06-28 | Matsushita Electric Ind Co Ltd | 電子部品実装方法 |
JP2007287778A (ja) * | 2006-04-13 | 2007-11-01 | Matsushita Electric Ind Co Ltd | 電子部品搭載装置および半田ペースト転写ユニットならびに電子部品実装方法 |
JP2007305725A (ja) * | 2006-05-10 | 2007-11-22 | Matsushita Electric Ind Co Ltd | 部品実装装置および部品実装方法 |
WO2013084399A1 (ja) * | 2011-12-08 | 2013-06-13 | パナソニック株式会社 | 電子部品実装ライン及び電子部品実装方法 |
WO2013084398A1 (ja) * | 2011-12-08 | 2013-06-13 | パナソニック株式会社 | 電子部品実装ライン及び電子部品実装方法 |
WO2013094098A1 (ja) * | 2011-12-22 | 2013-06-27 | パナソニック株式会社 | 電子部品実装ライン及び電子部品実装方法 |
JP2015041703A (ja) * | 2013-08-22 | 2015-03-02 | 富士機械製造株式会社 | 電子部品装着システム及びその電子部品装着システムで用いられる印刷装置 |
JP2021132051A (ja) * | 2020-02-18 | 2021-09-09 | パナソニックIpマネジメント株式会社 | 部品実装システムおよび部品実装方法 |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2897503B1 (fr) * | 2006-02-16 | 2014-06-06 | Valeo Sys Controle Moteur Sas | Procede de fabrication d'un module electronique par fixation sequentielle des composants et ligne de production correspondante |
JP4816194B2 (ja) * | 2006-03-29 | 2011-11-16 | パナソニック株式会社 | 電子部品実装システムおよび電子部品搭載装置ならびに電子部品実装方法 |
US7793817B2 (en) * | 2006-09-11 | 2010-09-14 | Panasonic Corporation | Electronic component placing apparatus and electronic component mounting method |
WO2009025016A1 (ja) * | 2007-08-17 | 2009-02-26 | Fujitsu Limited | 部品実装装置及び方法 |
JP5305762B2 (ja) * | 2008-07-03 | 2013-10-02 | 富士機械製造株式会社 | 電子部品実装方法、および電子部品実装装置 |
CN102069368B (zh) * | 2010-12-07 | 2012-05-23 | 苏州和林精密科技有限公司 | 一种精密器件加工方法 |
CN103518424B (zh) * | 2011-05-26 | 2017-05-17 | 松下知识产权经营株式会社 | 电子部件安装方法、电子部件搭载装置以及电子部件安装系统 |
DE102017206105A1 (de) * | 2017-04-10 | 2018-10-11 | Robert Bosch Gmbh | Verfahren zum Herstellen eines elektronischen Steuermoduls |
WO2023272644A1 (zh) | 2021-06-30 | 2023-01-05 | 深南电路股份有限公司 | 一种电子组件、电压调节模块以及稳压器件 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5788143A (en) * | 1992-04-08 | 1998-08-04 | International Business Machines Corporation | Solder particle deposition |
US5435482A (en) * | 1994-02-04 | 1995-07-25 | Lsi Logic Corporation | Integrated circuit having a coplanar solder ball contact array |
US5531021A (en) * | 1994-12-30 | 1996-07-02 | Intel Corporation | Method of making solder shape array package |
SG75873A1 (en) * | 1998-09-01 | 2000-10-24 | Texas Instr Singapore Pte Ltd | Stacked flip-chip integrated circuit assemblage |
JP3597402B2 (ja) * | 1999-01-06 | 2004-12-08 | 株式会社リコー | フラックス転写方法 |
US6369448B1 (en) * | 2000-01-21 | 2002-04-09 | Lsi Logic Corporation | Vertically integrated flip chip semiconductor package |
JP4586273B2 (ja) | 2001-01-15 | 2010-11-24 | ソニー株式会社 | 半導体装置構造 |
JP4142312B2 (ja) * | 2002-02-28 | 2008-09-03 | ハリマ化成株式会社 | 析出型はんだ組成物及びはんだ析出方法 |
-
2003
- 2003-11-27 JP JP2003396908A patent/JP4357940B2/ja not_active Expired - Lifetime
-
2004
- 2004-06-08 TW TW093116369A patent/TW200507712A/zh unknown
- 2004-06-08 US US10/863,398 patent/US7163137B2/en not_active Expired - Lifetime
- 2004-06-09 KR KR1020040042135A patent/KR101053091B1/ko not_active IP Right Cessation
- 2004-06-09 CN CNB2004100493876A patent/CN100531524C/zh not_active Expired - Lifetime
Cited By (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2007023825A1 (en) * | 2005-08-25 | 2007-03-01 | Matsushita Electric Industrial Co., Ltd. | Electronic component mounting method |
JP2007059652A (ja) * | 2005-08-25 | 2007-03-08 | Matsushita Electric Ind Co Ltd | 電子部品実装方法 |
JP2007165580A (ja) * | 2005-12-14 | 2007-06-28 | Matsushita Electric Ind Co Ltd | 電子部品実装方法 |
JP2007287778A (ja) * | 2006-04-13 | 2007-11-01 | Matsushita Electric Ind Co Ltd | 電子部品搭載装置および半田ペースト転写ユニットならびに電子部品実装方法 |
JP4618186B2 (ja) * | 2006-04-13 | 2011-01-26 | パナソニック株式会社 | 電子部品搭載装置および半田ペースト転写ユニットならびに電子部品実装方法 |
JP2007305725A (ja) * | 2006-05-10 | 2007-11-22 | Matsushita Electric Ind Co Ltd | 部品実装装置および部品実装方法 |
JP4720608B2 (ja) * | 2006-05-10 | 2011-07-13 | パナソニック株式会社 | 部品実装装置および部品実装方法 |
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US9439335B2 (en) | 2011-12-08 | 2016-09-06 | Panasonic Intellectual Property Management Co., Ltd. | Electronic component mounting line and electronic component mounting method |
WO2013094098A1 (ja) * | 2011-12-22 | 2013-06-27 | パナソニック株式会社 | 電子部品実装ライン及び電子部品実装方法 |
US8673685B1 (en) | 2011-12-22 | 2014-03-18 | Panasonic Corporation | Electronic component mounting line and electronic component mounting method |
JP5519866B2 (ja) * | 2011-12-22 | 2014-06-11 | パナソニック株式会社 | 電子部品実装ライン及び電子部品実装方法 |
JP2015041703A (ja) * | 2013-08-22 | 2015-03-02 | 富士機械製造株式会社 | 電子部品装着システム及びその電子部品装着システムで用いられる印刷装置 |
JP2021132051A (ja) * | 2020-02-18 | 2021-09-09 | パナソニックIpマネジメント株式会社 | 部品実装システムおよび部品実装方法 |
JP7365542B2 (ja) | 2020-02-18 | 2023-10-20 | パナソニックIpマネジメント株式会社 | 部品実装システムおよび部品実装方法 |
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CN1575108A (zh) | 2005-02-02 |
KR20040105625A (ko) | 2004-12-16 |
CN100531524C (zh) | 2009-08-19 |
US20050161492A1 (en) | 2005-07-28 |
TW200507712A (en) | 2005-02-16 |
KR101053091B1 (ko) | 2011-08-01 |
JP4357940B2 (ja) | 2009-11-04 |
US7163137B2 (en) | 2007-01-16 |
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