JP2004119897A - 半導体記憶装置 - Google Patents

半導体記憶装置 Download PDF

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Publication number
JP2004119897A
JP2004119897A JP2002284447A JP2002284447A JP2004119897A JP 2004119897 A JP2004119897 A JP 2004119897A JP 2002284447 A JP2002284447 A JP 2002284447A JP 2002284447 A JP2002284447 A JP 2002284447A JP 2004119897 A JP2004119897 A JP 2004119897A
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Japan
Prior art keywords
power supply
memory cell
lines
line
word line
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Pending
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JP2002284447A
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Japanese (ja)
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JP2004119897A5 (enExample
Inventor
Tsuneo Inaba
稲場　恒夫
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Toshiba Corp
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Toshiba Corp
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Priority to JP2002284447A priority Critical patent/JP2004119897A/ja
Publication of JP2004119897A publication Critical patent/JP2004119897A/ja
Publication of JP2004119897A5 publication Critical patent/JP2004119897A5/ja
Pending legal-status Critical Current

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  • Mram Or Spin Memory Techniques (AREA)
  • Semiconductor Memories (AREA)
  • Hall/Mr Elements (AREA)
JP2002284447A 2002-09-27 2002-09-27 半導体記憶装置 Pending JP2004119897A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002284447A JP2004119897A (ja) 2002-09-27 2002-09-27 半導体記憶装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002284447A JP2004119897A (ja) 2002-09-27 2002-09-27 半導体記憶装置

Publications (2)

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JP2004119897A true JP2004119897A (ja) 2004-04-15
JP2004119897A5 JP2004119897A5 (enExample) 2005-09-29

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JP2002284447A Pending JP2004119897A (ja) 2002-09-27 2002-09-27 半導体記憶装置

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JP (1) JP2004119897A (enExample)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005191523A (ja) * 2003-12-24 2005-07-14 Hynix Semiconductor Inc マグネチックラム
JP2007311488A (ja) * 2006-05-17 2007-11-29 Toshiba Corp 磁気記憶装置
JP2013102067A (ja) * 2011-11-09 2013-05-23 Toppan Printing Co Ltd 不揮発性メモリ
JP2014170964A (ja) * 2009-08-26 2014-09-18 Qualcomm Inc 磁気ランダムアクセスメモリを製造するシステムおよび方法
EP3852161A1 (en) * 2020-01-16 2021-07-21 United Microelectronics Corp. Layout pattern for magnetoresistive random access memory
US20210350062A1 (en) * 2018-10-31 2021-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail with non-linear edge
US11983475B2 (en) * 2018-10-31 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method for manufacturing a cell having pins and semiconductor device based on same

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005191523A (ja) * 2003-12-24 2005-07-14 Hynix Semiconductor Inc マグネチックラム
JP2007311488A (ja) * 2006-05-17 2007-11-29 Toshiba Corp 磁気記憶装置
JP2014170964A (ja) * 2009-08-26 2014-09-18 Qualcomm Inc 磁気ランダムアクセスメモリを製造するシステムおよび方法
JP2013102067A (ja) * 2011-11-09 2013-05-23 Toppan Printing Co Ltd 不揮発性メモリ
US11983475B2 (en) * 2018-10-31 2024-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method for manufacturing a cell having pins and semiconductor device based on same
US20210350062A1 (en) * 2018-10-31 2021-11-11 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail with non-linear edge
US12019969B2 (en) * 2018-10-31 2024-06-25 Taiwan Semiconductor Manufacturing Company, Ltd. Power rail with non-linear edge
US12340165B2 (en) 2018-10-31 2025-06-24 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device having power rail with non-linear edge
US11374055B2 (en) 2020-01-16 2022-06-28 United Microelectronics Corp. Layout pattern for magnetoresistive random access memory
TWI811517B (zh) * 2020-01-16 2023-08-11 聯華電子股份有限公司 磁阻式隨機存取記憶體之佈局圖案
US11895848B2 (en) 2020-01-16 2024-02-06 United Microelectronics Corp. Layout pattern for magnetoresistive random access memory
EP3852161A1 (en) * 2020-01-16 2021-07-21 United Microelectronics Corp. Layout pattern for magnetoresistive random access memory
US12150315B2 (en) 2020-01-16 2024-11-19 United Microelectronics Corp. Layout pattern for magnetoresistive random access memory

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