JP2003264206A - 半導体装置 - Google Patents

半導体装置

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Publication number
JP2003264206A
JP2003264206A JP2002062546A JP2002062546A JP2003264206A JP 2003264206 A JP2003264206 A JP 2003264206A JP 2002062546 A JP2002062546 A JP 2002062546A JP 2002062546 A JP2002062546 A JP 2002062546A JP 2003264206 A JP2003264206 A JP 2003264206A
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Japan
Prior art keywords
semiconductor device
electrode
recessed
shows
electrode portion
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002062546A
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English (en)
Other versions
JP3785104B2 (ja
JP2003264206A5 (ja
Inventor
Masaaki Kadoi
聖明 門井
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
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Seiko Instruments Inc
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Application filed by Seiko Instruments Inc filed Critical Seiko Instruments Inc
Priority to JP2002062546A priority Critical patent/JP3785104B2/ja
Publication of JP2003264206A publication Critical patent/JP2003264206A/ja
Publication of JP2003264206A5 publication Critical patent/JP2003264206A5/ja
Application granted granted Critical
Publication of JP3785104B2 publication Critical patent/JP3785104B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

(57)【要約】 【課題】 厚みの薄いパッケージ加工および表面実装が
可能な、半導体装置のチップサイズを小さくできる半導
体装置の提供。 【解決手段】 半導体基板3の電極部2を、半導体基板
3の表面より窪ませている構造を有し、前記電極部2が
周辺二辺に対して窪んでいる。

Description

【発明の詳細な説明】
【0001】
【産業上の利用分野】 本発明は、1.半導体装置のパ
ッケージにおいて、従来より、厚みの薄い加工が可能な
半導体装置。2.電極間ピッチも狭めることが可能な半
導体装置。3.バンプを用いて実装高さを低くすること
が可能な半導体装置の構造に関する。
【0002】
【従来の技術】半導体装置はSi基板等の半導体表面に回
路を形成したチップをリードフレーム上にのせ樹脂で封
止させパッケージ加工を行い信頼性を確保していた。
【0003】従来、半導体装置表面の電極より金属細線
を用いてリードフレームと半導体装置を電機的に接続を
行い樹脂封止したパッケージを用いてきた。
【0004】図16(a)に従来のパッケージを示す。
図16(a)は半導体装置3がリードフレーム上6にのせ
られ金属細線を介して半導体装置表面の電極よりからリ
ードフレームまでが電気的に接続されている状態を示
す。従来、金属細線は破断することが無いように円弧を
描くようにして接続されるためパッケージの保護樹脂は
信頼性を確保するためにこの金属細線の高さよりさらに
厚く形成される必要があった。そのため、パッケージを
薄くするには半導体装置白身の厚みを薄くしたりリード
フレームの厚みを薄くする改善がなされてきた。
【0005】しかし、半導体装置の厚みもリードフレー
ムの厚みもパッケージを組み立てるための最低限の機械
強度は維持する必要があるためパッケージの薄型化が困
難となってきた。
【0006】図16(b)に従来の金属細線のボンデイ
ング状態を示す。半導体装置の電極部にあるボールが横
方向に大きく広がっている。このためボンデイング間隔
がボールの広がり分広くしなければならず、電極聞ピッ
チを狭めることができなかった。図16(c)に従来の
金バンプの実装状態を示す。パンプの高さ分実装高さが
厚くなっていた。
【0007】
【発明が解決しようとする課題】したがって、本発明
は、1.従来と同じ金属細線でもパッケージの厚みを薄
くすることができる半導体装置の構造である。2.金属
細線のボンデイングにおいてつぶれたボールが電極より
外に広がらないことで、半導体装置の電極聞ピッチも狭
めることが可能な半導体装置の構造である。3.バンプ
付きの半導体装置で電極を窪ませた分だけ実装高さを低
くできる半導体装置の構造である。
【0008】
【課題を解決するための手段】 前記課題を解決するた
めに本発明は1.半導体装置表面の電極部を半導体装置
表面より窪ませることにより、半導体装置電極部とパッ
ケージリードを接続する金属線の高さを低くし、従来よ
りも厚みの薄いパッケージが可能となる半導体装置の構
造である。2.半導体装置表面の電極部を半導体装置表
面より窪ませることにより、金属細線のボンデイングに
おいてつぶれたボールが電極より外に広がらないこと
で、半導体装置の電極間ピッチも狭めることが可能な半
導体装置の構造である。3.半導体装置表面の電極部を
半導体装置表面より窪ませることにより、バンプ付きの
半導体装置で電極を窪ませた分だけ実装高さを低くでき
る半導体装置の構造である。
【0009】
【発明の実施の形態】 本発明は1.半導体装置のパッ
ケージにおいて従来のワイヤーボンデイング技術のまま
パッケージの厚みを薄くすることが可能な半導体装置の
構造に関する。この構造は半導体装置を金属細線でリー
ドフレームに接続するパッケージのために開発された。
2.半導体装置の金属細線のボンデイングにおいて、つ
ぶれたボールが電極より外に広がらないことで、半導体
装置の電極間ピッチも狭めることが可能な半導体装置の
構造に関する。3.バンプ付きの半導体装置で実装高さ
を低くできる半導体装置の構造に関する。
【0010】本発明は1.従釆よりも厚みの薄いパッケ
ージが可能な半導体装置の構造を対象とする。2.従来
よりも電極ピッチが狭められる半導体装置の構造を対象
とする。3.バンプ付きの半導体装置で実装高さを低く
できる半導体装置の構造を対象とする。
【0011】
【実施例】図1に本発明を用いた半導体装置のパッケー
ジ断面を示す。半導体装置は電極部が半導体装置表面よ
り窪んでいる。この電極部をパッケージリード部**と
金属細線**をボンデイングして電気的に接続してい
る。
【0012】電極部が窪んでいる分金属細線の高さが低
くなり、合わせて半導体装置のパッケージ厚みが金属細
線の高さが低くなった分薄くなる。
【0013】図2に本発明を用いた電極部を示す。電極
部は半導体装置表面のどこにあるかによって図3に示す
ように電極部が周辺に対し四辺から二辺窪む構造とな
る。
【0014】図3に窪んでいる電極部の側壁に電極を有
する場合と、側壁を配線として使用して電極として使用
しない場合の構造を示す。側壁を電極として使用するこ
とで金属細線と電極との接続面積を増やすことが可能と
なる。この構造は図2に示す電極部周辺の側壁と合わせ
て使用することができる。
【0015】図4に電極部の四辺の側壁を電極として使
用する場合の例を示す。金属細線のボール高さの1/2以
上電極のくぼみが深くすることで、金属細線のボンデイ
ング時にボールの横方向への広がりを電極側壁部でせき
止めることができる。したがって、金属細線のボンデイ
ング間隔を従来のものより狭めることが可能となり半導
体チップサイズを小さくすることが可能となる。図5に
金属細線のボンデイング時にボールの横方向への広がり
を電極側壁部でせき止めた実施例を示す。
【0016】図6に半導体装置表面の電極部を含む部分
を窪ませた構造の実施例を示す。これにより電極都ヘバ
ンプ加工が可能となった。
【0017】図7に半導体装置の電極部を含む外周の一
部を窪ませた構造の実施例を示す。これにより隣接する
電極部を各々窪ませるのではなく一つのくぼみの中に電
極を複数個形成することで電極部へバンプ加工が可能と
なった。
【0018】図8に半導体装置電極部を含む外局すべて
を窪ませた構造の実施例を示す。図9に窪んでいる電極
部の底面部に凹凸をつけた構造の実施例を示す。このと
き電極底面部での接続は金属細線との接続面積を増やし
接続強度を向上させ接続信頼性を高くできる。図10に
窪んでいる電極部の側壁部に凹凸をつけた構造の実施例
を示す。このとき電極側壁部での接続は金属細線との接
続面積を増やし接続強度を向上させ接続信頼性を高くで
きる。
【0019】図11に窪んでいる亀極部の底面および側
壁部に凹凸をつけた構造の実施例を示す。このとき電極
底面および側壁部での接続は金属細綿との接続面積を増
やし接続強度を向上させ接続信頼性を高くできる。図1
2に窪んでいる電極部と窪んでいない電極部を有する半
導体装置を示す。これにより従来の金属細線のボンデイ
ングの下に本発明の金属細線のボンデイングが入り半導
体装置への入出力密度を上げることができる金属細線の
ボンデイングが可能となった。
【0020】図13に窪んでいる電極部に金パンプを形
成した半導体装置を示す。これにより、TAB、COG、COF
実装などにおいても、従来よりも電極部が窪んだ分実装
の高さを低くすることができる。また、図14に半円バ
ンプの実施例を示す。この場合にも同様で半円バンプの
スタンドオフ量を減らすことなく実装高さを低くするこ
とが可能である。これはSn−Pb半田だけではなくPbフ
リー半田においても同様である。
【0021】図15に窪んでいる電極部の側壁に半導体
回路を形成した半導体装置を示す。これにより半導体回
路の集積度をあげることができ半導体装置の小型化がで
きる。
【0022】
【発明の効果】本発明によって得られた半導体装置は半
導体装置荘表面の電極部を装置表面より窪ませることに
より、1.半導体装置電極部とパッケージリードを接続
する金属線の高さを低くし、従来よりも厚みの薄いパッ
ケージが可能となる半導体装置の構造であり、パッケー
ジの小型化に有用である。2.金属細線のボンデイング
においてつぶれたボールが電極より外に広がらないこと
で、半導体装置の電極間ピッチも狭めることができる。
3.窪んだ電極側壁部も利用することで接続面積を増加
させることで接続信頼性を向上できる。窪んでいる電極
と窪んでいない電極を組み合わせることで半導体装置へ
の入出力密度を上げることができる。5.窪んでいる電
部にバンプを形成し実装の高さを低くすることができ
る。
【図面の簡単な説明】
【図1】本発明を用いた半導体装置のパッケージ断面を
示す。
【図2】本発明を用いた半導体装置の電極部を示す。
【図3】本発明を用いた半導体装置の電極部を示す。
【図4】本発明を用いた金属細線のボンデイングを示
す。
【図5】本発明を用いた半導体装置の電極部を示す。
【図6】本発明を用いた半導体装置を示す。
【図7】本発明を用いた半導体装置を示す。
【図8】本発明を用いた金属細線のボンデイングを示
す。
【図9】本発明を用いた金属細線のボンデイングを示
す。
【図10】本発明を用いた金属細線のボンデイングを示
す。
【図11】本発明を用いた金属細線のボンデイングを示
す。
【図12】本発明を用いた窪んでいる電極部と窪んでい
ない電極部を有する半導体装置を示す。
【図13】本発明を用いた金パンプの実装を示す。
【図14】本発明を用いた半日バンプの実装を示す。
【図15】本発明を用いた半導体装置の電極部を示す。
【図16】(a)従来技術の半導体装置のパッケージ断
面を示す。 (b)従来技術の金属細線のボンデイングを示す。 (c)従来技術の金パンプの実装を示す。
【符号の観明】1 金属細線 2 電極部 3 半導体基板 4 保護膜 5 保護樹脂 6 リードフレーム 7 金バンプ 8 半田(Pbフリー)バンプ 9 リードフレーム 10 半導体回路 11 金属細線 12 電極部 13 半導体基板 14 めっきマスク 15 半田バンプ

Claims (9)

    【特許請求の範囲】
  1. 【請求項1】 半導体基板表面の電極部を、前記半導体
    基板表面より窪ませている構造を有し、 前記電極部が周辺二辺に対して窪んでいることを特徴と
    する半導体装置。
  2. 【請求項2】 前紀電極都が窪んでいる辺の側壁に電極
    を有する事を特徴とする請求項1に記載の半導体装置。
  3. 【請求項3】 金属細線のボールが潰れた時の高さの1
    /2以上前記電極のくぼみが深いことを特徴とする請求
    項1又は2に記載の半導体装置。
  4. 【請求項4】 前記半導体装置表面の電極部を含む部分
    を窪ませる事を特徴とする請求項1ないし3に記載の半
    導体装置。
  5. 【請求項5】 前記半導体装置の電極部を含む外周の一
    部を窪ませることを持徹とする請求項4に記載の半導体
    装置。
  6. 【請求項6】 窪んでいる電極部の側壁に半導体回路を
    有することを特徴とする諦求項5に記載の半導体装置。
  7. 【請求項7】 窪んでいる電極部にバンプを形成するこ
    とを特徴とする請求項6に記載の半導体装置。
  8. 【請求項8】 前記記載のバンプが金バンプであること
    を特徴とする計求項6に記載の半導体装置。
  9. 【請求項9】 前記記載のバンプがSn−Pbバンプで
    あることを特徴とする請求項6に記載の半導体装置。 【計求項10】 前記記載のバンプがPbフリーバンプ
    であることを特徴とする請求項6に記載の半導体装置。
JP2002062546A 2002-03-07 2002-03-07 半導体装置 Expired - Fee Related JP3785104B2 (ja)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011108686A (ja) * 2009-11-12 2011-06-02 Ricoh Co Ltd 半導体装置
CN105453109A (zh) * 2013-08-23 2016-03-30 指纹卡有限公司 用于指纹感测装置的连接垫

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011108686A (ja) * 2009-11-12 2011-06-02 Ricoh Co Ltd 半導体装置
CN105453109A (zh) * 2013-08-23 2016-03-30 指纹卡有限公司 用于指纹感测装置的连接垫
EP3036688A4 (en) * 2013-08-23 2017-05-17 Fingerprint Cards AB Connection pads for a fingerprint sensing device
CN105453109B (zh) * 2013-08-23 2018-05-29 指纹卡有限公司 用于指纹感测装置的连接垫

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