JP2003150574A5 - - Google Patents

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Publication number
JP2003150574A5
JP2003150574A5 JP2001350151A JP2001350151A JP2003150574A5 JP 2003150574 A5 JP2003150574 A5 JP 2003150574A5 JP 2001350151 A JP2001350151 A JP 2001350151A JP 2001350151 A JP2001350151 A JP 2001350151A JP 2003150574 A5 JP2003150574 A5 JP 2003150574A5
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JP
Japan
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001350151A
Other versions
JP4136359B2 (ja
JP2003150574A (ja
Filing date
Publication date
Application filed filed Critical
Priority claimed from JP2001350151A external-priority patent/JP4136359B2/ja
Priority to JP2001350151A priority Critical patent/JP4136359B2/ja
Priority to TW091109029A priority patent/TW577019B/zh
Priority to US10/138,567 priority patent/US6959365B2/en
Priority to DE10236011A priority patent/DE10236011A1/de
Priority to KR10-2002-0046429A priority patent/KR100474622B1/ko
Publication of JP2003150574A publication Critical patent/JP2003150574A/ja
Publication of JP2003150574A5 publication Critical patent/JP2003150574A5/ja
Publication of JP4136359B2 publication Critical patent/JP4136359B2/ja
Application granted granted Critical
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2001350151A 2001-11-15 2001-11-15 マイクロコンピュータ Expired - Fee Related JP4136359B2 (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP2001350151A JP4136359B2 (ja) 2001-11-15 2001-11-15 マイクロコンピュータ
TW091109029A TW577019B (en) 2001-11-15 2002-04-30 Microcomputer
US10/138,567 US6959365B2 (en) 2001-11-15 2002-05-06 Microcomputer including a flash memory and a flash memory rewrite program stored therein
DE10236011A DE10236011A1 (de) 2001-11-15 2002-08-06 Mikrocomputer
KR10-2002-0046429A KR100474622B1 (ko) 2001-11-15 2002-08-07 마이크로컴퓨터

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001350151A JP4136359B2 (ja) 2001-11-15 2001-11-15 マイクロコンピュータ

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007308539A Division JP4343244B2 (ja) 2007-11-29 2007-11-29 マイクロコンピュータ

Publications (3)

Publication Number Publication Date
JP2003150574A JP2003150574A (ja) 2003-05-23
JP2003150574A5 true JP2003150574A5 (ja) 2005-07-14
JP4136359B2 JP4136359B2 (ja) 2008-08-20

Family

ID=19162712

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001350151A Expired - Fee Related JP4136359B2 (ja) 2001-11-15 2001-11-15 マイクロコンピュータ

Country Status (5)

Country Link
US (1) US6959365B2 (ja)
JP (1) JP4136359B2 (ja)
KR (1) KR100474622B1 (ja)
DE (1) DE10236011A1 (ja)
TW (1) TW577019B (ja)

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JP3980901B2 (ja) * 2002-02-12 2007-09-26 沖電気工業株式会社 デジタル信号処理装置
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FI20035041A0 (fi) * 2003-03-31 2003-03-31 Nokia Corp Menetelmä tiedon tallentamiseksi muistiin, järjestelmä, elektroniikkalaite ja muistikortti
US7579683B1 (en) 2004-06-29 2009-08-25 National Semiconductor Corporation Memory interface optimized for stacked configurations
US7426613B2 (en) * 2005-06-16 2008-09-16 Lexmark International, Inc. Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
US8521970B2 (en) 2006-04-19 2013-08-27 Lexmark International, Inc. Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
US9245591B2 (en) 2005-06-16 2016-01-26 Lexmark International, Inc. Addressing, command protocol, and electrical interface for non-volatile memories utilized in recording usage counts
JP4925162B2 (ja) * 2005-11-07 2012-04-25 株式会社メガチップス メモリ装置
US7567461B2 (en) * 2006-08-18 2009-07-28 Micron Technology, Inc. Method and system for minimizing number of programming pulses used to program rows of non-volatile memory cells
JP4626595B2 (ja) * 2006-09-12 2011-02-09 Tdk株式会社 メモリコントローラ及びメモリコントローラを備えるフラッシュメモリシステム、並びにフラッシュメモリの制御方法
KR101364443B1 (ko) * 2007-01-31 2014-02-17 삼성전자주식회사 메모리 시스템, 이 시스템을 위한 메모리 제어기와 메모리,이 시스템의 신호 구성 방법
US7950014B2 (en) * 2007-06-01 2011-05-24 Microsoft Corporation Detecting the ready state of a user interface element
KR101581311B1 (ko) * 2009-03-11 2015-12-31 삼성전자주식회사 플래시 메모리 장치 및 그 제어 방법
KR20100115583A (ko) * 2009-04-20 2010-10-28 삼성전자주식회사 데이터 저장 시스템
JP5325650B2 (ja) * 2009-05-11 2013-10-23 ルネサスエレクトロニクス株式会社 半導体チップ
KR101034457B1 (ko) * 2009-09-23 2011-05-17 성신아이앤텍 주식회사 진동모터 케이스 제조방법
TWI420313B (zh) * 2010-12-24 2013-12-21 Phison Electronics Corp 資料管理方法、記憶體控制器與嵌入式記憶體儲存裝置
US8737849B2 (en) * 2011-05-02 2014-05-27 Static Control Components, Inc. Addressing for a memory device used in an image recording apparatus
TWI464593B (zh) * 2012-03-03 2014-12-11 Nuvoton Technology Corp 輸出輸入控制裝置與其控制方法
JP6217664B2 (ja) 2015-02-10 2017-10-25 トヨタ自動車株式会社 マイコン装置
KR102336730B1 (ko) * 2015-09-30 2021-12-07 에스케이하이닉스 주식회사 상태 신호를 출력하는 반도체 메모리 장치 및 그것의 동작 방법
JP6950383B2 (ja) * 2017-09-12 2021-10-13 株式会社豊田自動織機 メモリアクセス装置及びメモリアクセス方法
US10628344B2 (en) * 2017-09-22 2020-04-21 Macronix International Co., Ltd. Controlling method, channel operating circuit and memory system for executing memory dies with single channel
KR20210014363A (ko) * 2019-07-30 2021-02-09 에스케이하이닉스 주식회사 저장 장치 및 그 동작 방법
US11698734B2 (en) 2020-07-22 2023-07-11 Seagate Technology Llc Collision reduction through just-in-time resource allocation

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JP2001306543A (ja) * 2000-04-19 2001-11-02 Nec Corp マイクロコンピュータ及びフラッシュメモリのデータ書換え方法
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