JP2003059260A - 半導体集積回路 - Google Patents
半導体集積回路Info
- Publication number
- JP2003059260A JP2003059260A JP2001245570A JP2001245570A JP2003059260A JP 2003059260 A JP2003059260 A JP 2003059260A JP 2001245570 A JP2001245570 A JP 2001245570A JP 2001245570 A JP2001245570 A JP 2001245570A JP 2003059260 A JP2003059260 A JP 2003059260A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- voltage
- power supply
- supply voltage
- node
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Read Only Memory (AREA)
- Control Of Electrical Variables (AREA)
- Dram (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001245570A JP2003059260A (ja) | 2001-08-13 | 2001-08-13 | 半導体集積回路 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001245570A JP2003059260A (ja) | 2001-08-13 | 2001-08-13 | 半導体集積回路 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003059260A true JP2003059260A (ja) | 2003-02-28 |
| JP2003059260A5 JP2003059260A5 (https=) | 2005-07-21 |
Family
ID=19075291
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001245570A Pending JP2003059260A (ja) | 2001-08-13 | 2001-08-13 | 半導体集積回路 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2003059260A (https=) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7164303B2 (en) | 2003-11-25 | 2007-01-16 | Seiko Epson Corporation | Delay circuit, ferroelectric memory device and electronic equipment |
| JP2007080478A (ja) * | 2005-08-19 | 2007-03-29 | Toshiba Corp | 半導体集積回路装置 |
| JP2008234767A (ja) * | 2007-03-20 | 2008-10-02 | Toshiba Corp | 電源降圧回路 |
| JP2008305499A (ja) * | 2007-06-08 | 2008-12-18 | Fujitsu Microelectronics Ltd | 半導体集積回路およびシステム |
| JP2017054340A (ja) * | 2015-09-10 | 2017-03-16 | 日本電信電話株式会社 | 分圧バッファ回路 |
| JP2021131915A (ja) * | 2020-02-18 | 2021-09-09 | ウィンボンド エレクトロニクス コーポレーション | 半導体装置 |
-
2001
- 2001-08-13 JP JP2001245570A patent/JP2003059260A/ja active Pending
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7164303B2 (en) | 2003-11-25 | 2007-01-16 | Seiko Epson Corporation | Delay circuit, ferroelectric memory device and electronic equipment |
| JP2007080478A (ja) * | 2005-08-19 | 2007-03-29 | Toshiba Corp | 半導体集積回路装置 |
| JP2008234767A (ja) * | 2007-03-20 | 2008-10-02 | Toshiba Corp | 電源降圧回路 |
| JP2008305499A (ja) * | 2007-06-08 | 2008-12-18 | Fujitsu Microelectronics Ltd | 半導体集積回路およびシステム |
| US8284619B2 (en) | 2007-06-08 | 2012-10-09 | Fujitsu Semiconductor Limited | Semiconductor integrated circuit and system |
| JP2017054340A (ja) * | 2015-09-10 | 2017-03-16 | 日本電信電話株式会社 | 分圧バッファ回路 |
| JP2021131915A (ja) * | 2020-02-18 | 2021-09-09 | ウィンボンド エレクトロニクス コーポレーション | 半導体装置 |
| US11417403B2 (en) | 2020-02-18 | 2022-08-16 | Winbond Electronics Corp. | Semiconductor device |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20041126 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20041126 |
|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20070803 |
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| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20070821 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20080415 |