JP2002539641A - 半導体の接触抵抗を減少させるための方法 - Google Patents

半導体の接触抵抗を減少させるための方法

Info

Publication number
JP2002539641A
JP2002539641A JP2000606048A JP2000606048A JP2002539641A JP 2002539641 A JP2002539641 A JP 2002539641A JP 2000606048 A JP2000606048 A JP 2000606048A JP 2000606048 A JP2000606048 A JP 2000606048A JP 2002539641 A JP2002539641 A JP 2002539641A
Authority
JP
Japan
Prior art keywords
polymer
etching
layer
plasma
contact
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000606048A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002539641A5 (ko
Inventor
ビクター、クー
デルバート、パークス
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Electronics NV filed Critical Philips Electronics NV
Publication of JP2002539641A publication Critical patent/JP2002539641A/ja
Publication of JP2002539641A5 publication Critical patent/JP2002539641A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31105—Etching inorganic layers
    • H01L21/31111—Etching inorganic layers by chemical means
    • H01L21/31116—Etching inorganic layers by chemical means by dry-etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
    • H01L21/76814—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2000606048A 1999-03-15 2000-03-15 半導体の接触抵抗を減少させるための方法 Pending JP2002539641A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/270,123 US6184119B1 (en) 1999-03-15 1999-03-15 Methods for reducing semiconductor contact resistance
US09/270,123 1999-03-15
PCT/US2000/007009 WO2000055903A1 (en) 1999-03-15 2000-03-15 Methods for reducing semiconductor contact resistance

Publications (2)

Publication Number Publication Date
JP2002539641A true JP2002539641A (ja) 2002-11-19
JP2002539641A5 JP2002539641A5 (ko) 2007-05-24

Family

ID=23030000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000606048A Pending JP2002539641A (ja) 1999-03-15 2000-03-15 半導体の接触抵抗を減少させるための方法

Country Status (6)

Country Link
US (2) US6184119B1 (ko)
EP (1) EP1082761A1 (ko)
JP (1) JP2002539641A (ko)
KR (1) KR100708493B1 (ko)
CN (1) CN1304552A (ko)
WO (1) WO2000055903A1 (ko)

Cited By (1)

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JP2011166120A (ja) * 2010-02-12 2011-08-25 Samsung Electronics Co Ltd 薄膜トランジスター及びその形成方法

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US6268274B1 (en) * 1999-10-14 2001-07-31 Taiwan Semiconductor Manufacturing Company Low temperature process for forming inter-metal gap-filling insulating layers in silicon wafer integrated circuitry
US6271115B1 (en) * 2000-06-26 2001-08-07 Chartered Semiconductor Manufacturing Ltd. Post metal etch photoresist strip method
DE10040465A1 (de) * 2000-08-18 2002-03-07 Infineon Technologies Ag Prozessführung für eine Metall/Metall-Kontaktherstellung
JP3400782B2 (ja) * 2000-09-05 2003-04-28 株式会社日立製作所 ガラスキャピラリの被覆の除去方法及びガラスキャピラリ
KR100434312B1 (ko) * 2000-12-21 2004-06-05 주식회사 하이닉스반도체 반도체 소자의 콘택홀 형성 방법
US7172960B2 (en) * 2000-12-27 2007-02-06 Intel Corporation Multi-layer film stack for extinction of substrate reflections during patterning
TW518688B (en) * 2001-04-26 2003-01-21 Silicon Integrated Sys Corp Etching process of dielectric layer
KR100451033B1 (ko) * 2002-06-27 2004-10-02 동부전자 주식회사 반도체 소자의 제조방법
US6686247B1 (en) * 2002-08-22 2004-02-03 Intel Corporation Self-aligned contacts to gates
US20090032880A1 (en) * 2007-08-03 2009-02-05 Applied Materials, Inc. Method and apparatus for tunable isotropic recess etching of silicon materials
CN101459125B (zh) * 2007-12-13 2011-08-17 中芯国际集成电路制造(上海)有限公司 连接孔的形成方法
US8614151B2 (en) * 2008-01-04 2013-12-24 Micron Technology, Inc. Method of etching a high aspect ratio contact
CN101645408B (zh) * 2008-08-04 2012-05-16 中芯国际集成电路制造(北京)有限公司 焊盘及其形成方法
CN101777491B (zh) * 2009-01-09 2011-10-05 中芯国际集成电路制造(上海)有限公司 开启接触孔的方法
US8809196B2 (en) * 2009-01-14 2014-08-19 Tokyo Electron Limited Method of etching a thin film using pressure modulation
CN102097360B (zh) * 2009-12-10 2016-08-03 中芯国际集成电路制造(上海)有限公司 刻蚀连接孔的方法
US9368599B2 (en) * 2010-06-22 2016-06-14 International Business Machines Corporation Graphene/nanostructure FET with self-aligned contact and gate
US8389358B2 (en) * 2011-07-22 2013-03-05 United Microelectronics Corp. Manufacturing method and structure of non-volatile memory
JP5859262B2 (ja) * 2011-09-29 2016-02-10 東京エレクトロン株式会社 堆積物除去方法
US8765613B2 (en) * 2011-10-26 2014-07-01 International Business Machines Corporation High selectivity nitride etch process
CN103730349B (zh) * 2012-10-10 2016-08-03 中芯国际集成电路制造(上海)有限公司 一种形成接触孔的方法
CN108701613A (zh) * 2016-03-25 2018-10-23 日本瑞翁株式会社 等离子体蚀刻方法

Citations (4)

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JPH05102076A (ja) * 1991-03-06 1993-04-23 Mitsubishi Electric Corp 半導体装置の製造方法
JPH08181109A (ja) * 1994-12-22 1996-07-12 Sony Corp アッシング装置及びレジストのアッシング除去方法
JPH0950986A (ja) * 1995-05-29 1997-02-18 Sony Corp 接続孔の形成方法
JPH09293689A (ja) * 1996-04-26 1997-11-11 Sony Corp 接続孔の形成方法

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US4978420A (en) * 1990-01-03 1990-12-18 Hewlett-Packard Company Single chamber via etch through a dual-layer dielectric
US5176790A (en) * 1991-09-25 1993-01-05 Applied Materials, Inc. Process for forming a via in an integrated circuit structure by etching through an insulation layer while inhibiting sputtering of underlying metal
US5269879A (en) * 1991-10-16 1993-12-14 Lam Research Corporation Method of etching vias without sputtering of underlying electrically conductive layer
US5419805A (en) * 1992-03-18 1995-05-30 Northern Telecom Limited Selective etching of refractory metal nitrides
US5417826A (en) * 1992-06-15 1995-05-23 Micron Technology, Inc. Removal of carbon-based polymer residues with ozone, useful in the cleaning of plasma reactors
JP2720763B2 (ja) 1993-09-17 1998-03-04 日本電気株式会社 半導体装置の製造方法
US5468342A (en) * 1994-04-28 1995-11-21 Cypress Semiconductor Corp. Method of etching an oxide layer
JP3529849B2 (ja) 1994-05-23 2004-05-24 富士通株式会社 半導体装置の製造方法
US5514247A (en) * 1994-07-08 1996-05-07 Applied Materials, Inc. Process for plasma etching of vias
US5780359A (en) * 1995-12-11 1998-07-14 Applied Materials, Inc. Polymer removal from top surfaces and sidewalls of a semiconductor wafer
US6066555A (en) * 1995-12-22 2000-05-23 Cypress Semiconductor Corporation Method for eliminating lateral spacer erosion on enclosed contact topographies during RF sputter cleaning
US5661083A (en) * 1996-01-30 1997-08-26 Integrated Device Technology, Inc. Method for via formation with reduced contact resistance
US5702869A (en) * 1996-06-07 1997-12-30 Vanguard International Semiconductor Corporation Soft ashing method for removing fluorinated photoresists layers from semiconductor substrates
EP0867924B1 (en) 1997-02-14 2011-08-31 Imec Method for removing organic contaminants from a semiconductor surface
US5851302A (en) 1997-02-19 1998-12-22 Vlsi Technology, Inc. Method for dry etching sidewall polymer
JP3027951B2 (ja) 1997-03-12 2000-04-04 日本電気株式会社 半導体装置の製造方法
US6051505A (en) * 1998-03-05 2000-04-18 Taiwan Semiconductor Manufacturing Company Plasma etch method for forming metal-fluoropolymer residue free vias through silicon containing dielectric layers
US6594240B1 (en) * 1998-05-22 2003-07-15 Lucent Technologies Inc. Methods and apparatus for random backoff based access priority in a communications system
US6117793A (en) * 1998-09-03 2000-09-12 Micron Technology, Inc. Using silicide cap as an etch stop for multilayer metal process and structures so formed

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05102076A (ja) * 1991-03-06 1993-04-23 Mitsubishi Electric Corp 半導体装置の製造方法
JPH08181109A (ja) * 1994-12-22 1996-07-12 Sony Corp アッシング装置及びレジストのアッシング除去方法
JPH0950986A (ja) * 1995-05-29 1997-02-18 Sony Corp 接続孔の形成方法
JPH09293689A (ja) * 1996-04-26 1997-11-11 Sony Corp 接続孔の形成方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011166120A (ja) * 2010-02-12 2011-08-25 Samsung Electronics Co Ltd 薄膜トランジスター及びその形成方法
US8853699B2 (en) 2010-02-12 2014-10-07 Samsung Display Co., Ltd. Thin film transistor and method of forming the same

Also Published As

Publication number Publication date
KR100708493B1 (ko) 2007-04-16
EP1082761A1 (en) 2001-03-14
KR20010071259A (ko) 2001-07-28
US6184119B1 (en) 2001-02-06
WO2000055903A9 (en) 2002-01-10
US6383918B1 (en) 2002-05-07
CN1304552A (zh) 2001-07-18
WO2000055903A1 (en) 2000-09-21

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