JP2002216483A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2002216483A
JP2002216483A JP2001010242A JP2001010242A JP2002216483A JP 2002216483 A JP2002216483 A JP 2002216483A JP 2001010242 A JP2001010242 A JP 2001010242A JP 2001010242 A JP2001010242 A JP 2001010242A JP 2002216483 A JP2002216483 A JP 2002216483A
Authority
JP
Japan
Prior art keywords
data
column
sense amplifier
address
memory cell
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001010242A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002216483A5 (enExample
Inventor
Hitoshi Shiga
仁 志賀
Yoshinori Takano
芳徳 高野
Toru Tanzawa
徹 丹沢
Shigeru Atsumi
滋 渥美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2001010242A priority Critical patent/JP2002216483A/ja
Priority to US10/052,303 priority patent/US6552936B2/en
Publication of JP2002216483A publication Critical patent/JP2002216483A/ja
Priority to US10/376,848 priority patent/US6693818B2/en
Priority to US10/654,463 priority patent/US6826068B1/en
Publication of JP2002216483A5 publication Critical patent/JP2002216483A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1015—Read-write modes for single port memories, i.e. having either a random port or a serial port
    • G11C7/1018—Serial bit line access mode, e.g. using bit line address shift registers, bit line address counters, bit line burst counters
    • G11C7/1021—Page serial bit line access mode, i.e. using an enabled row address stroke pulse with its associated word line address and a sequence of enabled column address stroke pulses each with its associated bit line address
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/10—Decoders

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP2001010242A 2001-01-18 2001-01-18 半導体記憶装置 Pending JP2002216483A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001010242A JP2002216483A (ja) 2001-01-18 2001-01-18 半導体記憶装置
US10/052,303 US6552936B2 (en) 2001-01-18 2002-01-18 Semiconductor storage apparatus
US10/376,848 US6693818B2 (en) 2001-01-18 2003-02-28 Semiconductor storage apparatus
US10/654,463 US6826068B1 (en) 2001-01-18 2003-09-03 Fast data readout semiconductor storage apparatus

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001010242A JP2002216483A (ja) 2001-01-18 2001-01-18 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2002216483A true JP2002216483A (ja) 2002-08-02
JP2002216483A5 JP2002216483A5 (enExample) 2005-08-25

Family

ID=18877588

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001010242A Pending JP2002216483A (ja) 2001-01-18 2001-01-18 半導体記憶装置

Country Status (2)

Country Link
US (2) US6552936B2 (enExample)
JP (1) JP2002216483A (enExample)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2006038250A1 (ja) * 2004-09-30 2006-04-13 Spansion Llc 半導体装置およびデータ書き込み方法
JP2007042176A (ja) * 2005-08-01 2007-02-15 Hitachi Ltd 半導体記憶装置
WO2007023544A1 (ja) * 2005-08-25 2007-03-01 Spansion Llc 記憶装置、記憶装置の制御方法、および記憶制御装置の制御方法
US7263012B2 (en) 2003-02-25 2007-08-28 Rohm Co., Ltd. Semiconductor storage device
US7418637B2 (en) 2003-08-07 2008-08-26 International Business Machines Corporation Methods and apparatus for testing integrated circuits
US7474587B2 (en) 2006-02-16 2009-01-06 Samsung Electronics Co., Ltd. Flash memory device with rapid random access function and computing system including the same
KR100903694B1 (ko) * 2007-03-30 2009-06-18 스펜션 엘엘씨 반도체 장치 및 데이터 써넣기 방법
JP2009531797A (ja) * 2006-03-24 2009-09-03 サンディスク コーポレイション 冗長データがリモートバッファ回路にバッファされる不揮発性メモリおよび方法
JP2010267326A (ja) * 2009-05-14 2010-11-25 Renesas Electronics Corp 不揮発性半導体記憶装置
JP2011044232A (ja) * 2006-11-27 2011-03-03 Mosaid Technologies Inc 不揮発性メモリのシリアルコアアーキテクチャ
JP2012181906A (ja) * 2011-02-28 2012-09-20 Sk Hynix Inc 集積回路

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6826068B1 (en) 2001-01-18 2004-11-30 Kabushiki Kaisha Toshiba Fast data readout semiconductor storage apparatus
JP2002216483A (ja) * 2001-01-18 2002-08-02 Toshiba Corp 半導体記憶装置
JP2004071903A (ja) * 2002-08-07 2004-03-04 Matsushita Electric Ind Co Ltd 半導体装置
JP2004185134A (ja) * 2002-11-29 2004-07-02 Matsushita Electric Ind Co Ltd 記憶装置
JP2005070673A (ja) * 2003-08-27 2005-03-17 Renesas Technology Corp 半導体回路
US7339846B2 (en) * 2006-07-14 2008-03-04 Macronix International Co., Ltd. Method and apparatus for reading data from nonvolatile memory
KR100798792B1 (ko) * 2006-12-27 2008-01-28 주식회사 하이닉스반도체 반도체 메모리 장치
JP5291437B2 (ja) * 2008-11-12 2013-09-18 セイコーインスツル株式会社 半導体記憶装置の読出回路及び半導体記憶装置
KR102168076B1 (ko) 2013-12-24 2020-10-20 삼성전자주식회사 저항체를 이용한 비휘발성 메모리 장치
US9536625B1 (en) * 2015-06-22 2017-01-03 Qualcomm Incorporated Circuitry and method for critical path timing speculation in RAMs
KR102491358B1 (ko) * 2016-11-22 2023-01-26 매그나칩 반도체 유한회사 센스 앰프 구동 장치
JP2019040646A (ja) * 2017-08-22 2019-03-14 東芝メモリ株式会社 半導体記憶装置
CN109147851B (zh) * 2018-08-31 2020-12-25 上海华力微电子有限公司 一种锁存电路
KR20210155432A (ko) * 2020-06-15 2021-12-23 삼성전자주식회사 불휘발성 메모리 장치, 및 그것의 동작 방법

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4118804C2 (de) * 1990-06-08 1996-01-04 Toshiba Kawasaki Kk Serienzugriff-Speicheranordnung
JPH0447595A (ja) * 1990-06-15 1992-02-17 Mitsubishi Electric Corp 不揮発性半導体記憶装置
JP3557022B2 (ja) * 1995-12-08 2004-08-25 株式会社東芝 半導体記憶装置
US6243797B1 (en) * 1997-02-18 2001-06-05 Micron Technlogy, Inc. Multiplexed semiconductor data transfer arrangement with timing signal generator
KR100274591B1 (ko) 1997-07-29 2001-01-15 윤종용 동기형 버스트 매스크 롬 및 그것의 데이터 독출 방법
US6038185A (en) * 1998-05-12 2000-03-14 Atmel Corporation Method and apparatus for a serial access memory
JP2000048586A (ja) 1998-07-30 2000-02-18 Fujitsu Ltd 不揮発性半導体記憶装置
US6240044B1 (en) * 1999-07-29 2001-05-29 Fujitsu Limited High speed address sequencer
JP3940544B2 (ja) * 2000-04-27 2007-07-04 株式会社東芝 不揮発性半導体メモリのベリファイ方法
JP2002216483A (ja) * 2001-01-18 2002-08-02 Toshiba Corp 半導体記憶装置

Cited By (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7263012B2 (en) 2003-02-25 2007-08-28 Rohm Co., Ltd. Semiconductor storage device
US7681095B2 (en) 2003-08-07 2010-03-16 International Business Machines Corporation Methods and apparatus for testing integrated circuits
US7418637B2 (en) 2003-08-07 2008-08-26 International Business Machines Corporation Methods and apparatus for testing integrated circuits
US7263007B2 (en) 2004-09-30 2007-08-28 Spansion Llc Semiconductor memory device using read data bus for writing data during high-speed writing
WO2006038250A1 (ja) * 2004-09-30 2006-04-13 Spansion Llc 半導体装置およびデータ書き込み方法
GB2434901A (en) * 2004-09-30 2007-08-08 Spansion Llc Semiconductor device and data writing method
GB2434901B (en) * 2004-09-30 2008-05-07 Spansion Llc Semiconductor device and data writing method
JPWO2006038250A1 (ja) * 2004-09-30 2008-05-15 スパンション エルエルシー 半導体装置およびデータ書き込み方法
JP4582551B2 (ja) * 2004-09-30 2010-11-17 スパンション エルエルシー 半導体装置およびデータ書き込み方法
JP2007042176A (ja) * 2005-08-01 2007-02-15 Hitachi Ltd 半導体記憶装置
JPWO2007023544A1 (ja) * 2005-08-25 2009-03-26 スパンション エルエルシー 記憶装置、記憶装置の制御方法、および記憶制御装置の制御方法
WO2007023544A1 (ja) * 2005-08-25 2007-03-01 Spansion Llc 記憶装置、記憶装置の制御方法、および記憶制御装置の制御方法
US7474587B2 (en) 2006-02-16 2009-01-06 Samsung Electronics Co., Ltd. Flash memory device with rapid random access function and computing system including the same
JP2009531797A (ja) * 2006-03-24 2009-09-03 サンディスク コーポレイション 冗長データがリモートバッファ回路にバッファされる不揮発性メモリおよび方法
JP2011044232A (ja) * 2006-11-27 2011-03-03 Mosaid Technologies Inc 不揮発性メモリのシリアルコアアーキテクチャ
US8879351B2 (en) 2006-11-27 2014-11-04 Conversant Intellectual Property Management Inc. Non-volatile memory bank and page buffer therefor
KR100903694B1 (ko) * 2007-03-30 2009-06-18 스펜션 엘엘씨 반도체 장치 및 데이터 써넣기 방법
JP2010267326A (ja) * 2009-05-14 2010-11-25 Renesas Electronics Corp 不揮発性半導体記憶装置
JP2012181906A (ja) * 2011-02-28 2012-09-20 Sk Hynix Inc 集積回路

Also Published As

Publication number Publication date
US20030128593A1 (en) 2003-07-10
US20020097609A1 (en) 2002-07-25
US6693818B2 (en) 2004-02-17
US6552936B2 (en) 2003-04-22

Similar Documents

Publication Publication Date Title
JP2002216483A (ja) 半導体記憶装置
US10811062B2 (en) Deferred fractional memory row activation
US6134180A (en) Synchronous burst semiconductor memory device
JP2817679B2 (ja) 半導体メモリ
US6125078A (en) Synchronous semiconductor memory device allowing control of operation mode in accordance with operation conditions of a system
US6772312B2 (en) Semiconductor memory having asynchronous pipeline stages
US6453400B1 (en) Semiconductor integrated circuit device
EP1301927B1 (en) Method and apparatus for synchronization of row and column access operations
US6359813B1 (en) Semiconductor memory device having improved data transfer rate without providing a register for holding write data
US7095658B2 (en) Flash memory data bus for synchronous burst read page
US20080137462A1 (en) Two-bit per i/o line write data bus for ddr1 and ddr2 operating modes in a dram
KR20060030172A (ko) 반도체 메모리 장치 및 이의 패키지 및 이를 이용한메모리 카드
US20040088472A1 (en) Multi-mode memory controller
KR100578233B1 (ko) 동기식메모리장치의 데이터 입출력 가변제어장치
US6829195B2 (en) Semiconductor memory device and information processing system
JP4127054B2 (ja) 半導体記憶装置
JP4759213B2 (ja) 高速データアクセスのためのｄｒａｍ
US6826068B1 (en) Fast data readout semiconductor storage apparatus
JP4197880B2 (ja) 半導体記憶装置

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20050210

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20050210

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20070626

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20070827

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20071016