JP2001509316A5 - - Google Patents

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Publication number
JP2001509316A5
JP2001509316A5 JP1998533165A JP53316598A JP2001509316A5 JP 2001509316 A5 JP2001509316 A5 JP 2001509316A5 JP 1998533165 A JP1998533165 A JP 1998533165A JP 53316598 A JP53316598 A JP 53316598A JP 2001509316 A5 JP2001509316 A5 JP 2001509316A5
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JP
Japan
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Ceased
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JP1998533165A
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English (en)
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JP2001509316A (ja
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Priority claimed from US08/792,107 external-priority patent/US5908307A/en
Application filed filed Critical
Publication of JP2001509316A publication Critical patent/JP2001509316A/ja
Publication of JP2001509316A5 publication Critical patent/JP2001509316A5/ja
Ceased legal-status Critical Current

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Figure 2001509316
Figure 2001509316
Figure 2001509316
Figure 2001509316
Figure 2001509316
Figure 2001509316
Figure 2001509316
JP53316598A 1997-01-31 1998-01-29 低減寸法集積回路の製造法 Ceased JP2001509316A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US08/792,107 US5908307A (en) 1997-01-31 1997-01-31 Fabrication method for reduced-dimension FET devices
US08/792,107 1997-01-31
PCT/US1998/001942 WO1998034268A2 (en) 1997-01-31 1998-01-29 Fabrication method for reduced-dimension integrated circuits

Publications (2)

Publication Number Publication Date
JP2001509316A JP2001509316A (ja) 2001-07-10
JP2001509316A5 true JP2001509316A5 (ja) 2005-10-06

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP53316598A Ceased JP2001509316A (ja) 1997-01-31 1998-01-29 低減寸法集積回路の製造法

Country Status (6)

Country Link
US (1) US5908307A (ja)
EP (1) EP1012879B1 (ja)
JP (1) JP2001509316A (ja)
KR (1) KR100511765B1 (ja)
DE (1) DE69807718T2 (ja)
WO (1) WO1998034268A2 (ja)

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