JP2001357670A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2001357670A
JP2001357670A JP2000279456A JP2000279456A JP2001357670A JP 2001357670 A JP2001357670 A JP 2001357670A JP 2000279456 A JP2000279456 A JP 2000279456A JP 2000279456 A JP2000279456 A JP 2000279456A JP 2001357670 A JP2001357670 A JP 2001357670A
Authority
JP
Japan
Prior art keywords
circuit
signal
refresh
command
row
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000279456A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001357670A5 (https=
Inventor
Kazutami Arimoto
和民 有本
Hiroki Shimano
裕樹 島野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2000279456A priority Critical patent/JP2001357670A/ja
Priority to US09/777,694 priority patent/US6744684B2/en
Publication of JP2001357670A publication Critical patent/JP2001357670A/ja
Priority to US10/842,465 priority patent/US6909658B2/en
Publication of JP2001357670A5 publication Critical patent/JP2001357670A5/ja
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40615Internal triggering or timing of refresh, e.g. hidden refresh, self refresh, pseudo-SRAMs
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/104Embedded memory devices, e.g. memories with a processing device on the same die or ASIC memory designs

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
JP2000279456A 2000-04-14 2000-09-14 半導体記憶装置 Pending JP2001357670A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2000279456A JP2001357670A (ja) 2000-04-14 2000-09-14 半導体記憶装置
US09/777,694 US6744684B2 (en) 2000-04-14 2001-02-07 Semiconductor memory device with simple refresh control
US10/842,465 US6909658B2 (en) 2000-04-14 2004-05-11 Semiconductor memory device with row selection control circuit

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2000-113097 2000-04-14
JP2000113097 2000-04-14
JP2000279456A JP2001357670A (ja) 2000-04-14 2000-09-14 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010175415A Division JP2010272204A (ja) 2000-04-14 2010-08-04 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2001357670A true JP2001357670A (ja) 2001-12-26
JP2001357670A5 JP2001357670A5 (https=) 2007-08-16

Family

ID=26590114

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000279456A Pending JP2001357670A (ja) 2000-04-14 2000-09-14 半導体記憶装置

Country Status (2)

Country Link
US (2) US6744684B2 (https=)
JP (1) JP2001357670A (https=)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003056563A1 (en) * 2001-12-27 2003-07-10 Nec Electronics Corporation Semiconductor storage device and refresh control method thereof
WO2004001762A1 (ja) * 2002-06-25 2003-12-31 Fujitsu Limited 半導体メモリ
WO2005041201A1 (ja) * 2003-10-24 2005-05-06 International Business Machines Corporation 半導体記憶装置及びそのリフレッシュ方法
JP2005130493A (ja) * 2003-10-24 2005-05-19 Samsung Electronics Co Ltd 入力信号のトランジション区間で安定的に動作するパスゲート回路、これを備えるセルフリフレッシュ回路、及びパスゲート回路の制御方法
JP2007004883A (ja) * 2005-06-23 2007-01-11 Sanyo Electric Co Ltd メモリ
JP2007536684A (ja) * 2004-06-22 2007-12-13 ミクロン テクノロジー,インコーポレイテッド メモリデバイスにおける動的リフレッシュを改善する装置及び方法
US8582383B2 (en) 2010-04-15 2013-11-12 Renesas Electronics Corporation Semiconductor memory device with hidden refresh and method for controlling the same
JP2016526750A (ja) * 2013-07-12 2016-09-05 クアルコム,インコーポレイテッド Dramサブアレイレベル自律リフレッシュメモリコントローラの最適化
US9959912B2 (en) 2016-02-02 2018-05-01 Qualcomm Incorporated Timed sense amplifier circuits and methods in a semiconductor memory

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EP1301927B1 (en) * 2000-07-07 2012-06-27 Mosaid Technologies Incorporated Method and apparatus for synchronization of row and column access operations
JP4743999B2 (ja) * 2001-05-28 2011-08-10 ルネサスエレクトロニクス株式会社 半導体記憶装置
US6798711B2 (en) * 2002-03-19 2004-09-28 Micron Technology, Inc. Memory with address management
JP3792602B2 (ja) * 2002-05-29 2006-07-05 エルピーダメモリ株式会社 半導体記憶装置
ITMI20021185A1 (it) * 2002-05-31 2003-12-01 St Microelectronics Srl Dispositivo e metodo di lettura per memorie non volatili dotate di almeno un'interfaccia di comunicazione pseudo parallela
US7124260B2 (en) * 2002-08-26 2006-10-17 Micron Technology, Inc. Modified persistent auto precharge command protocol system and method for memory devices
JP4236903B2 (ja) * 2002-10-29 2009-03-11 Necエレクトロニクス株式会社 半導体記憶装置及びその制御方法
US6999368B2 (en) * 2003-05-27 2006-02-14 Matsushita Electric Industrial Co., Ltd. Semiconductor memory device and semiconductor integrated circuit device
US7345940B2 (en) * 2003-11-18 2008-03-18 Infineon Technologies Ag Method and circuit configuration for refreshing data in a semiconductor memory
KR100554848B1 (ko) * 2003-12-10 2006-03-03 주식회사 하이닉스반도체 어드레스 억세스 타임 조절 회로를 구비한 반도체 메모리소자
US7486574B2 (en) * 2004-04-13 2009-02-03 Hynix Semiconductor Inc. Row active control circuit of pseudo static ranom access memory
US7102933B2 (en) * 2004-10-15 2006-09-05 Infineon Technologies Ag Combined receiver and latch
US8027212B2 (en) * 2006-03-31 2011-09-27 Kristopher Chad Breen Method and apparatus for a dynamic semiconductor memory with compact sense amplifier circuit
US7492656B2 (en) * 2006-04-28 2009-02-17 Mosaid Technologies Incorporated Dynamic random access memory with fully independent partial array refresh function
US20080164149A1 (en) * 2007-01-05 2008-07-10 Artz Matthew R Rapid gel electrophoresis system
US7619944B2 (en) * 2007-01-05 2009-11-17 Innovative Silicon Isi Sa Method and apparatus for variable memory cell refresh
KR100894252B1 (ko) * 2007-01-23 2009-04-21 삼성전자주식회사 반도체 메모리 장치 및 그의 동작 제어방법
JP5554476B2 (ja) * 2008-06-23 2014-07-23 ピーエスフォー ルクスコ エスエイアールエル 半導体記憶装置および半導体記憶装置の試験方法
JP2011065732A (ja) * 2009-09-18 2011-03-31 Elpida Memory Inc 半導体記憶装置
JP2012094217A (ja) * 2010-10-27 2012-05-17 Toshiba Corp 同期型半導体記憶装置
JP2012252731A (ja) * 2011-05-31 2012-12-20 Renesas Electronics Corp 半導体装置
US9350386B2 (en) 2012-04-12 2016-05-24 Samsung Electronics Co., Ltd. Memory device, memory system, and method of operating the same
US8817557B2 (en) * 2012-06-12 2014-08-26 SK Hynix Inc. Semiconductor memory device and an operation method thereof
KR102023487B1 (ko) * 2012-09-17 2019-09-20 삼성전자주식회사 오토 리프레쉬 커맨드를 사용하지 않고 리프레쉬를 수행할 수 있는 반도체 메모리 장치 및 이를 포함하는 메모리 시스템
KR102373544B1 (ko) 2015-11-06 2022-03-11 삼성전자주식회사 요청 기반의 리프레쉬를 수행하는 메모리 장치, 메모리 시스템 및 메모리 장치의 동작방법
US9928895B2 (en) 2016-02-03 2018-03-27 Samsung Electronics Co., Ltd. Volatile memory device and electronic device comprising refresh information generator, information providing method thereof, and refresh control method thereof
US10192608B2 (en) * 2017-05-23 2019-01-29 Micron Technology, Inc. Apparatuses and methods for detection refresh starvation of a memory
KR102401873B1 (ko) * 2017-09-25 2022-05-26 에스케이하이닉스 주식회사 라이트 제어 회로 및 이를 포함하는 반도체 장치
CN108346404B (zh) * 2018-03-05 2020-11-24 昆山龙腾光电股份有限公司 一种时序控制器及屏驱动电路的参数调试方法
US11069394B2 (en) * 2019-09-06 2021-07-20 Micron Technology, Inc. Refresh operation in multi-die memory
KR102950774B1 (ko) * 2020-04-14 2026-04-08 에스케이하이닉스 주식회사 리프레시 주기가 다른 다수의 영역을 구비한 메모리 장치, 이를 제어하는 메모리 컨트롤러 및 이를 포함하는 메모리 시스템
US11790974B2 (en) 2021-11-17 2023-10-17 Micron Technology, Inc. Apparatuses and methods for refresh compliance

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6212990A (ja) * 1985-07-09 1987-01-21 Fujitsu Ltd ダイナミツク型半導体記憶装置
JPS62188096A (ja) * 1986-02-13 1987-08-17 Toshiba Corp 半導体記憶装置のリフレツシユ動作タイミング制御回路
JPH01125795A (ja) * 1987-11-10 1989-05-18 Toshiba Corp 仮想型スタティック半導体記憶装置及びこの記憶装置を用いたシステム
JPH08181292A (ja) * 1994-12-20 1996-07-12 Hitachi Ltd 半導体記憶装置
JPH09153279A (ja) * 1995-11-29 1997-06-10 Nec Corp 半導体記憶装置
JP2000100172A (ja) * 1998-07-22 2000-04-07 Mitsubishi Electric Corp 半導体記憶装置

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JPS6061992A (ja) * 1983-09-14 1985-04-09 Nec Corp 擬似スタティックメモリ
US5766897A (en) * 1990-06-21 1998-06-16 Incyte Pharmaceuticals, Inc. Cysteine-pegylated proteins
JPH07192461A (ja) 1993-12-27 1995-07-28 Toshiba Corp 半導体記憶装置
US5493538A (en) * 1994-11-14 1996-02-20 Texas Instruments Incorporated Minimum pulse width address transition detection circuit
US6780847B2 (en) * 1995-04-27 2004-08-24 The United States Of America As Represented By The Department Of Health And Human Services Glycosylation-resistant cyanovirins and related conjugates, compositions, nucleic acids, vectors, host cells, methods of production and methods of using nonglycosylated cyanovirins
US5600605A (en) * 1995-06-07 1997-02-04 Micron Technology, Inc. Auto-activate on synchronous dynamic random access memory
JPH09147554A (ja) * 1995-11-24 1997-06-06 Nec Corp ダイナミックメモリ装置及びその駆動方法
KR100363107B1 (ko) * 1998-12-30 2003-02-20 주식회사 하이닉스반도체 반도체메모리 장치
JP2001118383A (ja) * 1999-10-20 2001-04-27 Fujitsu Ltd リフレッシュを自動で行うダイナミックメモリ回路

Patent Citations (6)

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JPS6212990A (ja) * 1985-07-09 1987-01-21 Fujitsu Ltd ダイナミツク型半導体記憶装置
JPS62188096A (ja) * 1986-02-13 1987-08-17 Toshiba Corp 半導体記憶装置のリフレツシユ動作タイミング制御回路
JPH01125795A (ja) * 1987-11-10 1989-05-18 Toshiba Corp 仮想型スタティック半導体記憶装置及びこの記憶装置を用いたシステム
JPH08181292A (ja) * 1994-12-20 1996-07-12 Hitachi Ltd 半導体記憶装置
JPH09153279A (ja) * 1995-11-29 1997-06-10 Nec Corp 半導体記憶装置
JP2000100172A (ja) * 1998-07-22 2000-04-07 Mitsubishi Electric Corp 半導体記憶装置

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2003056563A1 (en) * 2001-12-27 2003-07-10 Nec Electronics Corporation Semiconductor storage device and refresh control method thereof
US7006401B2 (en) 2001-12-27 2006-02-28 Nec Electronics Corp. Semiconductor storage device and refresh control method thereof
CN100520962C (zh) * 2002-06-25 2009-07-29 富士通微电子株式会社 半导体存储器
WO2004001762A1 (ja) * 2002-06-25 2003-12-31 Fujitsu Limited 半導体メモリ
WO2004001761A1 (ja) * 2002-06-25 2003-12-31 Fujitsu Limited 半導体メモリ
CN101261877B (zh) * 2002-06-25 2010-07-28 富士通微电子株式会社 半导体存储器
US7064998B2 (en) 2002-06-25 2006-06-20 Fujitsu Limited Semiconductor memory
US7072243B2 (en) 2002-06-25 2006-07-04 Fujitsu Limited Semiconductor memory
WO2005041201A1 (ja) * 2003-10-24 2005-05-06 International Business Machines Corporation 半導体記憶装置及びそのリフレッシュ方法
JP2005130493A (ja) * 2003-10-24 2005-05-19 Samsung Electronics Co Ltd 入力信号のトランジション区間で安定的に動作するパスゲート回路、これを備えるセルフリフレッシュ回路、及びパスゲート回路の制御方法
JP2007536684A (ja) * 2004-06-22 2007-12-13 ミクロン テクノロジー,インコーポレイテッド メモリデバイスにおける動的リフレッシュを改善する装置及び方法
JP2007004883A (ja) * 2005-06-23 2007-01-11 Sanyo Electric Co Ltd メモリ
US8582383B2 (en) 2010-04-15 2013-11-12 Renesas Electronics Corporation Semiconductor memory device with hidden refresh and method for controlling the same
JP2016526750A (ja) * 2013-07-12 2016-09-05 クアルコム,インコーポレイテッド Dramサブアレイレベル自律リフレッシュメモリコントローラの最適化
US9959912B2 (en) 2016-02-02 2018-05-01 Qualcomm Incorporated Timed sense amplifier circuits and methods in a semiconductor memory

Also Published As

Publication number Publication date
US20040208076A1 (en) 2004-10-21
US6909658B2 (en) 2005-06-21
US20020159318A1 (en) 2002-10-31
US6744684B2 (en) 2004-06-01

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