JP2001339047A - 半導体装置 - Google Patents

半導体装置

Info

Publication number
JP2001339047A
JP2001339047A JP2000158331A JP2000158331A JP2001339047A JP 2001339047 A JP2001339047 A JP 2001339047A JP 2000158331 A JP2000158331 A JP 2000158331A JP 2000158331 A JP2000158331 A JP 2000158331A JP 2001339047 A JP2001339047 A JP 2001339047A
Authority
JP
Japan
Prior art keywords
wiring
pad
semiconductor device
conductivity type
wiring layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000158331A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001339047A5 (enExample
Inventor
Hisanori Nojiri
尚紀 野尻
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2000158331A priority Critical patent/JP2001339047A/ja
Priority to US09/865,492 priority patent/US6489689B2/en
Publication of JP2001339047A publication Critical patent/JP2001339047A/ja
Publication of JP2001339047A5 publication Critical patent/JP2001339047A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H01L23/5283—Cross-sectional geometry
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Layout of the interconnection structure
    • H01L23/5286—Arrangements of power or ground buses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
JP2000158331A 2000-05-29 2000-05-29 半導体装置 Pending JP2001339047A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000158331A JP2001339047A (ja) 2000-05-29 2000-05-29 半導体装置
US09/865,492 US6489689B2 (en) 2000-05-29 2001-05-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000158331A JP2001339047A (ja) 2000-05-29 2000-05-29 半導体装置

Publications (2)

Publication Number Publication Date
JP2001339047A true JP2001339047A (ja) 2001-12-07
JP2001339047A5 JP2001339047A5 (enExample) 2008-10-09

Family

ID=18662815

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000158331A Pending JP2001339047A (ja) 2000-05-29 2000-05-29 半導体装置

Country Status (2)

Country Link
US (1) US6489689B2 (enExample)
JP (1) JP2001339047A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008172121A (ja) * 2007-01-15 2008-07-24 Renesas Technology Corp 半導体集積回路装置
JP2011049594A (ja) * 2010-11-22 2011-03-10 Seiko Epson Corp 半導体装置
US7964968B2 (en) 2007-12-28 2011-06-21 Panasonic Corporation Semiconductor integrated circuit
US8178981B2 (en) 2004-02-26 2012-05-15 Renesas Electronics Corporation Semiconductor device
JP2013517617A (ja) * 2010-01-12 2013-05-16 アナログ デバイシス， インコーポレイテッド 一体化された過渡過電圧保護を有するボンドパッド
KR101273117B1 (ko) * 2005-08-10 2013-06-13 스카이워크스 솔루션즈 인코포레이티드 컨택트-비아 체인들을 발라스트 저항기들로서 이용한ｅｓｄ 보호 구조
JP2015204445A (ja) * 2014-04-16 2015-11-16 富士通株式会社 半導体装置
KR101831621B1 (ko) 2014-10-30 2018-02-23 퀄컴 인코포레이티드 전도성 스택 구조를 포함하는 장치

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US6936531B2 (en) 1998-12-21 2005-08-30 Megic Corporation Process of fabricating a chip structure
US7271489B2 (en) 2003-10-15 2007-09-18 Megica Corporation Post passivation interconnection schemes on top of the IC chips
JP4748867B2 (ja) * 2001-03-05 2011-08-17 パナソニック株式会社 集積回路装置
JP2003197908A (ja) * 2001-09-12 2003-07-11 Seiko Instruments Inc 半導体素子及びその製造方法
US6703641B2 (en) * 2001-11-16 2004-03-09 International Business Machines Corporation Structure for detecting charging effects in device processing
US7932603B2 (en) 2001-12-13 2011-04-26 Megica Corporation Chip structure and process for forming the same
JP2003273210A (ja) * 2002-03-12 2003-09-26 Fujitsu Ltd 半導体装置及びその製造方法
US6614091B1 (en) * 2002-03-13 2003-09-02 Motorola, Inc. Semiconductor device having a wire bond pad and method therefor
JP4302943B2 (ja) * 2002-07-02 2009-07-29 Ｎｅｃエレクトロニクス株式会社 半導体集積回路
US20040232448A1 (en) * 2003-05-23 2004-11-25 Taiwan Semiconductor Manufacturing Co. Layout style in the interface between input/output (I/O) cell and bond pad
US7049669B2 (en) * 2003-09-15 2006-05-23 Infineon Technologies Ag LDMOS transistor
US7960833B2 (en) * 2003-10-22 2011-06-14 Marvell World Trade Ltd. Integrated circuits and interconnect structure for integrated circuits
US7851872B2 (en) * 2003-10-22 2010-12-14 Marvell World Trade Ltd. Efficient transistor structure
US7265448B2 (en) 2004-01-26 2007-09-04 Marvell World Trade Ltd. Interconnect structure for power transistors
US7038280B2 (en) * 2003-10-28 2006-05-02 Analog Devices, Inc. Integrated circuit bond pad structures and methods of making
TWI245390B (en) * 2003-11-27 2005-12-11 Via Tech Inc Circuit layout structure
JP2005285971A (ja) * 2004-03-29 2005-10-13 Nec Electronics Corp 半導体装置
JP2005302953A (ja) * 2004-04-09 2005-10-27 Toshiba Corp 半導体装置
JP4164056B2 (ja) * 2004-09-15 2008-10-08 松下電器産業株式会社 半導体装置の設計方法及び半導体装置
US7518192B2 (en) * 2004-11-10 2009-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Asymmetrical layout structure for ESD protection
US20060244156A1 (en) * 2005-04-18 2006-11-02 Tao Cheng Bond pad structures and semiconductor devices using the same
US7646087B2 (en) * 2005-04-18 2010-01-12 Mediatek Inc. Multiple-dies semiconductor device with redistributed layer pads
JP4186970B2 (ja) 2005-06-30 2008-11-26 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4010336B2 (ja) 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4010335B2 (ja) 2005-06-30 2007-11-21 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4151688B2 (ja) * 2005-06-30 2008-09-17 セイコーエプソン株式会社 集積回路装置及び電子機器
JP4781040B2 (ja) * 2005-08-05 2011-09-28 ルネサスエレクトロニクス株式会社 半導体集積回路装置
TWI270970B (en) * 2005-11-04 2007-01-11 Via Tech Inc Layout structure of electrostatic discharge protection circuit
JP4586739B2 (ja) 2006-02-10 2010-11-24 セイコーエプソン株式会社 半導体集積回路及び電子機器
US7425910B1 (en) 2006-02-27 2008-09-16 Marvell International Ltd. Transmitter digital-to-analog converter with noise shaping
EP2030237B1 (en) * 2006-05-08 2011-02-09 Marvell World Trade Ltd. Efficient transistor structure
JP3976780B1 (ja) * 2007-05-17 2007-09-19 マイルストーン株式会社 撮像レンズ
JP2009014796A (ja) 2007-06-30 2009-01-22 Sony Corp Ｅｌ表示パネル、電源線駆動装置及び電子機器
DE102007046556A1 (de) * 2007-09-28 2009-04-02 Infineon Technologies Austria Ag Halbleiterbauelement mit Kupfermetallisierungen
US8178908B2 (en) 2008-05-07 2012-05-15 International Business Machines Corporation Electrical contact structure having multiple metal interconnect levels staggering one another
KR101003118B1 (ko) * 2008-10-10 2010-12-21 주식회사 하이닉스반도체 반도체 집적 회로 장치의 패드 구조체
US20110242712A1 (en) * 2010-04-01 2011-10-06 Fwu-Juh Huang Chip with esd protection function
JP2013247278A (ja) * 2012-05-28 2013-12-09 Toshiba Corp スイッチ回路
JP6074984B2 (ja) * 2012-09-28 2017-02-08 ローム株式会社 半導体装置
US9400862B2 (en) 2014-06-23 2016-07-26 Synopsys, Inc. Cells having transistors and interconnects including nanowires or 2D material strips
US10037397B2 (en) * 2014-06-23 2018-07-31 Synopsys, Inc. Memory cell including vertical transistors and horizontal nanowire bit lines
KR102322765B1 (ko) * 2015-06-22 2021-11-08 삼성디스플레이 주식회사 표시 장치
US10312229B2 (en) 2016-10-28 2019-06-04 Synopsys, Inc. Memory cells including vertical nanowire transistors
KR102671472B1 (ko) * 2016-11-28 2024-06-03 삼성전자주식회사 3차원 반도체 장치
US10410934B2 (en) * 2017-12-07 2019-09-10 Micron Technology, Inc. Apparatuses having an interconnect extending from an upper conductive structure, through a hole in another conductive structure, and to an underlying structure
JP7672936B2 (ja) * 2021-09-21 2025-05-08 ルネサスエレクトロニクス株式会社 半導体装置
CN114843263A (zh) * 2022-06-08 2022-08-02 珠海鸿芯科技有限公司 一种cmos双排dup与内部esd器件的连接结构

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06283604A (ja) * 1993-03-26 1994-10-07 Olympus Optical Co Ltd 半導体装置
JPH08250498A (ja) * 1995-03-09 1996-09-27 Sony Corp 半導体装置とその製造方法
JPH1098108A (ja) * 1996-09-24 1998-04-14 Fujitsu Ltd 半導体装置
JP2000012698A (ja) * 1998-06-26 2000-01-14 Oki Electric Ind Co Ltd 半導体装置

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US5237199A (en) * 1989-04-13 1993-08-17 Seiko Epson Corporation Semiconductor device with interlayer insulating film covering the chip scribe lines
US5365110A (en) 1989-11-07 1994-11-15 Kabushiki Kaisha Toshiba Semiconductor device with multi-layered wiring structure
JPH03149823A (ja) 1989-11-07 1991-06-26 Toshiba Corp 多層配線構造の半導体装置
JP3390875B2 (ja) * 1992-11-12 2003-03-31 日本テキサス・インスツルメンツ株式会社 半導体装置
US5517055A (en) * 1993-10-25 1996-05-14 Lsi Logic Corporation Input-output drive reduction in a semiconductor integrated circuit
JP3720064B2 (ja) * 1994-01-20 2005-11-24 株式会社ルネサステクノロジ 半導体集積回路
JP3989038B2 (ja) * 1996-04-17 2007-10-10 株式会社ルネサステクノロジ 半導体集積回路装置
JP3149823B2 (ja) 1997-07-24 2001-03-26 トヨタ自動車株式会社 車両用照明装置
JPH11111860A (ja) * 1997-10-06 1999-04-23 Mitsubishi Electric Corp 半導体装置
TW367603B (en) * 1998-06-20 1999-08-21 United Microelectronics Corp Electrostatic discharge protection circuit for SRAM

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JPH06283604A (ja) * 1993-03-26 1994-10-07 Olympus Optical Co Ltd 半導体装置
JPH08250498A (ja) * 1995-03-09 1996-09-27 Sony Corp 半導体装置とその製造方法
JPH1098108A (ja) * 1996-09-24 1998-04-14 Fujitsu Ltd 半導体装置
JP2000012698A (ja) * 1998-06-26 2000-01-14 Oki Electric Ind Co Ltd 半導体装置

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8178981B2 (en) 2004-02-26 2012-05-15 Renesas Electronics Corporation Semiconductor device
KR101273117B1 (ko) * 2005-08-10 2013-06-13 스카이워크스 솔루션즈 인코포레이티드 컨택트-비아 체인들을 발라스트 저항기들로서 이용한ｅｓｄ 보호 구조
JP2008172121A (ja) * 2007-01-15 2008-07-24 Renesas Technology Corp 半導体集積回路装置
US7964968B2 (en) 2007-12-28 2011-06-21 Panasonic Corporation Semiconductor integrated circuit
JP2013517617A (ja) * 2010-01-12 2013-05-16 アナログ デバイシス， インコーポレイテッド 一体化された過渡過電圧保護を有するボンドパッド
JP2011049594A (ja) * 2010-11-22 2011-03-10 Seiko Epson Corp 半導体装置
JP2015204445A (ja) * 2014-04-16 2015-11-16 富士通株式会社 半導体装置
KR101831621B1 (ko) 2014-10-30 2018-02-23 퀄컴 인코포레이티드 전도성 스택 구조를 포함하는 장치

Also Published As

Publication number Publication date
US6489689B2 (en) 2002-12-03
US20010045670A1 (en) 2001-11-29

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