JP2001332654A - Module provided with built-in electric element and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a module which is provided with built-in electric elements, such as semiconductor chips and surface acoustic wave elements, and can be thinned while being provided with mechanical strength, and to provide a manufacturing method of the module. SOLUTION: A module provided with built-in electric elements is constituted in a structure that more than two electric elements 203 are mounted on wiring patterns 201 and the elements 203 are sealed with a thermosetting resin composition 204. The upper surfaces of the elements 203 and the upper surface of the composition 204 are simultaneously polished, whereby almost the same surface is formed on the elements 203 and the composition 204. As the upper surfaces of the elements 203 are polished in a state that the elements 203 are sealed with the composition 204, the elements 203 can be thinned without damaging the elements 203. Moreover, a contamination of the elements 203 and the patterns 201 due to an abrasive liquid can be prevented.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a module having a built-in electric element such as a semiconductor chip and a surface acoustic wave element. In particular, the present invention relates to an electric element built-in module which can be made extremely thin and is suitable for high-density mounting. The present invention also relates to a method for manufacturing such an electric element built-in module.

[0002]

2. Description of the Related Art In recent years, with the demand for higher performance and smaller size of electronic equipment, higher density and higher functionality of a package on which a semiconductor chip is mounted have been increasingly demanded. Further, a small and high-density circuit board for mounting them is also desired. In response to these requirements, it is becoming difficult to cope with high-density mounting in a conventional multilayer substrate (glass-epoxy multilayer substrate) made of glass fiber and epoxy resin having a through-hole structure using a drill. Therefore, in place of the conventional glass / epoxy multilayer board, a circuit board capable of connecting to an inner via hole instead of a through-hole is actively being developed (for example, Japanese Patent Application Laid-Open No. 6-268).
345, JP-A-7-147664, etc.).

However, at present, even these high-density mounting substrates having an inner via hole structure cannot keep up with the miniaturization rules of semiconductor chips. For example, with the miniaturization of the semiconductor chip, the wiring pitch and the via hole pitch of the circuit board are about 100 μm, despite the fact that the extraction electrode pitch has been reduced to about 50 μm. For this reason, the space for taking out the electrodes from the semiconductor chip becomes large, which is a factor that hinders the miniaturization of the semiconductor package.

Further, since the circuit board is made of a resin-based material, the circuit board has low thermal conductivity. Therefore, the higher the density of component mounting, the more difficult it is to radiate the heat generated from the component. According to the prediction in 2000, the clock frequency of the CPU is said to be about 1 GHz, and the power consumption of the CPU is expected to reach 100 to 150 W per chip in conjunction with the sophistication of its function.

[0005] In addition, with the increase in speed and density, the influence of noise has been inevitably avoided.

[0006] Therefore, the circuit board must take into account noise elimination characteristics and heat radiation characteristics in addition to higher density and higher functionality by further miniaturization.

On the other hand, as a form corresponding to such miniaturization of a semiconductor chip, a chip size package (CS
P) has been proposed. The CSP flip-chip mounts a semiconductor chip on a circuit board called an interposer in which grid electrodes are two-dimensionally arranged on the back surface,
The electrode of the semiconductor chip and the grid electrode are connected via via holes in a circuit board. This allows
Electrodes formed at a pitch of 100 μm or less of the semiconductor chip can be taken out from grid-like electrodes having a pitch of about 0.5 to 1.0 mm, and the pitch of the taken out electrodes can be increased.

As a result, the circuit board on which the CSP is mounted does not need to be so fine, and an inexpensive circuit board can be used. Furthermore, there is an advantage that the CSP can be handled like a semiconductor package whose tested reliability is guaranteed. As a result, the cost required for chip breakage, inspection of defective elements, and reliability assurance, while enjoying the advantage of miniaturization, which is an advantage of bare chip mounting, compared to the bare chip method in which a semiconductor bare chip is directly mounted on a circuit board as it is. Can be reduced.

Due to the development of such CSPs, miniaturization of semiconductor packages has been promoted.

[0010]

On the other hand, with the development of the Internet, mobile personal computers that can handle information in a personal manner and information terminals typified by mobile phones are increasingly required to be smaller and thinner.
A typical example is a card-sized information terminal. For example, it is expected that applications other than the current credit card, such as a wireless device of a card size, a mobile phone, a personal identification card, and a memory card for music distribution, will be developed. Therefore, the appearance of a thin semiconductor package and active components that can be mounted on such a card-sized information terminal is strongly desired.

When the above CSP is used to reduce the thickness of a semiconductor package, the thickness of the semiconductor chip (0.4 m) is used.
m) and the thickness of the interposer, which is a circuit board,
In the case of flip chip mounting, the bump height is added, and in the case of wire bonding, the wire height and the thickness of the sealing resin are added, resulting in a thickness of about 0.7 mm. The total thickness required for card size equipment is 0.3-1.0m
m, a thinner semiconductor package is required.

As means for reducing the thickness of a semiconductor package,
There is TAB (tape automatic bonding) mounting. An open portion and a wiring pattern made of copper foil are formed on a tape-like film such as polyimide, a semiconductor chip is mounted on the open portion, and an electrode protruding from the open portion is directly bonded to an electrode of the semiconductor chip (inner lead bonding). The electrodes are similarly taken out by connecting the electrodes protruding from the tape to the circuit board (outer lead bonding). As a result, a semiconductor package having the same thickness as the tape thickness (about 100 μm) can be obtained. In some cases, a form in which the TAB-mounted products are stacked and mounted in multiple stages has been proposed.

In any method, it is needless to say that the semiconductor chip should be as thin as possible. However, a semiconductor chip having a thickness of 100 μm or less (especially a silicon semiconductor) has a low mechanical strength and a load is applied during mounting. Then, the semiconductor chip may be destroyed. Further, when the semiconductor wafer is thinned by polishing, the mechanical strength is reduced, and the wafer is liable to crack during the subsequent dicing or the like. On the other hand, it is extremely difficult to polish a small semiconductor chip after dicing to make it thinner, and it is not economically efficient.

On the other hand, as a technique for thinning a semiconductor chip,
There is a pre-dicing method. The pre-dicing method is a method in which a semiconductor wafer is diced from one surface to halfway through the thickness of the wafer and then polished from the other surface to the diced portion. According to this method, a semiconductor chip automatically cut after polishing is obtained.
However, even in this method, since individual semiconductor chips are thin, a load cannot be applied, and handling during mounting is difficult.

[0015] In a cellular phone or the like, a surface acoustic wave element is used as a component constituting a filter for extracting a specific frequency component.

FIG. 7 is a cross-sectional view showing an example of the structure of a conventional surface acoustic wave element built-in module including two surface acoustic wave elements having a filter function. This is used, for example, as an antenna duplexer used for a radio unit such as a mobile phone.

In FIG. 7, reference numeral 601 denotes a surface acoustic wave element;
602 is a piezoelectric substrate, 603 is a comb-shaped electrode, 604 is an extraction electrode, 605 is a metal bump, 607 is a circuit board, 60
9 is a first wiring pattern, 610 is a second wiring pattern, 611 is a via hole, 612 is a lid, 613 is a sealing body, 614 is a built-in circuit, and 615 is a recess.

The surface acoustic wave element 601 includes a comb-shaped electrode 603 made of a metal film containing aluminum as a main component on one surface of a piezoelectric substrate 602 made of, for example, lithium tantalate, lithium niobate, or quartz. , And an extraction electrode 604 are formed. Extraction electrode 604
A metal bump 60 for making an electrical connection with the outside is provided on the top.
5 are formed.

The circuit board 607 has a first wiring pattern 609 on one surface and a second wiring pattern 6 on the other surface.
10 has a built-in circuit 614 formed therein. The first wiring pattern 609, the second wiring pattern 610, and the built-in circuit 614 are connected by a via hole 611. Via these, connection between a plurality of surface acoustic wave elements 601 incorporated in the module of FIG. 7 and an external circuit is performed. The circuit board 607 has a concave portion 61 at the center to secure a space for mounting the surface acoustic wave element 601.
5

After the surface acoustic wave element 601 is positioned and mounted on the circuit board 607, the first wiring pattern 60
9 and the metal bump 605 are electrically connected. When a gold bump is used as the metal bump 605, the metal bump 605 is melted and connected by using both heat and ultrasonic waves. Alternatively, the connection may be made using a conductive adhesive. When a solder bump is used as the metal bump 605, the connection is made by reflowing the solder bump.

Since the surface acoustic wave element 601 is a device that is sensitive to the influence of the outside atmosphere, finally, a concave portion of the circuit board 607 is formed by a lid 612 made of, for example, a metal plate and a sealing body 613 made of solder or adhesive. 615 is hermetically sealed. Thus, a module with a built-in surface acoustic wave element used for an antenna duplexer or the like is obtained.

In the above description, the piezoelectric substrate 602 constituting the surface acoustic wave element 601 is usually 0.3 mm to 0.4 mm.
A wafer having a thickness of mm is used. Therefore, the thickness of the conventional module with a built-in surface acoustic wave element is about 1 mm, which hinders the thinning of electronic devices represented by mobile phones.

With the remarkable progress of mobile communication equipment in recent years, a thinner module is required, and the demand for thinning the piezoelectric substrate 602 is increasing. However, since a single crystal material such as lithium tantalate used as the piezoelectric substrate 602 is a brittle material and is easily broken, the wafer is transported in a photolithography step of forming a comb-shaped electrode on the surface of the piezoelectric substrate 602, or is transferred onto the circuit substrate 607. For example, in the handling of the element unit in the mounting process of FIG.
Using 2 has been very difficult in practice.
Further, in the surface acoustic wave element 601, the comb-shaped electrode 6
A method of roughening the surface (surface on the non-functional portion side) opposite to the surface on which the 03 is formed (surface on the functional portion side) to prevent characteristic deterioration due to reflection of elastic waves from the surface on the non-functional portion side Is generally used. If an attempt is made to reduce the thickness of the piezoelectric substrate 602, wafer cracks are likely to occur even when the surface on the non-functional portion side is roughened. As described above, in the conventional configuration, it is difficult to reduce the thickness of the component built-in module using the surface acoustic wave element.

The present invention solves the above-mentioned conventional problems,
It is an object of the present invention to provide a module which is thin and has a built-in electrical element such as a semiconductor chip or a surface acoustic wave element, which has mechanical strength. Another object of the present invention is to provide a method for efficiently manufacturing such an electric element built-in module.

[0025]

The present invention has the following configuration to achieve the above object.

The electric element built-in module according to the present invention comprises:
A wiring pattern, comprising two or more electric elements mounted on the wiring pattern, and a thermosetting resin composition for sealing the electric element, wherein an upper surface of the two or more electric elements and the thermosetting resin composition It is characterized in that the upper surface of the object forms substantially the same plane.

According to this, since the electric element is sealed with the thermosetting resin composition, the mechanical strength is improved. Such a module can be obtained by simultaneously grinding or polishing the upper surface of the electric element and the upper surface of the thermosetting resin composition to a desired thickness. At this time, since the electric element is sealed with the thermosetting resin composition, the electric element is not damaged by external force during processing. Thus, a thin electric element built-in module having mechanical strength can be provided. Also,
By including two or more electric elements, a module with high density mounting can be realized. Further, by dividing the package into electric elements, a thin electric element built-in package having mechanical strength can be provided.

In the above-described module with a built-in electric element,
It is preferable that at least one (more preferably all) of the electric elements includes a functional portion and a connection electrode on a surface on the wiring pattern side, and the connection electrode is connected to the wiring pattern. Thereby, the surface (the surface on the non-functional portion side) opposite to the wiring pattern side of the electric element can be ground or polished. Therefore, a thin module having a desired thickness can be provided.

Further, in the above-described electric element built-in module, at least one of the electric elements may be at least one selected from the group consisting of a semiconductor chip, a chip resistor, a chip capacitor, and a chip inductor.

Alternatively, in the above-described electric element built-in module, at least one of the electric elements may be a surface acoustic wave element.

When a surface acoustic wave element is used as the electric element, the surface acoustic wave element is provided on the surface on the wiring pattern side.
It is preferable to have a function part and a space holding structure for preventing excitation and propagation of the surface acoustic wave in the function part. By setting the surface on the functional part side of the surface acoustic wave element to the wiring pattern side, the surface on the non-functional part side can be ground or polished. Therefore, a thin module having a desired thickness can be provided. Also, by providing a space retention structure,
The resin can be filled also between the functional part and the wiring pattern, and the mechanical strength can be improved. Therefore, it is possible to prevent damage due to external force during processing for thinning.

The space holding structure is preferably made of a film-shaped resin composition. Thereby, the adhesion to the sealing resin is improved, and a highly reliable module can be obtained.

In the above-described electric element built-in module, it is preferable that the surface roughness Rz of the upper surface of each of the two or more electric elements is 0.5 μm to 50 μm. Further, the surface roughness Rz of the upper surface of the two or more electric elements forming the substantially same surface and the upper surface of the thermosetting resin composition
Is preferably 0.5 μm to 50 μm. Here, the surface roughness Rz means a ten-point average roughness. If the surface roughness Rz is less than 0.5 μm, the connection between the electric element and the wiring pattern is broken or the interface between the electric element and the resin composition is cracked by the processing of the upper surface. On the other hand, when the surface roughness Rz exceeds 50 μm, cracks and cracks occur in the electric element. Further, when a surface acoustic wave element is used as the electric element, the surface roughness R
If z is out of the above range, the frequency characteristics deteriorate.

[0034] In the above-described electric element built-in module, it is preferable that the thermosetting resin composition comprises an inorganic filler and a thermosetting resin. By selecting an inorganic filler and a thermosetting resin, a module having desired performance can be realized.

The main component of the thermosetting resin is preferably an epoxy resin, a phenol resin or a cyanate resin. This is because these resins are excellent in heat resistance, insulation reliability, and the like.

The inorganic filler is Al ₂ O ₃ , M
It is preferably at least one selected from the group consisting of gO, BN, AlN, and SiO ₂ . This is because various performances of the module can be secured. By changing the material of the inorganic filler, it becomes possible to control the coefficient of thermal expansion, the thermal conductivity, the dielectric constant, and the like of the thermosetting resin composition. When Al ₂ O ₃ is used, the coefficient of thermal expansion can be reduced,
In addition, a module having excellent heat conductivity can be realized. SiO
_{When 2} is used, the dielectric constant can be controlled and the coefficient of thermal expansion can be reduced. In addition, by selecting AlN, MgO, BN, or the like, a module having further excellent thermal conductivity can be realized.

For example, by making the thermal expansion coefficient of the resin composition substantially equal to the thermal expansion coefficient of the electric element, it is possible to prevent cracks due to temperature changes and a decrease in connection reliability. Also, by improving the thermal conductivity of the resin composition, when the electronic component is a semiconductor chip that requires heat dissipation,
Heat radiation characteristics can be improved. Further, by reducing the dielectric constant of the resin composition, loss at high frequencies can be reduced. Note that, in the module of the present invention, another electric element or the like can be mounted on the wiring pattern on the side opposite to the sealed electric element. In such a case, the other electric element The inorganic filler in the thermosetting resin composition can be selected according to the required characteristics.

In the above-described module with a built-in electric element, the wiring pattern may be formed on a surface of a circuit board. Thus, a circuit board on which a thin electric element is mounted can be efficiently obtained.

Alternatively, the wiring pattern may be formed on the surface of the support. By peeling the support, a package with a built-in electric element that can be mounted on a wiring board or the like is obtained. Alternatively, another electric element or the like can be mounted on the exposed wiring pattern.

In this case, it is preferable that the support is made of an organic film or a metal foil.

In the above-described electric element built-in module, it is preferable that at least one of the electric elements is connected to the wiring pattern via a bump. As a result, a highly reliable electrical connection can be obtained efficiently.

Next, in the method of manufacturing a module with a built-in electric element according to the present invention, at least one electric element having a functional part and a connection electrode on one surface is provided on the wiring pattern, Mounting on the wiring pattern side,
A step of sealing the electric element with a thermosetting resin composition from the other surface side of the electric element, and a step of grinding or polishing from the other surface side of the electric element. .

According to this, a thick electric element is mounted, sealed with a thermosetting resin composition, and then ground or polished from the surface on the non-functional portion side. Since the electric element is reinforced with the resin composition, the mechanical impact and load applied to the electric element during grinding or polishing can be reduced. Therefore, a thin module with a built-in electric element can be obtained without breaking the electric element. Further, since the electric element is sealed with the resin composition at the time of grinding or polishing, contamination of the electric element and the electric connection portion can be prevented.

In the above-described method for manufacturing a module with a built-in electric element, a bump is formed on a connection electrode of the electric element, and the electric element is mounted on the wiring pattern using the bump and a conductive adhesive. Is preferred.
Thereby, the processing can be performed at a lower temperature than in the case of connection by soldering.

Alternatively, in the above-described method for manufacturing a module with a built-in electric element, a bump is formed on a connection electrode of the electric element, and the electric element is formed by using the bump and a sheet in which a conductive filler is dispersed. It may be mounted on the wiring pattern. Thereby, the step of filling the sealing resin between the electric element and the wiring pattern becomes unnecessary. In addition, it is possible to cope with a fine connection pitch.

Alternatively, in the above-described method of manufacturing a module with a built-in electric element, a bump is formed on a connection electrode of the electric element, and the electric element is formed by ultrasonically connecting the bump and the wiring pattern. It may be mounted on a wiring pattern. Thereby, the heat load on the electric element can be reduced.

In the above-mentioned method for manufacturing a module with a built-in electric element, after the step of mounting the electric element on the wiring pattern, the step of sealing the electric element with the thermosetting resin composition Before the step, it is preferable that the method further includes a step of injecting a resin between the electric element and the wiring pattern and curing the resin. Thus, the connection between the electric element and the wiring pattern can be protected by the sealing resin (so-called underfill). Further, it is possible to prevent the electric element and the connection portion from being damaged by the pressure applied in the subsequent step of sealing with the thermosetting resin composition.

In the method of manufacturing a module with a built-in electric element, the electric element is sealed with the thermosetting resin composition, and the uncured sheet made of the thermosetting resin composition is sealed with the thermosetting resin composition. It can be performed by heating and pressurizing after overlapping on the other surface of the electric element. Thus, the electric element can be sealed with the thermosetting resin composition in a simple process.

Alternatively, in the method of manufacturing a module with a built-in electric element, the electric element is sealed with the thermosetting resin composition, and the uncured paste made of the thermosetting resin composition is sealed with the thermosetting resin composition. The application can also be performed by applying heat from the other surface side of the electric element under vacuum or reduced pressure and then heating. By applying the paste under vacuum or reduced pressure, the paste can be spread to details.

It is preferable that the heating after the application of the paste is performed under a pressure higher than the atmospheric pressure. Thereby, voids in the thermosetting resin composition can be reduced.

In the above, the heating temperature when the uncured sheet-like material is stacked on the other surface of the electric element and the electric element is sealed by heating and pressing is determined by the thermosetting temperature contained in the resin composition. The temperature is preferably equal to or lower than the curing start temperature of the conductive resin. Thereby, the pressure at the time of pressurization can be reduced. Also,
By setting the thermosetting resin in a state before it is cured, grinding or polishing in a subsequent process becomes easy.

Similarly, the heating temperature when the uncured paste is applied from the other surface side of the electric element and heated to seal the electric element depends on the thermosetting temperature contained in the resin composition. The temperature is preferably equal to or lower than the curing start temperature of the conductive resin. Thereby, it is possible to suppress voids from remaining in the resin composition. In addition, by setting the thermosetting resin in a state before it is cured, grinding or polishing in a subsequent process becomes easy.

Further, in the above-mentioned method for producing a module with a built-in electric element, the thermosetting resin composition may contain at least 70 to 95% by weight of inorganic filler and 5 to 3% of thermosetting resin.
0% by weight. By selecting the type of the inorganic filler contained at a high concentration according to the purpose, a module having desired performance can be obtained. For example, by making the coefficient of thermal expansion of the resin composition approximately equal to the coefficient of thermal expansion of the electric element, a module having excellent temperature change resistance can be obtained. In addition, by improving the heat radiation characteristics of the resin composition, a module suitable for an electric element that generates a large amount of heat can be obtained. Further, by using a low dielectric constant inorganic filler, a module having excellent high frequency characteristics can be obtained.

Further, in the above-described method for manufacturing a module with a built-in electric element, after the grinding or polishing step, a step of dividing the module into a desired shape may be further provided. After processing into a large size and thin, it is divided, so that a thin and inexpensive electric element package can be efficiently manufactured.

In the above-described method for manufacturing a module with a built-in electric element, the wiring pattern may be formed on a surface of a circuit board. Thus, a circuit board on which a thin electric element is mounted can be efficiently obtained.

Alternatively, in the above-described method for manufacturing a module with a built-in electric element, the wiring pattern may be formed on a surface of a support. Here, an organic film or a metal foil can be used as the support.

In this case, the method may further include a step of peeling the support after the grinding or polishing step. By peeling off the support, an electric element built-in package that can be mounted on a circuit board can be obtained. Or,
Another electric element or the like can be mounted on the wiring pattern exposed by the separation. Further, since the support is peeled off after the grinding or polishing step, it is possible to prevent the electric element and the wiring pattern from being contaminated during the grinding or polishing step.

After the step of peeling the support, a prepreg for a circuit board having a through hole in a thickness direction filled with a conductive paste on a surface of the wiring pattern exposed by the peeling, and a metal foil. May be further provided in this order, and after heating and pressing, the metal foil is etched to form a wiring pattern. Thereby, a module having a multilayer structure having inner via holes can be obtained.

Alternatively, after the step of sealing the electric element with a thermosetting resin composition and before the step of grinding or polishing, a step of peeling the support, On the wiring pattern side surface, a prepreg for a circuit board having a through hole in the thickness direction filled with a conductive paste and a metal foil are laminated in this order, and after heating and pressing, the metal foil is etched. And forming a wiring pattern by the method. In this case, a module having a multilayer structure with inner via holes can be obtained.

Further, after the step of forming a wiring pattern by etching the metal foil, a through hole in the thickness direction filled with a conductive paste is provided on the surface on the wiring pattern side obtained by the etching. Prepreg for circuit board and second
After laminating in this order with a metal foil and applying heat and pressure, the second
The step of forming the second wiring pattern by etching the metal foil may be performed at least once. This makes it possible to obtain a module having a further multilayer structure having inner via holes.

[0061] In the above-described method of manufacturing a module with a built-in electric element, it is preferable that the electric element and the thermosetting resin composition are simultaneously ground or polished so that they are substantially the same height. By grinding or polishing both at the same time, a thin module can be easily obtained. In addition, it is possible to prevent the electrical element and the connection between the electrical element and the wiring pattern from being damaged during grinding or polishing.

In the above-described method for manufacturing a module with a built-in electric element, the grinding or polishing is preferably performed by a polishing method using an abrasive. As a result, the lapping step generally used in the semiconductor chip manufacturing process can be directly applied to the manufacturing method of the present invention, so that existing equipment can be used.

[0063]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, an electric element built-in module and a method for manufacturing the same according to the present invention will be described with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional view showing a configuration of an electric element built-in module according to Embodiment 1 of the present invention in which a semiconductor chip is built in as an electric element. In FIG. 1, reference numeral 204 denotes a mixed resin composition including an inorganic filler and a thermosetting resin; 203, a semiconductor chip sealed and integrated with the resin composition 204; 201, a wiring pattern; 202, a metal bump; 1 shows a module with a built-in semiconductor chip according to the first embodiment.

The semiconductor chip 203 has, on one surface side, a functional portion exhibiting its function, and an electrode pad (connection electrode) is formed on the surface on which the functional portion is formed. The bump 202 is formed on the electrode pad of the semiconductor chip 203. The bump 202 is connected to the wiring pattern 201, and can input and output signals to and from the semiconductor chip 203.

The surface of the semiconductor chip 203 opposite to the functional part and the upper surface of the mixed resin composition 204 for sealing and embedding the semiconductor chip 203 are simultaneously ground or polished to form substantially the same surface. are doing. Thereby, the overall thickness can be reduced.

As shown in FIG. 1, since the semiconductor chip 203 is built in and the upper surface can be thinned by grinding or polishing, a thin and high-density module suitable for thin products such as memory cards can be obtained.

As the thermosetting resin constituting the mixed resin composition 204, for example, an epoxy resin, a phenol resin,
Cyanate resins can be used. As the inorganic filler to be dispersed and contained, Al ₂ O ₃ , MgO, B
N, AlN, SiO ₂ can be used. Also,
If necessary, a coupling agent, a dispersant, a colorant, and a release agent can be further added to the mixture of the inorganic filler and the thermosetting resin.

The semiconductor chip 203 is not limited to a silicon semiconductor element, a bipolar element, a MOS element, etc.
Silicon-germanium semiconductor device with low mechanical strength,
Gallium arsenide semiconductor elements can also be used.

It is preferable that a copper foil be used as the wiring pattern 201 and that the surface thereof is plated with nickel or gold, because a stable electric connection with the metal bump 202 on the semiconductor chip 203 can be obtained.

As the metal bump 202, a gold bump can be used, and a two-step projection bump formed by a wire bonding method or a gold-plated bump can be used.

Next, a specific method of manufacturing the above-described module with a built-in semiconductor chip will be described with reference to FIGS. 2A to 2F.

2A to 2F are sectional views showing a method of manufacturing the semiconductor chip built-in module shown in FIG. 1 in the order of steps.

First, as shown in FIG. 2A, a support (carrier) 200 made of metal foil and having a wiring pattern 201 formed on its surface is prepared. As the support 200, 50 to 100 μm having transportability and moderate adhesive strength
A thick copper foil can be used.

A specific manufacturing method is as follows. First, copper is further plated on the surface of the support 200 made of a metal foil to a desired thickness. The thickness of the copper plating layer on the support 200 is preferably adjusted according to the fineness of the wiring pattern. When forming a fine wiring pattern with a pitch of 100 μm, the thickness of the copper plating layer may be about 5 to 9 μm, and when not so fine, about 12 to 24 μm.

Next, the copper plating layer on the support 200 is etched by an existing method to form a wiring pattern 201. At this time, the etching may be performed by etching only the copper plating layer or a part of the surface of the support 200. This is because, in any case, only the copper plating layer serving as the wiring pattern 201 is finally transferred to the module side.

The reason why the metal foil is optimally used as the support 200 is that the wiring pattern 201 does not move due to the flow of the resin in the later step of embedding the semiconductor chip in the thermosetting resin composition. is there.

The wiring pattern 2 thus manufactured
As shown in FIG. 2B, the semiconductor chip 203 is mounted on the support 200 with 01. The semiconductor chip 203 has a functional portion and an electrode formed on one surface side. The semiconductor chip 203 is mounted on the wiring pattern 201 via a metal bump 202 made of gold or the like with the surface on the functional unit side facing the wiring pattern 201 side. The mounting method is as follows.
Alternatively, the conductive paste may be transferred onto the substrate 2 and connected. Alternatively, the conductive paste may be mounted using solder.

Next, as shown in FIG. 2C, a sheet 204 made of an uncured mixed resin composition made of an inorganic filler and a thermosetting resin is placed on the semiconductor chip 203.
Are aligned and overlapped.

The sheet 204 of the thermosetting resin composition is obtained as follows.

First, a paste-like kneaded material is prepared by mixing an inorganic filler and a liquid thermosetting resin, or a thermosetting resin whose viscosity is reduced by a solvent is mixed with the inorganic filler, and the paste-like kneaded product is similarly prepared. Make a kneaded material.

Next, the paste-like kneaded material is molded into a certain thickness and heat-treated to obtain a sheet-like material. The heat treatment is performed for the following reason. This is because a kneaded material using a liquid resin has a tackiness and is therefore slightly cured to remove tackiness while maintaining flexibility in an uncured state. Further, in a kneaded product using a resin dissolved by a solvent, the solvent is removed, and the adhesiveness is similarly removed while maintaining flexibility in an uncured state.

Next, the sheet-like material 204 stacked on the support 200 on which the semiconductor chip 203 is mounted is heated and pressed to integrate the two. As a result, as shown in FIG. 2D, the semiconductor chip 203 is embedded in the sheet-like material 204 and the thermosetting resin constituting the sheet-like material 204 is cured, so that the sealing of the semiconductor chip 203 and the sheet The bonding between the object 204 and the wiring pattern 201 is performed. At this time, the sheet 204 and the wiring pattern 20
In order to improve the adhesiveness with the sheet 1, the contact surface of the copper plating layer constituting the wiring pattern 201 with the sheet-like material 204 is
It is desirable to roughen. Similarly, in order to prevent adhesion and oxidation, the surface of the copper plating layer may be treated with a coupling agent or plated with tin, zinc, nickel, gold or the like.

Next, as shown in FIG. 2E, the embedded object of the semiconductor chip 203 manufactured as described above is ground or polished from the surface opposite to the support 200 to a predetermined thickness. Perform removal processing. For example, lapping using an abrasive (free abrasive), which is a general technique for polishing a semiconductor chip, can be used as it is. The semiconductor chip 203 has already been mounted, and the sheet
There is no breakage due to the impact during polishing and no contamination by the polishing liquid. Also, since the support 200 is in close contact with the opposite surface, there is no need to worry about contamination. By performing the grinding or polishing while protecting the semiconductor chip 203 in this manner, a semiconductor chip built-in module having a desired thickness can be obtained. Typical semiconductor chip thickness is 0.4mm
However, according to the present method, it can be processed to a thickness of about 50 μm.

Next, as shown in FIG.
Is peeled off. As a result, a thin semiconductor chip built-in module 210 is obtained. According to the above method, there is a special effect that an extremely thin semiconductor package can be formed.

Further, as shown in FIG. 3A, cutting may be performed at a cutting position 213 between adjacent semiconductor chips 203. Thus, an extremely thin chip size package is obtained, as shown in FIG. 3B. For the cutting, a dicing device used for processing a semiconductor chip can be used as it is.

In the above embodiment, after the semiconductor chip 203 is flip-chip mounted as shown in FIG. 2B, the support 200 on which the semiconductor chip 203 and the wiring pattern 201 are formed is formed.
It is preferable to inject a sealing resin (underfill) between the two and cure the resin. This is because when the semiconductor chip 203 is embedded by stacking the sheet-like objects 204, damage to the semiconductor chip 203 can be further reduced.
Existing sealing resins can be used. For example, when a resin in which silica (silicon oxide) as an inorganic filler is dispersed and contained in a liquid epoxy resin is used, the coefficient of thermal expansion of the sealing resin can be matched with the coefficient of thermal expansion of the semiconductor chip 203, and the absorption of moisture and the like can be achieved. This is preferable because the degree can be reduced.

In the above embodiment, the semiconductor chip 2
03 is mounted on the support 200 having the wiring pattern 201, the semiconductor chip 203 and the support 200 are interposed between the semiconductor chip 203 and the support 200 with an adhesive sheet in which a conductive filler is dispersed. May be integrated by compression. The metal bump 202 formed on the semiconductor chip 203 fits into the adhesive sheet, and only in the portion pressed by the metal bump 202 is the metal bump 202 and the wiring pattern 2 interposed via the conductive filler in the adhesive sheet.
01 is electrically connected. Moreover, the semiconductor chip 2
03 and the support 200 can be simultaneously sealed. Thereby, the mounting step of the semiconductor chip 203 and the step of injecting the underfill can be performed collectively, and the steps are simplified.

In the above embodiment, the sheet-like material 204
The heating and pressurizing step of embedding the semiconductor chip 203 is performed at a temperature equal to or lower than the curing start temperature of the thermosetting resin in the sheet-like material 204, and is further heated after the grinding or polishing step to heat the semiconductor chip 203. Preferably, the curable resin is cured. This is because grinding or polishing before the hardening of the sheet 204 is completed facilitates the processing. Thus, the grinding or polishing step can be performed in a shorter time.

Further, in the above embodiment, an example was described in which copper was used as the material of the wiring pattern 201. However, the present invention is not limited to this, and similar effects can be obtained by using a metal such as aluminum or nickel. .

In the above embodiment, an example in which a metal foil is used as the support 200 has been described, but the support 200 is not limited to this in the present invention. For example, an organic film can be used as the support 200. By using the organic film which is an insulator, at the stage before the semiconductor chip 203 is sealed with the sheet-like material 204 (that is, the state of FIG. 2B), the performance inspection of the semiconductor chip 203 and the connection between the semiconductor chip 203 and the wiring pattern 201 are performed. Can be tested. In the case of an organic film, another wiring pattern can be formed again after peeling and reused.

As a material of the organic film for the support 200, polyethylene, polyethylene terephthalate, polyethylene naphthalate, polyphenylene sulfide, polyimide, polyamide, and the like can be used. An organic film having a heat-resistant temperature corresponding to the curing temperature of the thermosetting resin constituting the sheet 204 may be selected from these. Among them, polyphenylene sulfide, polyimide, and polyamide are particularly excellent in heat resistance, dimensional stability, and mechanical strength, and are therefore most suitable as the organic film material for the support 200 of the present invention.

A specific method of forming the wiring pattern 201 when an organic film is used as the support 200 is as follows. First, an adhesive layer is applied to one side of an organic film, and a metal layer for the wiring pattern 201 is laminated thereon. Alternatively, a metal layer for the wiring pattern 201 may be formed on one surface of the organic film by a plating method. Next, the metal layer is chemically etched to form the wiring pattern 201.
To form

Further, in the above-described embodiment, in order to embed and seal the mounted semiconductor chip 203 from the non-functional portion side surface with the thermosetting resin composition, the sheet-like material 204 made of the resin composition is used. I did it. However, in the present invention, the method of sealing the semiconductor chip 203 is not limited to this. For example, after mounting the semiconductor chip 203 as shown in FIG. 2B, from the surface of the semiconductor chip 203 on the non-functional portion side,
An uncured paste made of the resin composition may be applied by a printing method and sealed in a vacuum or reduced pressure atmosphere. Thereafter, the paste is heated and cured. The heating is preferably performed in an atmosphere pressurized to a pressure higher than the atmospheric pressure.

By applying the paste in a vacuum or reduced-pressure atmosphere, the gap between the mounted semiconductor chip 203 and the wiring pattern 201 can be sufficiently filled. Further, by performing the heat curing in a pressurized atmosphere at atmospheric pressure or higher, minute voids generated at the time of applying the paste can be completely eliminated. As a result, the functional portion of the mounted semiconductor chip can be completely protected by the resin, so that an extremely reliable module can be obtained.

A specific sealing method using a paste-like material is as follows. First, the semiconductor chip 203 is mounted on the wiring pattern 201 as shown in FIG. 2B. Next, printing and sealing are performed using a screen printing device capable of holding the printing stage in a vacuum. Printing is performed using a metal mask having openings corresponding to regions to be printed and having a thickness corresponding to a desired thickness of the thermosetting resin composition after printing. The metal mask is overlaid on the surface of the semiconductor chip 203 on the non-functional portion side. At this time, the metal mask is positioned so that the opening of the metal mask is positioned above the wiring pattern 201 and the support 200 that are not covered with the semiconductor chip 203. Next, printing is performed while pressing the paste-like material from above the metal mask with a squeegee. Thus, a paste-like material having a thickness corresponding to the thickness of the metal mask can be provided in a region corresponding to the opening of the metal mask. By performing this printing process in a vacuum or reduced-pressure atmosphere, the paste-like material can be filled into a narrow gap between the semiconductor chip 203 and the wiring pattern 201. The degree of vacuum or reduced pressure is preferably about 100 to 10000 Pa.
If the pressure is less than 100 Pa, a small amount of solvent or the like in the paste may volatilize, which may increase voids. on the other hand,
If it is 10,000 Pa or more, the effect of removing voids is reduced. At the time of printing, it is preferable to slightly heat the paste to lower the viscosity. This is effective for void removal. After printing the paste, the paste is cured in a pressure oven that can be heated to a certain temperature. The pressure oven can increase the pressure in the oven by injecting a gas such as air or nitrogen and heating. A sample on which a paste is printed is put into a stainless steel container, and heated and pressed to a temperature at which the paste is cured. As a result, minute voids present inside can be completely removed.
The heating temperature varies depending on the type of resin constituting the paste-like material.
Perform at a temperature of 00 ° C. Pressing pressure is 0.5MPa ~ 1M
Approximately Pa is optimal. If the pressure is 0.5 MPa or less, the void removing effect is reduced, and if it is 1 MPa or more, a problem may occur in the pressure resistance of the container.

(Embodiment 2) FIGS. 4A to 4C are cross-sectional views illustrating a method of manufacturing a semiconductor chip built-in module according to Embodiment 2 of the present invention in the order of steps.

In FIG. 4A, reference numeral 210 denotes the semiconductor chip built-in module shown in FIG. 2F of the first embodiment, and the same reference numerals are used for the same components as those in FIG. 2F. 4
01 is prepreg for circuit board, 403 is prepreg 4
No. 01 is a conductive paste filled in the through holes in the thickness direction. 405 is a metal (copper) foil.

As the prepreg 401 for a circuit board, an uncured base material (prepreg) obtained by impregnating a glass woven fabric with an epoxy resin as a thermosetting resin can be used. Alternatively, an aramid-epoxy prepreg in which an aramid nonwoven fabric is impregnated with an epoxy resin, an organic film having a thermosetting resin layer formed on both sides, and the like can also be used. Furthermore, it is preferable to mix an inorganic filler in the thermosetting resin because the heat conduction characteristics and the coefficient of thermal expansion can be controlled.

As the conductive paste 403, a paste obtained by kneading a powder of a conductive material such as gold, silver or copper and a thermosetting resin such as an epoxy resin can be used. In particular, copper is effective because it has good conductivity and little migration. Further, as the thermosetting resin, a liquid epoxy resin is preferable in terms of heat resistance.

As shown in FIG. 4A, the module 210 with a built-in semiconductor chip, the prepreg 401 and the copper foil 405 are aligned and stacked in this order, and are further integrated by heating and pressing. The thermosetting resin in the prepreg 401 and the conductive paste 403 is hardened, and FIG.
Thus, a semiconductor chip built-in module having the structure shown in FIG.

Finally, as shown in FIG. 4C, a wiring pattern 407 is formed by etching the copper foil 405.

The module with a built-in semiconductor chip manufactured in this manner can form a fine circuit pattern and can be constituted by multilayer wiring, so that an extremely small and thin semiconductor package can be realized.

Further, the surface of the module shown in FIG. 4C on the wiring pattern 407 side is further provided with the prepreg 40 shown in FIG. 4A.
After laminating the copper foil 405 and the copper foil 405, the process of etching the copper foil 405 to form a wiring pattern is repeated a predetermined number of times, whereby a higher-density multilayer module can be realized.

In the first and second embodiments, the module incorporating the semiconductor chip has been described as an example. However, the module of the present invention can incorporate an electric element other than the semiconductor chip, for example, a chip resistor, a chip capacitor, a chip inductor, and a surface acoustic wave element.

Next, a module incorporating a surface acoustic wave element will be described.

(Embodiment 3) An embodiment of a module incorporating a surface acoustic wave element as an electric element will be described below with reference to the drawings.

FIG. 5 is a sectional view showing an electric element built-in module according to the third embodiment using a surface acoustic wave element as an electric element. 6A to 6C are cross-sectional views showing a method for manufacturing the electric element built-in module shown in FIG. 5 in the order of steps. 5 and 6A to 6C, 5
01 is a surface acoustic wave element, 502 is a piezoelectric substrate, 503 is a comb electrode, 504 is an extraction electrode, 505 is a metal bump,
506 is an enclosure, 507 is a circuit board, 508 is a thermosetting resin composition, 509 is a first wiring pattern, 510 is a second wiring pattern, 511 is a via hole, and 514 is a built-in circuit.

Similar to the conventional surface acoustic wave element shown in FIG. 7, the surface acoustic wave element 501 has one surface (functional portion) of a piezoelectric substrate 502 made of, for example, lithium tantalate, lithium niobate, or quartz. Electrode 503 made of a metal film containing aluminum as a main component or the like
And an extraction electrode 504 are formed. And
An enclosure 506 for securing a vibration space is formed in the functional part where the surface acoustic wave propagates. The enclosure 506 is
The space holding structure is formed so that the functional unit does not come into direct contact with another member and the propagation of the surface acoustic wave is not hindered. Such an enclosure 506 is described in, for example,
As shown in Japanese Patent No. 270975, it can be constituted by a support layer made of a film-shaped resin composition and a lid.

The surface of the surface acoustic wave element 501 opposite to the functional part and the resin composition 5 for sealing the surface acoustic wave element 501
08 is formed on the same plane by grinding or polishing at the same time. Thereby, the overall thickness can be reduced.

Note that the piezoelectric substrate 502, the comb-shaped electrodes 503,
The material forming the extraction electrode 504 is not particularly limited, and does not impair the effects of the present invention regardless of the material used.

On the lead electrode 504, a metal bump 505 for making an electrical connection with the outside is formed. In this embodiment mode, a gold bump is used as the metal bump 505.

The circuit board 507 has a first wiring pattern 509 on one surface and a second wiring pattern 5 on the other surface.
10 has a built-in circuit 514 formed therein. The first wiring pattern 509, the second wiring pattern 510, and the built-in circuit 514 are connected by a via hole 511. Through these, connection between the plurality of mounted surface acoustic wave elements 501 and an external circuit is performed. In the present embodiment, the first surface acoustic wave element 501 is mounted on the first side.
The surface of the wiring pattern 509 is plated with gold. In the built-in circuit 514, a phase shift circuit and passive elements such as a capacitor and an inductor are formed.

Next, a method of manufacturing such a module with a built-in surface acoustic wave element will be described with reference to FIGS. 6A to 6C.

First, as shown in FIG. 6A, the surface of the functional unit side of the surface acoustic wave element 501 is set to the circuit board 507 side, and the surface acoustic wave element 501 is positioned and mounted on the circuit board 507. Then, the metal bump 505 of the surface acoustic wave element 501 and the first wiring pattern 509 of the circuit board 507 are formed.
Are connected by using both heat and ultrasonic waves.

In this embodiment, the metal bump 505 is used.
However, the present invention is not limited to this. For example, gold bumps may be connected via a conductive adhesive. Alternatively, the connection may be made by using a solder bump as the metal bump 505 and reflowing the solder bump.

Also, in the present embodiment, the case where the piezoelectric substrates 502 of the plurality of surface acoustic wave elements 501 to be mounted have substantially the same thickness and are made of the same material is shown. It is not limited to this. For example, a plurality of surface acoustic wave elements 501 provided with piezoelectric substrates 502 having different thicknesses and / or materials may be mounted together. Further, in addition to the surface acoustic wave element 501, for example, at least one of a semiconductor chip, a chip resistor, a chip capacitor, and a chip inductor may be mounted together on the same circuit board 507.

The thermosetting resin composition 508 is applied to the circuit board 507 on which the surface acoustic wave element 501 is mounted in a face-down manner and cured by heating to embed and seal the surface acoustic wave element 501. (FIG. 6B). The application of the thermosetting resin composition 508 is performed as described in Embodiment 1,
A sheet-like material made of a resin composition is used as a surface acoustic wave element 501.
Or a method of printing an uncured paste made of the resin composition from the surface of the surface acoustic wave element 501 on the non-functional part side under a vacuum or reduced pressure atmosphere. Can do it. Alternatively, a resin composition is previously injected between the surface acoustic wave element 501 and the circuit board 507, and then the surface acoustic wave element 50
The surface of the non-functional portion 1 may be coated with a resin composition.

As described above, in the present embodiment, since the periphery of the surface acoustic wave element 501 is covered with the thermosetting resin composition 508, the functional portion of the surface acoustic wave element 501 does not come into contact with the resin composition 508. As described above, it is preferable to form the space holding structure in the functional unit. Thereby, the resin can be filled also between the surface acoustic wave element 508 and the circuit board 507, and the external force applied at the time of the grinding or polishing step for thinning the sheet becomes not only the metal bump 505 but also the external force. It can also support filled resin. As a result, stress is not concentrated in the vicinity of the metal bump 505, and problems such as cracking of the piezoelectric substrate 502 can be prevented.

The enclosure 506 that forms the space holding structure
Is preferably composed of a film-shaped resin composition. Thereby, the adhesiveness with the resin composition 508 covering the periphery of the surface acoustic wave element 501 is improved, and in the subsequent grinding or polishing step, no separation or the like occurs at the interface between the enclosure 506 and the resin composition 508, A highly reliable component built-in module can be obtained.

Next, the object embedded with the resin composition 508 of the surface acoustic wave element 501 is ground or polished from the surface opposite to the circuit board 507 to a predetermined thickness. At this time, it is preferable to grind or polish the surface of the surface acoustic wave element 501 on the non-functional portion side to be a rough surface. In the surface acoustic wave element 501, the surface acoustic wave generated in the functional portion propagates in the thickness direction of the piezoelectric substrate 502, is reflected on the surface on the non-functional portion side, returns to the functional portion, and deteriorates the characteristics. By roughening the surface on the non-functional part side, the influence of the reflected wave can be reduced, and a component built-in module having excellent frequency characteristics can be obtained. In particular, it is preferable to roughen the surface roughness of the surface on the non-functional portion side to be equal to or larger than the wavelength of the surface acoustic wave of the surface acoustic wave element. For example, the application frequency of the surface acoustic wave element is 100 MHz to 10 GHz, and the propagation speed is 400
Assuming 0 m / sec, the wavelength of the surface wave is 0.4 μm to 40 μm. Therefore, in this case, the surface roughness R
It is preferable that z is at least 0.4 μm or more.

On the other hand, a piezoelectric substrate 502 made of a piezoelectric single crystal
When the surface is roughened, a deteriorated layer is formed on the processed surface, which may degrade the characteristics of the surface acoustic wave element. The work-affected layer is formed deeper as the grain size of the abrasive used increases. In addition, when the roughness is increased, cracks are generated on the piezoelectric substrate or microcracks are generated, which lowers the reliability. According to experiments performed by the present inventors, when processing is performed so that the surface roughness Rz is 50 μm or more, phenomena such as substrate cracking and characteristic deterioration occur frequently, and it is difficult to obtain a thin component built-in module. Met.

Conversely, as the surface roughness decreases, the frictional stress during grinding or polishing increases, and the surface acoustic wave element 5
In some cases, a connection portion between the first wiring pattern 509 and the first wiring pattern 509 may be broken, that is, a connection between the extraction electrode 504 and the metal bump 505 or a connection between the metal bump 505 and the first wiring pattern 509 may be broken. Further, the amount of heat generated during grinding or polishing also increases, and the generated heat adversely affects the surface acoustic wave element 501,
Cracks are generated at the interface between the surface acoustic wave element 501 and the resin composition 508. According to our experiments,
When processing is performed so that the surface roughness Rz is 0.5 μm or less, these problems frequently occur, and it is difficult to obtain a thin module with a built-in component.

From the above, in consideration of the characteristic deterioration of the surface acoustic wave element 501, the cracking of the piezoelectric substrate 502, the deterioration of the connection reliability, and the like, the surface roughness Rz of the surface acoustic wave element 501 is set to 0.1.
It is preferable to grind or polish so as to be in the range of 5 μm to 50 μm. More preferably, the surface acoustic wave element 50
It is preferable that not only 1 but also the thermosetting resin composition 508 be ground or polished so that the surface roughness Rz is in the range of 0.5 μm to 50 μm.

Thus, a module having a surface acoustic wave element as shown in FIG. 5 is obtained.

According to the present embodiment, the mounted surface acoustic wave element is sealed with the thermosetting resin composition, and the surface of the surface acoustic wave element on the non-functional portion side is formed together with the thermosetting resin composition. By forming the same surface by grinding or polishing, it is possible to easily process a surface acoustic wave element, which was conventionally difficult to reduce the thickness, and to obtain a thin module with a built-in surface acoustic wave element. .

Further, by forming a space holding structure on the functional part formed on the surface of the surface acoustic wave element so as not to hinder the excitation and propagation of the surface acoustic wave element, the surface of the surface acoustic wave element on the functional part side is formed. In this case, the surface acoustic wave element is not cracked during the grinding or polishing step.

Further, by forming the space holding structure from a film-shaped resin composition, a highly reliable surface acoustic wave element built-in module having high affinity with the resin composition to be sealed can be obtained.

Further, the surface roughness Rz of the surface of the surface acoustic wave element and the thermosetting resin composition formed so as to be in the same plane is in the range of 0.5 μm to 50 μm. A thin module with a built-in surface acoustic wave element can be obtained without affecting the characteristics of the device.
At the same time, the connection reliability of the metal bumps is high,
Deterioration and the like can be prevented, and a highly reliable surface acoustic wave element built-in module can be obtained.

In the first embodiment, the semiconductor chip 20
3 is mounted on the wiring pattern 201 on the support 200, but may be mounted on the circuit board 507 as described in the third embodiment. Similarly, although the surface acoustic wave element 501 is mounted on the circuit board 507 in the third embodiment, it can be mounted on the wiring pattern 201 on the support 200 as described in the first embodiment.

[0131]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, specific embodiments will be described in detail.

(Example 1) An example corresponding to the first embodiment will be described.

First, the wiring pattern 20 shown in FIG.
A method for producing the copper foil support 200 having the surface 1 formed thereon will be described.

For the copper foil support 200, an existing copper foil for a circuit board can be used. Rotate the drum-shaped electrode in the electrolyte,
The copper plating layer formed on the drum was manufactured by a continuous winding method. At this time, a copper foil having an arbitrary thickness can be continuously formed based on a current value, a rotation speed, and the like for forming a plating layer. The thickness of the used copper foil was 70 μm.

Next, an extremely thin organic layer was formed on the surface of the copper foil support 200, or a different metal such as nickel or tin was similarly thinly plated to form a peeling layer at the time of subsequent transfer. Although transfer can be performed without forming a peeling layer, overetching can be prevented when the wiring pattern 201 is formed by etching by forming the peeling layer. Alternatively, the transferred wiring pattern 201 can be embedded in the sheet 204 by slightly etching the copper foil support 200 without forming the release layer. In this example, a release layer was provided on the copper foil support 200, and further, copper plating to be a wiring pattern was performed thereon. The thickness of the copper plating layer was 12 μm.
Thereafter, the copper plating layer was etched into a predetermined pattern to obtain a wiring pattern 201.

The semiconductor chip 203 was mounted on the copper foil support 200 having the wiring pattern 201 made of the copper plating layer thus manufactured by the flip chip method. The semiconductor chip 203 used was a silicon memory semiconductor having a thickness of 0.3 mm and a plane size of 10 mm × 10 mm.
Met.

The mounting method is as follows. First, a gold wire having a diameter of 25 μm was bonded to an aluminum electrode of the semiconductor chip 203 (first bonding), and further a gold wire was bonded onto the first bonding (second bonding). Thus, a two-step protruding gold bump was formed. Since the heights of the formed gold bumps are not the same, leveling was performed by pressing a mold against a group of gold bumps on the semiconductor chip and applying a constant pressure to make the height uniform.
The surface on the side of the gold bump 202 of the semiconductor chip 203 with the gold bump 202 manufactured as described above is pressed onto a conductive paste skived to a certain thickness on a flat plate, and
A conductive paste was applied to the tip of the step-shaped protruding gold bump 202.

The semiconductor chip 2 manufactured as described above
03 is positioned and superimposed on the wiring pattern 201, and further heated to cure the conductive paste.
2 and the wiring pattern 201 were electrically connected via a conductive paste (FIG. 2B).

Next, the space between the copper foil support 200 having the wiring pattern 201 and the semiconductor chip 203 was sealed with a liquid resin. The resin used was a paste-like resin in which silica particles for controlling the coefficient of thermal expansion were mixed with a liquid epoxy resin. This resin was dropped into a gap between the semiconductor chip 203 and the wiring pattern 201, and was sealed using surface tension. Although resin sealing is not always necessary, by performing resin sealing, the connecting portion is mechanically reinforced by applying an external force in a subsequent step so that the conductive paste does not cause a failure of the connecting portion. Therefore, it is preferable to perform the process from the viewpoint of workability.

Next, a sheet 204 made of a mixed composition of an inorganic filler and a thermosetting resin is overlaid on the semiconductor chip 203 mounted on the copper foil support 200, and the semiconductor chip 203 is heated and pressed. The sheet 2
04 was buried.

The method for producing the sheet-like material used is as follows.

The composition of the resin composition constituting the sheet is shown below.

(1) Inorganic filler: 90% by weight of Al ₂ O ₃ (AS-40 manufactured by Showa Denko KK, spherical 12 μm) (2) Thermosetting resin: 9.5% by weight of liquid epoxy resin (Japan (EF-450, manufactured by LEC Corporation) (3) Others:-Carbon black 0.2% by weight (Toyo Carbon Co., Ltd.)-Coupling agent 0.3% by weight (Titanate 46B manufactured by Ajinomoto Co., Ltd.) The inorganic filler weighed by the composition, the liquid thermosetting resin, and the like were charged into a container having a predetermined capacity. Next, the container was set in a stirring mixer, and the contents of the container were mixed. The stirring mixer used revolves the container while rotating the container itself, and a sufficiently dispersed state can be obtained in a short time of about 10 minutes even if the viscosity is relatively high.

A prescribed amount of the paste-like mixed resin composition thus obtained was dropped on a release film. As the release film, a 75 μm-thick polyethylene terephthalate film whose surface was subjected to release treatment with silicon was used. Another release film was further laminated on the resin composition dropped onto the release film, and pressed to a constant thickness by a pressure press. Next, the resin composition sandwiched between the two release films was heated together with the release film, and heat-treated under the condition that the tackiness was lost.

The heat treatment is performed at a temperature of 120 ° C. for 15 minutes. Thereafter, the release films on both sides were peeled off to obtain a non-adhesive sheet 204 having a thickness of 500 μm.
Since the used thermosetting epoxy resin has a curing start temperature of 130 ° C., it is in an uncured state (B stage) under the heat treatment conditions, and can be melted again by heating in the subsequent steps. .

A copper foil support 200 on which a semiconductor chip 203 was mounted was set in a mold, and the above-mentioned sheet-like material 204 was further placed thereon. Heat the mold to 150 ° C to 9.8
It was pressurized at a pressure of × 10 ⁶ Pa (100 kg / cm ² ).
The holding time is 15 minutes. As a result, as shown in FIG. 2D, the semiconductor chip 203 was embedded in the sheet 204, and the sheet 204 was cured.

Next, the semiconductor chip built-in material was polished from the back side of the semiconductor chip 203 (the side opposite to the copper foil support 200). Polishing was performed using a normal lapping machine until the thickness became 170 μm. Polishing was performed with the copper foil support 200 adhered as shown in FIG. 2E.
This is because it is possible to prevent the polishing agent or water from entering during the polishing to contaminate the wiring pattern 201.

After polishing to a desired thickness, the substrate was washed and the copper foil support 200 was peeled off (FIG. 2F). Copper foil support 20
Since No. 0 has a glossy surface, the sheet-like material 204 could be easily peeled off even in a cured state.

The ultra-thin semiconductor chip built-in module 210 manufactured as described above contains alumina as an inorganic filler in the sheet-like material 204, and therefore, has a heat about 20 times or more that of the conventional glass epoxy substrate. Conductive properties were obtained. When the semiconductor chip built-in module 210 was manufactured similarly using various inorganic fillers instead of alumina, it was found that when AlN or MgO was used, the thermal conductivity was higher than that of alumina.

When amorphous SiO ₂ is used as the inorganic filler in the sheet 204, the sheet 20
The coefficient of thermal expansion of No. 4 could be approximated to the coefficient of thermal expansion of the silicon semiconductor. As a result, it has been found that it is also promising as a flip chip substrate on which a semiconductor chip is directly mounted.

Further, by using AlN having good thermal conductivity, thermal conductivity close to that of a ceramic substrate was obtained.

When BN was added, high thermal conductivity and low thermal expansion were obtained. Especially when the BN content is 85
It was found that when the content was not less than% by weight, good heat conduction characteristics were obtained and the cost was low, so that the module was promising as a high heat conduction module.

Further, in a system using SiO ₂ , a material having a lower dielectric constant than that of the others can be obtained, and the specific gravity is light.
It was found to be effective for high frequency applications such as mobile phones.

As shown in FIG. 2F, a semiconductor chip or an electronic component can be further mounted on the wiring pattern 201 exposed by peeling the copper foil support 200. As a result, a semiconductor chip built-in module which is extremely densely mounted can be obtained. At this time, the material of the inorganic filler can be selected according to the component to be mounted.

Further, as shown in FIG. 3A, a module incorporating a plurality of semiconductor chips is sliced by a slicer.
Dividing into a large number of pieces has a special effect that a chip size package as shown in FIG. 3B can be easily obtained.

In the above embodiment, when the mounted semiconductor chip 203 is embedded in the sheet
Curing was carried out while applying pressure at a temperature of ° C. As another example, the pressure is released after the semiconductor chip 203 is embedded by lowering the melt viscosity of the thermosetting resin by applying pressure at 100 ° C., which is equal to or lower than the curing start temperature of the thermosetting resin, for 2 minutes. And cured to 150 ° C. In this case as well, a module with a built-in semiconductor chip could be manufactured without any problem similarly to the above-described embodiment.

In the above another embodiment, the step of embedding a semiconductor chip and the step of curing a thermosetting resin are performed separately. The embedding process that requires pressurization can be performed in a short time by lowering the resin viscosity, and the subsequent curing process can be batch-processed, so that the total required time can be shortened.

In the above embodiment, the semiconductor chip 20
The mounting of No. 3 was performed using a conductive paste, but a flip chip mounting method using a solder bump or a thermosetting resin sheet in which a conductive filler was dispersed was used to form the bump 202.
A method may be used in which only the bump 202 is made conductive by compression by the method described above. According to this, there is no need for resin sealing between the copper foil support 200 and the semiconductor chip 203, which is economically advantageous.

(Example 2) An example corresponding to the second embodiment will be described. An example in which a module with a built-in semiconductor chip having a multilayer structure is manufactured using the polished module with a built-in semiconductor chip 210 manufactured by the same method as that of the first embodiment will be described.

As shown in FIG. 4A, multilayering was performed using the semiconductor chip built-in module 210 manufactured in Example 1, a prepreg 401 for a circuit board, and a copper foil 405.

The circuit board prepreg 401 used was a B-stage in which a glass woven fabric was impregnated with an epoxy resin. The thickness was 100 μm. The above prepreg is cut into a predetermined size, and a carbon dioxide laser is used to cut the prepreg at a position having a pitch of 0.2 mm to 2 mm at an equal interval with a diameter of 0.1 mm.
A 5 mm through hole was formed.

85% by weight of spherical copper particles and a bisphenol A type epoxy resin (Epicoat 82
8 3% by weight of Yuka Shell Epoxy Co., Ltd., 9% by weight of a glycidyl ester-based epoxy resin (YD-171 manufactured by Toto Kasei Co., Ltd.), and 3% by weight of an amine adduct curing agent (MY-24 manufactured by Ajinomoto Co.) as a curing agent Are kneaded with a three-roll mill to form a conductive paste 403 for filling via holes.
I got The conductive paste 403 is applied to the prepreg 4
No. 01 was filled by a screen printing method.

The prepreg 401 manufactured as described above
The semiconductor chip built-in module 210
On the other surface, a 35 μm-thick one-side roughened copper foil (the roughened surface was on the prepreg 401 side) was aligned as shown in FIG. 4A and overlapped. ° C, pressure 4.9 × 10 ⁶ Pa (50 kg / cm ² )
For 60 minutes.

Thus, the thermosetting resin in the prepreg 401 was cured by heating, and the semiconductor chip built-in module 210 and the copper foil 405 were bonded. At the same time, the thermosetting resin in the conductive paste 403 filled in the through holes was also cured, and the wiring pattern 201 was electrically connected to the copper foil 405 (FIG. 4B).

The copper foil 405 of the surface layer adhered by curing the prepreg 401 was etched by an etching technique to form a wiring pattern 407 (FIG. 4C).

A solder reflow test and a temperature cycle test were performed as a reliability evaluation test of the module with a built-in semiconductor chip manufactured in this example. The solder reflow test was performed at a maximum temperature of 260 ° C using a belt-type reflow tester.
The test was performed by passing through a high-temperature atmosphere for 10 seconds for 10 times.
The temperature cycle test was performed at 125 ° C for 30
The operation of holding for 30 minutes at −60 ° C. for 30 minutes on the low temperature side, respectively, is defined as one cycle, and
Repeated for 0 cycles.

As a result, in any of the tests, the module with a built-in semiconductor chip of this example did not show any change in shape such as cracks, and no abnormalities were observed in the ultrasonic flaw detector. Thus, it was found that the semiconductor chip 203 and the resin composition 204 were firmly adhered. Also, the inner via hole connection resistance due to the conductive paste 403 hardly changed from the initial performance.

By repeating the process of laminating the circuit board prepreg 401 in which the conductive paste 403 is filled in the through holes and the copper foil 405 on the surface on the wiring pattern 407 side, a semiconductor having a multilayer wiring structure is obtained. A module with a built-in chip could be manufactured. This allows
A higher density wiring module was realized.

The embodiments and examples described above are:
All are intended to clarify the technical contents of the present invention, and the present invention is not construed as being limited to such specific examples, but is described in the spirit of the invention and the claims. The present invention should be interpreted in a broad sense because various changes can be made without departing from the scope of the present invention.

[0170]

According to the electric element built-in module of the present invention, since the electric element is sealed with the thermosetting resin composition, the mechanical strength is improved. Such a module can be obtained by simultaneously grinding or polishing the upper surface of the electric element and the upper surface of the thermosetting resin composition to a desired thickness. At this time, since the electric element is sealed with the thermosetting resin composition, the electric element is not damaged by external force during processing. Thus, a thin electric element built-in module having mechanical strength can be provided. In addition, by including two or more electric elements, a module that is densely mounted can be realized. Further, by dividing the package into electric elements, a thin electric element built-in package having mechanical strength can be provided.

Next, according to the method for manufacturing a module with a built-in electric element of the present invention, a thick electric element is mounted, sealed with a thermosetting resin composition, and then ground or polished from the surface on the non-functional part side. Since the electric element is reinforced with the resin composition, the mechanical impact and load applied to the electric element during grinding or polishing can be reduced. Therefore, a thin module with a built-in electric element can be obtained without breaking the electric element. Further, since the electric element is sealed with the resin composition at the time of grinding or polishing, contamination of the electric element and the electric connection portion can be prevented.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view illustrating a structure of a module with a built-in semiconductor chip according to a first embodiment of the present invention;

2A to 2F are cross-sectional views showing a method of manufacturing the module with a built-in semiconductor chip shown in FIG. 1 in the order of steps.

3A and 3B are cross-sectional views illustrating a method of manufacturing a chip size package using the semiconductor chip built-in module shown in FIG. 1 in the order of steps.

FIGS. 4A to 4C are cross-sectional views illustrating a method of manufacturing a semiconductor chip built-in module according to a second embodiment of the present invention in the order of steps.

FIG. 5 is a cross-sectional view illustrating a structure of a module with a built-in surface acoustic wave element according to a third embodiment of the present invention;

6A to 6C are cross-sectional views showing a method of manufacturing the surface acoustic wave element built-in module shown in FIG. 5 in the order of steps.

FIG. 7 is a cross-sectional view showing the structure of a conventional electric element built-in module incorporating two surface acoustic wave elements.

DESCRIPTION OF SYMBOLS 200 Support 201 Wiring pattern 202 Bump 203 Semiconductor chip 204 Thermosetting resin composition 210 Semiconductor chip built-in module 213 Cutting position 401 Pre-preg for circuit board 403 Conductive paste 405 Metal (copper) foil 407 Wiring pattern 501 Surface acoustic wave element 502 Piezoelectric substrate 503 Comb-shaped electrode 504 Extraction electrode 505 Metal bump 506 Enclosure 507 Circuit substrate 508 Thermosetting resin composition 509 First wiring pattern 510 Second wiring pattern 511 Via hole 514 Built-in circuit

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 23/29 H03H 9/25 A 23/31 H05K 3/20 A H03H 3/08 3/28 B 9 / 25 3/32 B H05K 3/20 3/46 B 3/28 H01L 23/12 L 3/32 23/30 B 3/46 (72) Inventor Yasuhiro Sugaya 1006 Odakadoma, Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd. Inside the company (72) Inventor Keiji Onishi 1006 Ojidoma Kadoma, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (34)

[Claims] An electronic device comprising: a wiring pattern; two or more electric elements mounted on the wiring pattern; and a thermosetting resin composition for sealing the electric element. An electric element built-in module, wherein the upper surface of the thermosetting resin composition forms substantially the same surface as the upper surface. 2. The device according to claim 1, wherein at least one of the electric elements includes a functional part and a connection electrode on a surface on the wiring pattern side, and the connection electrode is connected to the wiring pattern. Module with built-in electric element. 3. The module according to claim 1, wherein at least one of the electric elements is at least one selected from the group consisting of a semiconductor chip, a chip resistor, a chip capacitor, and a chip inductor. 4. The module according to claim 1, wherein at least one of the electric elements is a surface acoustic wave element. 5. The surface acoustic wave element has a functional part on a surface on the wiring pattern side, and a space holding structure for preventing excitation and propagation of a surface acoustic wave in the functional part from being hindered. 5. The module with a built-in electric element according to 4. 6. The electric element built-in module according to claim 5, wherein the space holding structure is made of a film-shaped resin composition. 7. The surface roughness Rz of the upper surface of the two or more electric elements forming the substantially same surface and the surface roughness Rz of the upper surface of the thermosetting resin composition are both 0.5 μm to 50 μm. Module with built-in electric element. 8. The electric element built-in module according to claim 1, wherein the thermosetting resin composition comprises an inorganic filler and a thermosetting resin. 9. The module according to claim 8, wherein a main component of the thermosetting resin is an epoxy resin, a phenol resin or a cyanate resin. 10. The method according to claim 10, wherein the inorganic lipid filler is Al ₂ O ₃ ,
MgO, BN, electric element built-in module according to claim 8 is at least one selected AlN, or from the group comprising of SiO _2. 11. The module according to claim 1, wherein the wiring pattern is formed on a surface of a circuit board. 12. The module according to claim 1, wherein the wiring pattern is formed on a surface of a support. 13. The module with a built-in electric element according to claim 12, wherein the support is made of an organic film or a metal foil. 14. The module according to claim 1, wherein at least one of the electric elements is connected to the wiring pattern via a bump. 15. A step of mounting, on a wiring pattern, at least one electric element having a functional portion and a connection electrode on one surface with the one surface side being the wiring pattern side; Encapsulating with a thermosetting resin composition from the other surface of the electric element, and grinding or polishing from the other surface of the electric element. Module manufacturing method. 16. The built-in electric element according to claim 15, wherein a bump is formed on a connection electrode of the electric element, and the electric element is mounted on the wiring pattern using the bump and a conductive adhesive. Module manufacturing method. 17. The method according to claim 15, wherein a bump is formed on a connection electrode of the electric element, and the electric element is mounted on the wiring pattern using the bump and a sheet in which a conductive filler is dispersed. A method for manufacturing the module with a built-in electric element according to the above. 18. The electric element according to claim 15, wherein a bump is formed on a connection electrode of the electric element, and the electric element is mounted on the wiring pattern by ultrasonically connecting the bump and the wiring pattern. Method for manufacturing module with built-in electric element. 19. The electric element and the wiring pattern after the step of mounting the electric element on the wiring pattern and before the step of sealing the electric element with the thermosetting resin composition. The method for manufacturing a module with a built-in electric element according to claim 15, further comprising a step of injecting a resin and curing the resin. 20. Sealing of the electric element with the thermosetting resin composition, after stacking an uncured sheet made of the thermosetting resin composition on the other surface of the electric element. The method for manufacturing a module with a built-in electric element according to claim 15, wherein the method is performed by heating and pressurizing. 21. Sealing of the electric element with the thermosetting resin composition, the uncured paste made of the thermosetting resin composition is vacuum- or depressurized from the other surface side of the electric element. The method for manufacturing a module with a built-in electric element according to claim 15, wherein the method is carried out by heating after applying below. 22. The method for manufacturing an electric element built-in module according to claim 21, wherein the heating is performed at a pressure higher than the atmospheric pressure. 23. The electric element built-in module according to claim 20, wherein the thermosetting resin composition contains at least a thermosetting resin, and the heating temperature is equal to or lower than a curing start temperature of the thermosetting resin. Manufacturing method. 24. The thermosetting resin composition contains at least 70 to 95% by weight of an inorganic filler and 5 to 3 thermosetting resins.
The method for producing a module with a built-in electric element according to claim 15, comprising 0% by weight. 25. The method according to claim 15, further comprising, after the grinding or polishing step, a step of dividing the module into a desired shape. 26. The method according to claim 15, wherein the wiring pattern is formed on a surface of a circuit board. 27. The method according to claim 15, wherein the wiring pattern is formed on a surface of a support. 28. The method according to claim 27, wherein the support comprises an organic film or a metal foil. 29. The method according to claim 27, further comprising a step of peeling the support after the grinding or polishing step. 30. A circuit board prepreg having a through hole in a thickness direction filled with a conductive paste on a surface of the wiring pattern side exposed by the peeling after the step of peeling the support, 30. The method of manufacturing an electric element built-in module according to claim 29, further comprising a step of laminating a foil in this order, heating and pressing, and then etching the metal foil to form a wiring pattern. 31. A step of peeling the support after the step of sealing the electric element with a thermosetting resin composition and before the step of grinding or polishing; On the wiring pattern side surface, a prepreg for a circuit board having a through hole in the thickness direction filled with a conductive paste and a metal foil are laminated in this order, and after heating and pressing, the metal foil is etched. The method for manufacturing a module with a built-in electric element according to claim 27, further comprising: 32. After the step of forming a wiring pattern by etching the metal foil, the surface on the wiring pattern side obtained by the etching is provided with a through hole in a thickness direction filled with a conductive paste. The prepreg for a circuit board and the second metal foil are laminated in this order, and after heating and pressing, the step of etching the second metal foil to form a second wiring pattern is further provided at least once or more. Or the method for manufacturing an electric element built-in module according to 31. 33. The method for manufacturing an electric element built-in module according to claim 15, wherein the electric element and the thermosetting resin composition are simultaneously ground or polished so that both have substantially the same height. 34. The method according to claim 15, wherein the grinding or polishing is performed by a polishing method using an abrasive.