JP2000340736A - Semiconductor device, packaging structure thereof and manufacturing method of them - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device having a structure, where small- sized and thin laminated three-dimensional packaging of semiconductor device components can be realized with high reliability and high performance and with good workability and various demands such as imparting high performance, high reliability, small size, thin type and lightweight are realized, the packaging structure of the device and the manufacturing methods of these of the device and the structure. SOLUTION: External connection terminals 34 are provided on the peripheral parts of a surface, which faces the side of the chip 32 of a narrow chip occupancy area from among semiconductor chips 29 and 32 respectively subjected to flip-chip bonding to an intermediate substrate 28, of the substrate 28 and the substrate 28 is mounted on a printed wiring board 36 at the terminals 34 via solder ball electrodes 35 which is higher than the thickness of the chips 29 and 32.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device and a mounting structure thereof, and a method of manufacturing the same.

[0002]

2. Description of the Related Art In recent years, portable electronic devices such as digital video cameras, digital portable telephones, and notebook personal computers have become widespread, and these portable electronic devices have been reduced in size, thickness, weight, etc. Are increasingly required.

In order to further reduce the size, thickness, and weight of portable electronic devices, it is important to increase the component mounting density. In particular, semiconductor ICs
For such semiconductor devices, a high-density mounting technology using a flip-chip type semiconductor device instead of a conventional package type semiconductor device has been developed and put into practical use.

As one of the flip chip connection methods, there is a method of forming and mounting a solder ball bump on an Al electrode pad of a semiconductor IC (integrated circuit). As a method of forming the solder bump on the predetermined electrode as described above, there is a method using electrolytic plating. In this case, the thickness of the solder to be formed depends on the surface condition of the base material layer and the variation in electric resistance. In some cases, it is difficult to form solder ball bumps having a uniform height in an IC chip.

As a manufacturing method capable of suppressing such a variation in solder height, there is a pattern forming method using film formation by vacuum evaporation and lift-off of a photoresist film.
One example of the manufacturing process of the solder ball bump by this method will be described below with reference to FIG.

[0006] At the junction of the flip chip IC, FIG.
As shown in (a), A is formed on a semiconductor substrate 1 such as silicon.
An electrode pad 2 of l-Cu alloy or the like is formed by sputtering or etching, and a surface protective film 3 is further covered with a silicon nitride film or polyimide, and then an opening is formed on the electrode pad 2. BLM (Ball Limitting
Metal) A metal multilayer film made of Cr, Cu, Au, or the like, which is called a film 4, is formed by a sputtering method.

[0007] Then, as shown in FIG.
After forming a resist pattern 6 having an opening 5 on the LM film 4, as shown in FIG. 8C, a solder vapor-deposited film 13 is formed on the entire surface of the wafer, and further as shown in FIG. Next, a desired pattern is formed by removing an unnecessary solder film by lift-off of the resist. Then, as shown in FIG. 8E, heat treatment is applied to melt the solder, and finally the solder ball bumps 14 are formed.

[0008] By mounting the device chip on which the bumps are formed in this way on a printed wiring board by flip chip mounting, a mother board (printed wiring board) is required as compared with a case where a device packaged with a conventional mold resin is mounted. Can contribute to the realization of various electronic devices that are smaller and lighter.

[0009]

However, for example, IC cards, mobile phones, PDAs (Personal Digital Assemblies)
(i.e. istant) and other portable electronic devices, in order to reduce the mounting space of the device as much as possible. There is an urgent need to establish a high-density three-dimensional packaging technology for semiconductor devices that can be further thinned.

[0010] Under these circumstances, as shown in FIG. 9, two I / Os are mounted in one package (that is, in the common epoxy resin 7) as device components stacked and mounted also in the height direction.
A part in which the C chips 8 and 9 are mounted on top of each other has been partially put to practical use. In the drawing, reference numeral 10 denotes a bonding wire, 1
1 and 12 are conductive patterns, 15 is an intermediate substrate, 16 is a solder ball bump, and 17 is a printed wiring board.

However, the wire bonding using the wire 10 is used as the connection means, which increases the package thickness (component mounting height) of the IC chip, and reduces the mounting area by routing the wires to avoid contact. There was a problem such as extra storage.

Japanese Patent Application Laid-Open No. 7-176684 discloses that an IC chip is mounted on both surfaces of an intermediate substrate (interposer) by a flip chip method, the periphery of the chip is sealed with a potting resin, and the periphery of the intermediate substrate is surrounded. A structure in which a reinforcing plate (stiffener base) is attached to the portion and mounted on a printed wiring board by bump electrodes provided on the reinforcing plate is shown.

However, such a mounting structure does not use wire bonding, so that the package thickness and the mounting area are relatively small. However, since the reinforcing plate must be mounted as described above, the mounting accuracy and workability are reduced. In addition to the problem of performance, the mounting height also increases.

SUMMARY OF THE INVENTION It is an object of the present invention to realize small and thin stacked three-dimensional mounting of semiconductor device components with high reliability, high functionality and good workability, and to achieve high performance, high reliability, small size and thinness.
It is an object of the present invention to provide a semiconductor device that realizes various requirements such as weight reduction, a mounting structure thereof, and a manufacturing method thereof.

[0015]

That is, according to the present invention, a first semiconductor chip is provided on one surface of a base and a second semiconductor chip is provided on the other surface.
Semiconductor chips are respectively face-down bonded in different chip occupation areas, and the first and second semiconductor chips are
The present invention relates to a semiconductor device in which external connection terminals are provided in a peripheral portion of the base surface on the side where the chip occupied area is smaller in the semiconductor chip of the first or second semiconductor chip. The present invention relates to a mounting structure of a semiconductor device which is connected to a wiring board at the external connection terminal via an electrode having a thickness greater than a thickness.

Further, the present invention provides a step of face-down bonding a first semiconductor chip to one surface of a base, a step of forming external connection terminals on a peripheral portion of the other surface of the base, And performing a face-down bonding of a second semiconductor chip having a smaller chip occupation area than the first semiconductor chip to the other surface at a position inside the terminal. And a step of connecting the second semiconductor chip to a wiring board at the external connection terminal via an electrode that is thicker than the thickness of the first or second semiconductor chip, in addition to the face-down bonding step. A method of manufacturing a semiconductor device mounting structure is also provided.

According to the semiconductor device of the present invention, its mounting structure, and its manufacturing method, the first surface of the base is
The second semiconductor chip is face-down bonded to the other surface with a different chip occupation area from each other, and the base surface of the first and second semiconductor chips on the side where the chip occupation area is smaller. An external connection terminal is provided in a peripheral portion (or the second semiconductor chip having a smaller chip occupation area than the first semiconductor chip is bonded to a position inside the external connection terminal). Since the external connection terminal is mounted on the wiring board via an electrode higher than the thickness of the first or second semiconductor chip, bonding is performed by a flip chip method without using wire bonding to reduce the package thickness and the mounting area. Workability, and can be directly mounted on the wiring board via the electrodes provided on the external connection terminals. Improved, mounting height can also be reduced.

Accordingly, small and thin stacked three-dimensional mounting of semiconductor device components can be realized with high reliability, high functionality and good workability, and various demands for high performance, high reliability, small size, thinness, and light weight are required. Can be realized.

[0019]

DESCRIPTION OF THE PREFERRED EMBODIMENTS In the present invention, the first semiconductor chip is provided on one surface of an intermediate substrate as the base,
The second semiconductor chip having a smaller chip size than the first semiconductor chip is flip-chip bonded to the other surface, and the second semiconductor chip is mounted on a peripheral portion of a surface of the intermediate substrate on which the second semiconductor chip is mounted. Preferably, the external connection terminal is provided.

In each of the first and second semiconductor chips, a surface on which no bump electrode (bump electrode: this may be a conductive paste or the like; the same applies hereinafter) is thinned. The first and second semiconductor chips are thinned to a thickness of 200 μm or less,
Preferably, the substrate has a thickness of 200 μm or less.

In the first and second semiconductor chips, it is preferable that a resin is filled between the plurality of projecting electrodes so as to be thinner than the height of the projecting electrodes in order to reinforce the projecting electrodes.

It is preferable that the first and second semiconductor chips together form a high-performance component module. For example, the first semiconductor chip is for logic, and the second semiconductor chip is for memory. It is preferable that they are respectively mounted and connected to each other by wiring.

In mounting on the wiring board, it is preferable that the semiconductor device or the second semiconductor chip is directly connected to the wiring board by the electrode. This electrode may be a bump electrode provided on the semiconductor device side (or the wiring substrate side).

Also in this case, the surface of the first and second semiconductor chips on which the protruding electrodes are not formed is thinned, and the first and second semiconductor chips are particularly thinned to a thickness of 200 μm or less. Preferably, the base has a thickness of 200 μm or less, and the electrode provided on the external connection terminal is a protruding electrode having a height of 300 μm or less.

Further, in the method of manufacturing the semiconductor device or the mounting structure thereof, in the wafer stage of each of the first and second semiconductor chips, the surface side on which the protruding electrode is not formed is thinned. Each of the wafers is preferably diced into the first and second semiconductor chips. In particular, a resin is filled between the plurality of projecting electrodes so as to be thinner than the height of the projecting electrodes so that the base of the projecting electrodes is reduced. It is desirable to reinforce and perform the dicing in this state. In this case, the resin is filled between a plurality of projecting electrodes, the wafer is thinned to a thickness of 200 μm or less in this state, the dicing is performed, and the first and second semiconductors obtained by the dicing are processed. 200 chips
bonding to the substrate having a thickness of μm or less,
Further, it is preferable that the second semiconductor chip is connected to the wiring substrate via a protruding electrode having a height of 300 μm or less at the external connection terminal.

After the resin is filled between the plurality of protruding electrode material layers serving as a base material of the plurality of protruding electrodes, the surface is flattened, and a second protruding electrode material layer is further formed on the base material. It is desirable to form the plurality of protruding electrodes by fixing.

The preferred embodiments of the above-described semiconductor device of the present invention, the mounting structure thereof, and their manufacturing methods are summarized in the following (1) to (3).

(1) On both surfaces of at least an intermediate (interposer) substrate having a thickness of 200 μm or less, a semiconductor device chip having bumps (bumps) and having a back surface thinned to a thickness of 200 μm or less is flip-chip mounted. It is desirable to have external connection terminals in the peripheral portion of the intermediate substrate on the side where the small-sized device is mounted.

In this case, specifically, the silicon device wafer after the LSI is formed is subjected to processing such as mechanical grinding (grinding), chemical mechanical polishing (chemical mechanical polishing), etching, or the like to have a thickness of 20 mm from the back surface.
Dicing after reducing the thickness to 0 μm or less, the resulting two thin device chips are thinned to 200 μm or less (interposer) substrate made of polyimide, glass epoxy, alumina, ceramic or the like. Flip chip mounting on both sides.

By providing external connection terminals on one of the surfaces of the intermediate substrate on which both surfaces of the thin device chip are mounted, preferably on the peripheral portion of the surface on which the device having a small chip size is mounted. This is mounted on a printed wiring board as one component module. This makes it possible to perform high-speed signal processing without increasing the mounting height and because the wiring length between device chips is very short. Three-dimensional mounting can be realized.

(2) After forming the projection (bump) electrode on the electrode portion of the LSI, the semiconductor device chip subjected to the above-described thinning processing is subjected to a step of filling at least the space between the bumps with a resin at the wafer level. It is preferable that the semiconductor wafer is further thinned from the back surface of the semiconductor wafer to a thickness of 200 μm or less and then diced into chips.

This makes it possible to improve the reliability of the bump bonding portion when mounting the thin bumped chip on the intermediate substrate. That is, in order to improve the thermal stress resistance of the bump joint, a resin coating step is firstly performed on the wafer after bump formation in order to reinforce the base of the bump, and then a thinning process is performed from the back surface of the wafer. Then, a thin device wafer with bumps having high mechanical strength is manufactured, and a semiconductor device chip diced therefrom is used.

As described above, the resin coating for reinforcing the base of the low-strength bump bonding portion is performed in a wafer state, so that the sealing resin underfill step which has been performed after mounting the substrate on a chip-by-chip basis is omitted. A highly reliable device chip with bumps can be manufactured by a highly productive manufacturing process, and can also easily perform a repair operation when a chip is defective.

Further, the epoxy resin coated on the surface of the wafer supplements the mechanical strength of the wafer after the thinning processing, and the reliability and the handling and electrical characteristics of the thinned device wafer and thus the diced thinned device chip are improved. It also contributes to improvement.

As described above, in the manufacture of semiconductor device parts necessary for realizing ultra-small and ultra-thin electronic devices, three-dimensional stacked mounting of thin device chips with bumps having high mechanical strength is required. It can be performed stably with reliability.

(3) In mounting a semiconductor device component, a protruding electrode (outer bump) having a height of at most 300 μm or less is formed on the external connection terminal of the above-mentioned thin intermediate substrate, and is surface-mounted on a printed wiring (mother) substrate. It is desirable to do.

That is, a protruding electrode having a height of 300 μm or less is provided on an external connection terminal of an intermediate substrate on which both surfaces of a thin device chip are mounted, so that a printed wiring (mother) is formed as one component module on which two device chips are mounted. When mounting on a substrate, an efficient high-density three-dimensional mounting is realized with a minimum mounting height by eliminating an extra space.

As a result, the semiconductor device parts can be made as thin as possible, and the mounting height of the substrate can be kept as low as possible (ultra-thin mounting), so that the final product set of electronic equipment can be made smaller and lighter. Will be able to

Next, an example of a preferred embodiment of the present invention will be described with reference to the drawings.

Example 1 In the present embodiment, in the mounting process of a semiconductor device component, the back surface of a device wafer is thinned using mechanical grinding (grinding) and chemical mechanical polishing (chemical mechanical polishing), and then two This is an example in which thin device chips (for example, for logic and memory) are flip-chip mounted on both sides of a thin intermediate substrate made of polyimide, and are further mounted on a printed wiring board as high-performance component modules. This will be described with reference to FIGS.

The wafer used as a sample in this example is the same as the one on which the ball bumps 14 were finally formed through the process flow shown in FIG. 8 (see FIG. 8E). Specifically, Al of the semiconductor substrate 1 for LSI
BLM (Ball Limiting Metal) film 4 on electrode pad 2
With the base as a base, a ball bump 14 of a high melting point solder having a height of about 100 μm is formed in the pattern opening of the polyimide film 3.

Next, an example of a mechanical grinding (grinding) processing apparatus used for thinning the semiconductor wafer is shown in FIG. After a protective tape 23 is applied to the front surface (bump side) of the semiconductor wafer 22 with bumps, the wafer 22 is set on the turntable 20 of the mechanical grinding device. Grinding (back grinding) was performed by the rotating grindstone 18. As shown in FIG. 4A, the back surface of the silicon wafer 22 before grinding is subjected to many scratches through a number of process steps such as a wafer pre-process and a bump formation process for forming an LSI. 19 are inevitably formed (however, the ball bumps 14 and the like are not shown).

Grinding wheel feed speed: 150 μm / min Grinding wheel rotation speed: 2500 rpm Wafer thickness after grinding: 110 μm (shaving allowance: about 510 μm)
m)

As a result, as shown in FIG. 4B, the silicon wafer was thinned to a thickness of 110 μm while the flaws 19 formed on the back surface of the wafer were removed by grinding.

Next, the thin wafer 2 after the back grinding process is performed.
2 was set in a chemical mechanical polishing apparatus as shown in FIG. That is, while being fixed to the wafer carrier 21 via the protective tape 23 and supplying the polishing solvent (slurry) 26 onto the polishing cloth 25 of the rotary platen 24, for example, the back surface of the wafer is polished by polishing under the following conditions. Finishing treatment was performed.

Wafer rotation speed: 80 rpm Table rotation speed: 80 rpm Polishing pressure: 400 g / cm ² Oscillation speed: 2 mm / sec Slurry supply speed: 40 ml / min Cutting allowance: 10 μm

As a result, grinding damage newly formed on the back surface of the wafer was removed, and the mechanical strength of the silicon wafer thinned to a thickness of 100 μm could be improved.

Then, by dicing this thinned wafer, a thin device chip 29 as shown in FIG. 1A is manufactured. In FIG. 1A,
A logic device having a relatively large chip size to be mounted first among two types of device chips is shown. Also, in response to the increase in the number of pins for logic devices,
This shows a case where the bump electrodes 14 are arranged not only on the periphery of the chip but also on the area.

Next, as shown in FIG. 1B, a thin intermediate (interposer) substrate 2 having a wiring pattern 30 formed on both sides and having a thickness of about 100 μm and made of polyimide or the like as a base material.
8, the thin logic device chip 29 was first bonded by flip-chip bonding via the ball bumps 14, and was fixed (underfilled) with an epoxy-based sealing resin 27 and mounted.

The logic device chip 2
9 on the opposite surface of the thin intermediate substrate 28 on which
As shown in FIG. 1C, a thin device chip 32 for a memory having a relatively small chip size is bonded by a flip-chip method via a ball bump 14, and is fixed and mounted with an epoxy-based sealing resin 33. . Further, on the side of the semiconductor chip 32 having a small chip size, about 30 terminals are connected to the external connection terminals 34 arranged around the intermediate substrate 28.
The thin device chips 29 electrically connected to each other by transferring the eutectic solder balls 35 of 0 μmφ.
And 32 were completed on both sides.

Lastly, as shown in FIG. 1D, the component module thus manufactured is surface-mounted on the wiring land 37 of the printed wiring (mother) board 36 as shown in FIG. High-density stacked three-dimensional mounting with a reduced mounting height was realized with good workability.

Further, in the semiconductor device manufactured according to the present embodiment, the wiring length between the device chips can be extremely reduced as compared with the conventional one (planar mounting or lamination mounting by wire connection). To provide a highly reliable and high-performance semiconductor device component that not only can reduce the mounting height and mounting area and can reduce the size and weight, but also can perform high-speed signal processing while suppressing the signal delay due to the inductance of the wiring portion. I was able to.

Therefore, as in the present example, the final product set of electronic equipment assembled using the device to which the present invention is applied is an IC card, a mobile phone, a PDA (Pers
onalDigital Assistant), and contributed greatly to the realization of further miniaturization, lightness and high functionality of portable electronic devices such as notebook computers.

Example 2 In the present embodiment, in the mounting process of the semiconductor device parts, the base of the high melting point solder bump of the device wafer in which bumps are formed on the electrodes of the LSI is reinforced with resin, and then the wafer is etched by etching. After thinning the back side,
Two thin device chips (for logic and memory)
Is mounted on both surfaces of a thin intermediate substrate made of glass epoxy by flip-chip bonding, and is further mounted on a printed circuit board as a high-performance component module. This will be described with reference to FIGS.

The silicon wafer used as a sample in this example has a bump electrode 14 formed in advance for flip-chip mounting after an LSI has been fabricated as in Example 1 described above. Specifically, as shown in FIG. 5A, the BL re-wired from the Al electrode pad 2 of the LSI semiconductor substrate 1 through the process flow shown in FIG.
With the M (Ball Limiting Metal) film 4 as a base, a ball bump 14 of a high melting point solder having a height of about 100 μm is formed in a pattern opening of a surface protection film 47 made of polyimide (FIG. 5A )reference).

In Example 1 described above, the wafer in this state was thinned, but in this example, as shown in FIG. 5B, a liquid resin material represented by an epoxy resin was used. The surface of the wafer is spin-coated, and thereafter, heat treatment is performed at about 150 ° C. for about 3 hours for curing to cure the resin, and the space between the plurality of ball bumps 14 is filled with the cured resin 48 that is filled below the bump height. Hardened.

Then, as described in FIG. 2, after the protective tape 23 is applied to the surface of the silicon wafer 22 in this state, the wafer is set in a mechanical grinding device. Grinding (back grinding) processing. At this time, the back surface of the silicon wafer before grinding is also subjected to a number of process steps of a wafer pre-process for forming an LSI and some processes for bump formation as shown in FIG. After that, many scratches 19 are inevitably formed.

Wheel feed speed: 150 μm / min Wheel rotation speed: 2500 rpm Wafer thickness after grinding: 150 μm (shaving allowance: about 475 μ)
m)

As a result, as shown in FIG. 4B, the silicon wafer was thinned to a thickness of 150 μm while the flaws 19 formed on the back surface of the wafer were removed by grinding.

Next, the thin wafer after the back grinding is set in a spin etching apparatus shown in FIG. That is, in the chamber 40, N ₂ gas is radially ejected outward from between the wafer 22 and the mechanical chuck 41 to support the wafer 22 in a state where an air film is formed and rotate the wafer 22 as an example. A mixed solution of acid and nitric acid was supplied onto the wafer 22 from the chemical solution supply unit 42, and a finishing process of the back surface of the wafer was performed by etching under the following conditions.

Wafer rotation speed: 2000 rpm Chemical composition: HF: HNO ₃ = 1: 9 Chemical supply amount: 40 l / min Wafer shaving allowance: 50 μm

As a result, as shown in FIG. 4B, grinding damage formed on the back surface of the wafer is removed,
As in Example 1 described above, the mechanical strength of a silicon wafer thinned to a thickness of 100 μm could be improved.

Then, if necessary, as shown in FIG. 5C, the surface of the high melting point solder bump 14 is flattened, and a pretreatment for adjusting the bump height is performed. As shown in d), by transferring the eutectic solder balls 45, a highly reliable thin device wafer in which the strength at the base of the bumps was reinforced with the resin 48 was completed. The transfer of the solder balls 45 was facilitated by the flattened base, and the heights between the solder balls after the transfer were uniform.

Further, the silicon wafer 2 thinned as described above with the bumps reinforced with resin as described above.
2 is diced at the position indicated by the broken line in FIG. 5, the thin device chip shown in FIG. 6A can be manufactured.

FIG. 6A shows a logic device having a relatively large chip size to be mounted first among the two types of device chips. In addition, a case is shown where bump electrodes are arranged not only in the peripheral part of the chip but also in the area in response to the increase in the number of pins of the logic device.

Next, as shown in FIG. 6B, a thin (interposer) substrate 28 having a wiring pattern formed on both sides and having a thickness of about 180 μm and made of glass epoxy or the like as a base material.
First, the thin logic device chip 49 described above was bonded by a flip chip method using a ball bump 45 and mounted. In this case, since the solder balls 45 are reinforced with the resin 48, the resin underfill as shown in FIG. 1 is not required. When the substrate 28 is a polyimide substrate, the thickness can be set to about 100 μm.

The logic device chip 4
9 on the opposite surface of the thin intermediate substrate 28 on which
As shown in FIG. 6C, a thin device chip 52 for a memory having a relatively small chip size, in which the base of the bump 45 is reinforced with a resin 48 in the same manner as the device chip 49 for a logic by the ball bump 45, is flipped. Bonding was carried out by a chip method, and fixed and mounted without underfill of resin. Further, the thin device chips electrically connected to each other by transferring eutectic solder balls 35 of about 300 μmφ to the external connection terminals 34 arranged on the periphery of the intermediate substrate 28 on the side of the semiconductor chip 52 having a small chip size. A high-performance component module on which both sides 49 and 52 were mounted was completed.

In the above-described example 1, flip chip mounting of a thin device chip on the intermediate substrate 28 is performed by bonding the silicon chips 29 and 32 and the substrate 28 with the sealing resins 27 and 33.
If the device chip becomes defective, the entire module on which the chip is mounted is discarded, or the chemical and mechanical external force is forcibly applied upon knowledge of the damage to the intermediate substrate 28. In addition, there is only a method of peeling off the chip, and the work of replacing (repairing) a defective component may be substantially difficult. However, in this example, a gap 50 is provided between the substrate 28 and the chips 49 and 52.
, There is also an advantage that rework work such as replacement of unnecessary parts can be easily performed.

Finally, as shown in FIG. 6D, the component module thus manufactured is surface-mounted on the wiring land 37 of the printed wiring (mother) board 36 as shown in FIG. High-density three-dimensional mounting with reduced height was achieved with good workability.

Further, in the semiconductor device manufactured according to the present embodiment, the wiring length between the device chips can be extremely shortened as compared with the conventional device (planar mounting or stacked mounting by wire connection). In addition to reducing the mounting height and mounting area and reducing the size and weight, as in the above-described example 1, high reliability and high reliability that enable high-speed signal processing with reduced signal delay due to the inductance of the wiring portion are possible. Functional semiconductor device parts could be provided.

Therefore, as in this example, the final product set of electronic equipment assembled by using the device to which the present invention is applied is an IC card, a mobile phone, a PDA (Pers
onalDigital Assistant), and contributed greatly to the realization of further miniaturization, lightness and high functionality of portable electronic devices such as notebook computers.

In the present embodiment, an example of wet etching using a chemical solution is described as an example of etching performed as a finishing process for a thin wafer, but dry etching using a halogen-based gas using a plasma processing apparatus may be performed. It is possible.

The present invention has been described above by way of example. However, the present invention is not limited to these examples, and the above examples are based on the technical idea of the present invention. Appropriate modifications or selections can be made without departing from the spirit of the invention, such as the apparatus and the processing conditions.

For example, in the above-described example, an example of mounting using solder ball bumps for bonding as a means for mounting a device chip or an intermediate substrate (or a means for mounting a device chip on a printed wiring board) has been described. , But also A
The present invention can be applied to component mounting using a joining means such as a u-stud bump, an anisotropic conductive film, or a conductive paste.

Further, external connection terminals are provided on the periphery of the intermediate substrate on the side of the semiconductor chip having a large chip size,
Using this, the design may be further changed, such as connecting a second printed wiring board or a third semiconductor chip.

[0076]

As described above, according to the present invention, the external connection terminals are provided on the peripheral portion of the substrate surface on the side where the chip occupied area is smaller among the first and second semiconductor chips face-down bonded to the substrate. In addition, since the semiconductor device is mounted on the wiring board at the external connection terminal via an electrode that is thicker than the thickness of the first or second semiconductor chip,
It is possible to reduce the package thickness and the mounting area by performing face-down bonding without using wire bonding, and to mount directly on the wiring board via the electrodes provided on the external connection terminals, thus improving workability. It can be improved and the mounting height can be reduced.

Accordingly, small and thin stacked three-dimensional mounting of semiconductor device parts can be realized with high reliability, high function and good workability, and various requirements such as high performance, high reliability, small size, thin shape, and light weight are required. A semiconductor device to be realized, a mounting structure thereof, and a manufacturing method thereof can be provided.

[Brief description of the drawings]

FIG. 1 is a schematic sectional view showing an example of a mounting process of a thin high-performance device component based on the present invention in the order of steps.

FIG. 2 is a schematic diagram of a mechanical grinding apparatus (backgrounder) used for thinning the back surface of a silicon wafer applied to the present invention.

FIG. 3 is a schematic diagram of a polish polishing apparatus used for finishing the thinned wafer.

FIG. 4 is a schematic cross-sectional view showing how the back surface of the wafer is processed.

FIG. 5 is a schematic sectional view showing a resin reinforcing process of a device wafer after bump formation according to the present invention in the order of steps.

FIG. 6 is a schematic cross-sectional view showing an example of a mounting process of a thin high-performance device component in which the base of a bump is resin-reinforced, in the order of the steps.

FIG. 7 is a schematic view of a spin etching apparatus used for finishing a thinned wafer applied to the present invention.

FIG. 8 is a schematic cross-sectional view showing an example of a manufacturing process of a solder ball bump in the order of steps.

FIG. 9 is a schematic sectional view of a conventional example of a device component in which semiconductor chips are stacked and mounted.

[Explanation of symbols]

1 ... semiconductor substrate (LSI), 2 ... Al electrode pad, 3,
47: Surface protective film (polyimide), 4: BLM (Ball L
imitting Metal), 6: photoresist film, 13: evaporated metal film (solder), 14: high melting point solder ball bump,
18 ... Whetstone, 19 ... Wafer back surface flaw, 21 ... Wafer carrier, 22 ... Silicon wafer, 23 ... Surface protection tape,
25: polishing cloth, 26: polishing solvent, 27, 33: sealing resin, 28: thin intermediate (interposer) substrate, 29, 3
2, 49, 52: Thin semiconductor device chip, 30: Wiring pattern, 35, 45: Solder ball, 36: Printed wiring board (mother board), 37: Cu wiring land, 4
8: epoxy resin, 50: gap

Claims (28)

[Claims] A first semiconductor chip on one surface of the base and a second semiconductor chip on the other surface, respectively, face-down bonded with different chip occupancy areas, and the first and second semiconductor chips The semiconductor device according to claim 1, wherein an external connection terminal is provided in a peripheral portion of said base surface on a side having a smaller chip occupation area. 2. The first semiconductor chip is flip-chip bonded to one surface of the intermediate substrate, and the second semiconductor chip smaller in chip size than the first semiconductor chip is flip-chip bonded to the other surface. The semiconductor device according to claim 1, wherein the external connection terminal is provided in a peripheral portion of a surface of the intermediate substrate on which the second semiconductor chip is mounted. 3. The semiconductor device according to claim 1, wherein the surface of the first and second semiconductor chips on which the protruding electrodes are not formed is thinned. 4. The semiconductor device according to claim 1, wherein said first and second semiconductor chips are 20
0 μm or less, and the substrate is
4. The semiconductor device according to claim 3, having a thickness of not more than μm. 5. The semiconductor device according to claim 1, wherein, in the first and second semiconductor chips, a resin is filled between the plurality of projecting electrodes so as to be thinner than the height of the projecting electrodes. 6. The semiconductor device according to claim 1, wherein said first and second semiconductor chips cooperate to form a high-performance component module. 7. A first semiconductor chip on one surface of a base and a second semiconductor chip on the other surface thereof are face-down bonded with different chip occupying areas, respectively, so that the first and second semiconductor chips are bonded. A semiconductor device provided with an external connection terminal in a peripheral portion of the base surface on a side where a chip occupied area is small, wherein the external connection terminal is provided via an electrode thicker than the first or second semiconductor chip 2. A mounting structure of a semiconductor device, which is connected to a wiring board. 8. The mounting structure of a semiconductor device according to claim 7, wherein said semiconductor device is directly connected to said wiring board by said electrode. 9. A first semiconductor chip is flip-chip bonded to one surface of the intermediate substrate, and a second semiconductor chip smaller in chip size than the first semiconductor chip is flip-chip bonded to the other surface. The mounting structure of a semiconductor device according to claim 7, wherein the external connection terminal is provided in a peripheral portion of a surface of the intermediate substrate on which the second semiconductor chip is mounted. 10. The mounting structure of a semiconductor device according to claim 7, wherein the first and second semiconductor chips are each processed to be thin on a surface side on which no protruding electrodes are formed. 11. The semiconductor device according to claim 1, wherein said first and second semiconductor chips are two or more.
The substrate is thinned to a thickness of not more than
The mounting structure of a semiconductor device according to claim 10, having a thickness of 0 μm or less, and wherein the electrode provided on the external connection terminal is a projection electrode having a height of 300 μm or less. 12. The mounting structure of a semiconductor device according to claim 7, wherein the first and second semiconductor chips are filled with a resin between the plurality of protruding electrodes so as to be thinner than the height of the protruding electrodes. 13. The high-performance component module according to claim 7, wherein said first and second semiconductor chips cooperate to form a high-performance component module.
3. The mounting structure of the semiconductor device described in 1. 14. A step of performing face-down bonding of a first semiconductor chip to one surface of a base, a step of forming external connection terminals on a peripheral portion of the other surface of the base, and an inner side of the external connection terminals. A second chip having a smaller chip occupation area than the first semiconductor chip on the other surface at a position;
Performing a face-down bonding of the semiconductor chip. 15. The flip chip bonding of the first semiconductor chip to one surface of the intermediate substrate and the second semiconductor chip to the other surface of the intermediate substrate.
3. The method for manufacturing a semiconductor device according to item 1. 16. At each wafer stage of the first and second semiconductor chips, a surface of the first and second semiconductor chips on which the protruding electrodes are not formed is thinned, and then the respective wafers are removed from the first and second semiconductor chips. 15. The method of manufacturing a semiconductor device according to claim 14, wherein dicing is performed on each of the semiconductor devices. 17. The method of manufacturing a semiconductor device according to claim 16, wherein a resin is filled between the plurality of projecting electrodes so as to be thinner than the height of the projecting electrodes, and the dicing is performed in this state. 18. Filling the resin between the plurality of protruding electrodes, thinning each of the wafers to a thickness of 200 μm or less in this state, and then performing the dicing to obtain the first and second wafers. 200 second semiconductor chips
18. The method of manufacturing a semiconductor device according to claim 17, wherein the bonding is performed to each of the substrates having a thickness of not more than μm. 19. After filling the resin between a plurality of protruding electrode material layers serving as a base material for the plurality of protruding electrodes, the surface is flattened, and a second protruding electrode material layer is further formed on the base material. The method of manufacturing a semiconductor device according to claim 17, wherein the plurality of protruding electrodes are formed by being fixed. 20. The high-performance component module according to claim 14, wherein said first and second semiconductor chips are combined.
3. The method for manufacturing a semiconductor device according to item 1. 21. A step of face-down bonding a first semiconductor chip to one surface of a base, a step of forming an external connection terminal on a peripheral portion of the other surface of the base, and an inner side of the external connection terminal. A second chip having a smaller chip occupation area than the first semiconductor chip on the other surface at a position;
Face-down bonding the semiconductor chip, and connecting the second semiconductor chip to a wiring substrate at the external connection terminal via an electrode that is thicker than the thickness of the first or second semiconductor chip. A method for manufacturing a mounting structure of a semiconductor device. 22. The method according to claim 21, wherein the second semiconductor chip is directly connected to the wiring board by the electrode. 23. The method according to claim 21, wherein the first semiconductor chip is flip-chip bonded to one surface of the intermediate substrate, and the second semiconductor chip is flip-chip bonded to the other surface.
3. A method for manufacturing a semiconductor device mounting structure according to claim 1. 24. At each wafer stage of the first and second semiconductor chips, a surface side on which no protruding electrodes are formed is thinned, and then the respective wafers are removed from the first and second semiconductor chips. 22. The method of manufacturing a semiconductor device mounting structure according to claim 21, wherein each of the semiconductor devices is diced. 25. The method according to claim 24, wherein a resin is filled between the plurality of projecting electrodes so as to be thinner than the height of the projecting electrodes, and the dicing is performed in this state. 26. Filling the resin between the plurality of protruding electrodes, thinning each of the wafers to a thickness of 200 μm or less in this state, and then performing the dicing, thereby obtaining the first and second wafers. The second semiconductor chip 2
26. The semiconductor device according to claim 25, wherein the second semiconductor chip is bonded to the wiring substrate via a protruding electrode having a height of 300 μm or less at the external connection terminal at the external connection terminal. Manufacturing method of mounting structure. 27. After the resin is filled between a plurality of protruding electrode material layers serving as a base material of the plurality of protruding electrodes, a surface is flattened, and a second protruding electrode material layer is further formed on the base material. 26. The method of manufacturing a semiconductor device mounting structure according to claim 25, wherein the plurality of projecting electrodes are fixedly formed. 28. The high-performance component module according to claim 21, wherein said first and second semiconductor chips are combined.
3. A method for manufacturing a semiconductor device mounting structure according to claim 1.