JP2000516043A - パワーハイブリッド集積回路 - Google Patents
パワーハイブリッド集積回路Info
- Publication number
- JP2000516043A JP2000516043A JP51743298A JP51743298A JP2000516043A JP 2000516043 A JP2000516043 A JP 2000516043A JP 51743298 A JP51743298 A JP 51743298A JP 51743298 A JP51743298 A JP 51743298A JP 2000516043 A JP2000516043 A JP 2000516043A
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- board
- power hybrid
- recess
- hybrid integrated
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001465 metallisation Methods 0.000 claims abstract description 17
- 239000004020 conductor Substances 0.000 claims abstract description 11
- 239000002184 metal Substances 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 239000011230 binding agent Substances 0.000 abstract description 6
- 230000017525 heat dissipation Effects 0.000 description 9
- 239000010931 gold Substances 0.000 description 4
- 229910015365 Au—Si Inorganic materials 0.000 description 2
- 229910045601 alloy Inorganic materials 0.000 description 2
- 239000000956 alloy Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000002955 isolation Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- 238000005219 brazing Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910000679 solder Inorganic materials 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Classifications
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Materials Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
- Structure Of Printed Boards (AREA)
- Insulated Metal Substrates For Printed Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1.そのおもて面にトポロジー的な金属被覆パターン(2)と、本質的にくぼみ (4)の底のブラインド穴(6)のシステムであり、熱伝導性の材料(10)で 満たしたヒートシンク(5)上にボード(1)のおもて面のくぼみ(4)に位置 決めした少なくとも1つの実装パッド(3)とを有する、両面を金属被覆した誘 電体ボード(1)を備え、ボード(1)がその裏面で熱伝導性のベース(7)と 結合しており、裸の電子チップ(9)はくぼみ(4)の実装パッド(3)に配置 して固定し、その結果、チップ(9)のおもて面がトポロジー的な金属被覆パタ ーン(2)と同一平面上にあるパワーハイブリッド集積回路において、 くぼみ(4)の底のヒートシンク(5)の穴(6)がブラインドであり、前記 ブラインド穴(6)の底の残りの厚さが1μm〜999μmであり、くぼみ(4 )のチップ(9)と側壁との間のスペースは、少なくとも部分的に熱伝導性の材 料(10)で満たしていることを特徴とするパワーハイブリッド集積回路。 2.対向するブラインド穴(13)は、くぼみ(4)の底のブラインド穴(6) の間にボード(1)の裏面に設けており、前記穴(13)は熱伝導性の材料(1 0)で満たしており、ブラインド穴(13)間の残りの誘電体厚さが1μm〜5 00μmであることを特徴とする請求項1記載のパワーハイブリッド集積回路。 3.くぼみ(4)の底のブラインド穴(6)のシステムが、面格子の形であるこ とを特徴とする請求項1又は請求項2記載のパワーハイブリッド集積回路。 4.ブラインド穴(14)は、くぼみ(4)の側面にさらに設けることを特徴と する請求項1,請求項2,又は請求項3記載のパワーハイブリッド集積回路。 5.ボード(1)の裏面に設けたブラインド穴(15)システムが、面格子の形 であることを特徴とする請求項1,請求項2,又は請求項3記載のパワーハイブリ ッド集積回路。 6.熱伝導性の材料(10)で満たしたブラインドスロット(16)は、くぼみ (4)の周辺部に沿ってボード(1)のおもて面に設けていることを特徴とする 請求項1,請求項2,又は請求項3記載のパワーハイブリッド集積回路。 7.くぼみ(4)と,ブラインド穴(6,13,14,15)と、スロット(16) とは、金属被覆していることを特徴とする請求項1又は請求項2記載のパワーハ イブリッド集積回路。 8.くぼみ(4)と,ブラインド穴(6,13,14,15)と、スロット(16) とは、金属被覆していることを特徴とする請求項4記載のパワーハイブリッド集 積回路。 9.くぼみ(4)と、ブラインド穴(6,13,14,15)と、スロット(16 )とは、金属被覆していることを特徴とする請求項5記載のパワーハイブリッド 集積回路。 10.くぼみ(4)と,ブラインド穴(6,13,14,15)と,スロット(16 )とは、金属被覆していることを特徴とする請求項6記載のパワーハイブリッド 集積回路。
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
PCT/RU1996/000293 WO1998015980A1 (fr) | 1996-10-10 | 1996-10-10 | Circuit integre hybride et de grande puissance |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2000516043A true JP2000516043A (ja) | 2000-11-28 |
JP3391462B2 JP3391462B2 (ja) | 2003-03-31 |
Family
ID=20130048
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP51743298A Expired - Fee Related JP3391462B2 (ja) | 1996-10-10 | 1996-10-10 | パワーハイブリッド集積回路 |
Country Status (4)
Country | Link |
---|---|
US (1) | US6115255A (ja) |
JP (1) | JP3391462B2 (ja) |
KR (1) | KR100420994B1 (ja) |
WO (1) | WO1998015980A1 (ja) |
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US6097089A (en) * | 1998-01-28 | 2000-08-01 | Mitsubishi Gas Chemical Company, Inc. | Semiconductor plastic package, metal plate for said package, and method of producing copper-clad board for said package |
DE69702399T2 (de) * | 1996-08-02 | 2001-02-15 | Schlumberger Systems & Service | Kombinierte chipkarte |
JP3883652B2 (ja) * | 1997-06-23 | 2007-02-21 | 大日本印刷株式会社 | 板状枠体付きicキャリアとその製造方法 |
JPH11289023A (ja) * | 1998-04-02 | 1999-10-19 | Oki Electric Ind Co Ltd | 半導体装置及びその製造方法 |
US6396143B1 (en) * | 1999-04-30 | 2002-05-28 | Mitsubishi Gas Chemical Company, Inc. | Ball grid array type printed wiring board having exellent heat diffusibility and printed wiring board |
JP4234259B2 (ja) * | 1999-05-14 | 2009-03-04 | 富士通テン株式会社 | 電子機器の組合せ構造 |
FR2796801B1 (fr) * | 1999-07-23 | 2001-10-05 | Valeo Electronique | Assemblage du type comportant une carte a circuit imprime et une semelle formant drain thermique disposes sur une embase formant radiateur |
US7209366B2 (en) * | 2004-03-19 | 2007-04-24 | Intel Corporation | Delivery regions for power, ground and I/O signal paths in an IC package |
GB2422249A (en) * | 2005-01-15 | 2006-07-19 | Robert John Morse | Power substrate |
US20070095564A1 (en) * | 2005-11-02 | 2007-05-03 | Ron Kozenitzky | Thin printed circuit board |
US8049323B2 (en) * | 2007-02-16 | 2011-11-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Chip holder with wafer level redistribution layer |
KR101022053B1 (ko) * | 2009-04-28 | 2011-03-16 | 한국단자공업 주식회사 | 인젝터용 커넥터 어셈블리 |
US8410371B2 (en) * | 2009-09-08 | 2013-04-02 | Cree, Inc. | Electronic device submounts with thermally conductive vias and light emitting devices including the same |
US8772817B2 (en) | 2010-12-22 | 2014-07-08 | Cree, Inc. | Electronic device submounts including substrates with thermally conductive vias |
TW201327733A (zh) * | 2011-12-27 | 2013-07-01 | Ind Tech Res Inst | 半導體結構及其製造方法 |
US10410958B2 (en) * | 2016-08-03 | 2019-09-10 | Soliduv, Inc. | Strain-tolerant die attach with improved thermal conductivity, and method of fabrication |
CN113097156B (zh) * | 2021-04-23 | 2023-03-31 | 郑州大学 | 一种定向、定域导热复合材料及其制备方法 |
Family Cites Families (11)
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EP0334397A3 (en) * | 1984-05-18 | 1990-04-11 | BRITISH TELECOMMUNICATIONS public limited company | Circuit board |
US4737235A (en) * | 1984-10-01 | 1988-04-12 | Tegal Corporation | Process for polysilicon with freon 11 and another gas |
US4729061A (en) * | 1985-04-29 | 1988-03-01 | Advanced Micro Devices, Inc. | Chip on board package for integrated circuit devices using printed circuit boards and means for conveying the heat to the opposite side of the package from the chip mounting side to permit the heat to dissipate therefrom |
US4731701A (en) * | 1987-05-12 | 1988-03-15 | Fairchild Semiconductor Corporation | Integrated circuit package with thermal path layers incorporating staggered thermal vias |
RU2025822C1 (ru) * | 1991-03-19 | 1994-12-30 | Государственное научно-производственное предприятие "Исток" | Гибридная интегральная схема |
RU2004036C1 (ru) * | 1991-04-25 | 1993-11-30 | Виктор Анатольевич Иовдальский | Гибридна интегральна СВЧ- и КВЧ-схема |
US5309322A (en) * | 1992-10-13 | 1994-05-03 | Motorola, Inc. | Leadframe strip for semiconductor packages and method |
TW373308B (en) * | 1995-02-24 | 1999-11-01 | Agere Systems Inc | Thin packaging of multi-chip modules with enhanced thermal/power management |
US5835356A (en) * | 1995-09-29 | 1998-11-10 | Allen Bradley Company, Llc | Power substrate module |
US5866952A (en) * | 1995-11-30 | 1999-02-02 | Lockheed Martin Corporation | High density interconnected circuit module with a compliant layer as part of a stress-reducing molded substrate |
US5687062A (en) * | 1996-02-20 | 1997-11-11 | Heat Technology, Inc. | High-thermal conductivity circuit board |
-
1996
- 1996-10-10 US US09/077,987 patent/US6115255A/en not_active Expired - Fee Related
- 1996-10-10 WO PCT/RU1996/000293 patent/WO1998015980A1/ru active IP Right Grant
- 1996-10-10 KR KR10-1998-0704324A patent/KR100420994B1/ko not_active IP Right Cessation
- 1996-10-10 JP JP51743298A patent/JP3391462B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR19990072030A (ko) | 1999-09-27 |
US6115255A (en) | 2000-09-05 |
KR100420994B1 (ko) | 2004-06-18 |
JP3391462B2 (ja) | 2003-03-31 |
WO1998015980A1 (fr) | 1998-04-16 |
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