JP2000501882A - 改善されたエレクトロマイグレーション信頼性を伴う集積回路用金属相互接続構造体 - Google Patents
改善されたエレクトロマイグレーション信頼性を伴う集積回路用金属相互接続構造体Info
- Publication number
- JP2000501882A JP2000501882A JP9508537A JP50853797A JP2000501882A JP 2000501882 A JP2000501882 A JP 2000501882A JP 9508537 A JP9508537 A JP 9508537A JP 50853797 A JP50853797 A JP 50853797A JP 2000501882 A JP2000501882 A JP 2000501882A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- interconnect structure
- deposited
- aluminum alloy
- titanium
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/76843—Barrier, adhesion or liner layers formed in openings in a dielectric
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
- H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
- H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
- H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
- H01L21/28512—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic System
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76841—Barrier, adhesion or liner layers
- H01L21/7685—Barrier, adhesion or liner layers the layer covering a conductive structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76838—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
- H01L21/76877—Filling of holes, grooves or trenches, e.g. vias, with conductive material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/532—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
- H01L23/53204—Conductive materials
- H01L23/53209—Conductive materials based on metals, e.g. alloys, metal silicides
- H01L23/53214—Conductive materials based on metals, e.g. alloys, metal silicides the principal metal being aluminium
- H01L23/53223—Additional layers associated with aluminium layers, e.g. adhesion, barrier, cladding layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
Claims (1)
- 【特許請求の範囲】 1. 半導体集積回路用多層相互接続構造体において、 それが、 チタン基層; チタン基層上に蒸着された窒化チタン層; 窒化チタン層上に蒸着されたシリコン不含アルミニウム−銅合金層;及び アルミニウム合金層上に蒸着された第2の窒化チタン層 からなることを特徴とする、半導体集積回路用多層相互接続構造体。 2. チタン基層及び窒化チタン層が両方とも厚さ約250オングストロームで ある、請求項1に記載の相互接続構造体。 3. シリコン不含アルミニウム−銅合金層が、Al95.5%及びCu0.5 %からなる、請求項1に記載の相互接続構造体。 4. 半導体集積回路用多層相互接続構造体の製法において、その製法が、 基板上にチタン層を蒸着させ; チタン基層上に窒化チタン層を蒸着させ; 500℃を上回る温度で窒化チタン層上にシリコン不含アルミニウム−銅 合金層を蒸着させ;かつ 第4の温度でアルミニウム−銅合金層の上に第2 の窒化チタン層を蒸着させる 工程からなる、半導体集積回路用多層相互接続構造体の製法。 5. チタン基層を蒸着させ、窒化チタン層を蒸着させ、シリコン不含アルミニ ウム−銅合金層を蒸着させ、かつ窒化チタンの第2の層を蒸着する工程が、それ ぞれの工程の間に真空が一貫して保持される単一の真空系中で行われる、請求項 4に記載の製法。 6. シリコン不含アルミニウム−銅合金層が、Al−Cu5%である、請求項 4に記載の製法。 7. シリコン不含アルミニウム−銅合金層を350℃〜550℃の温度で蒸着 させる、請求項4に記載の方法。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US08/513,494 | 1995-08-10 | ||
US08/513,494 US5641992A (en) | 1995-08-10 | 1995-08-10 | Metal interconnect structure for an integrated circuit with improved electromigration reliability |
PCT/US1996/012603 WO1997006562A1 (en) | 1995-08-10 | 1996-08-01 | Metal interconnect structure for an integrated circuit with improved electromigration reliability |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2000501882A true JP2000501882A (ja) | 2000-02-15 |
JP2000501882A5 JP2000501882A5 (ja) | 2004-09-09 |
Family
ID=24043525
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9508537A Pending JP2000501882A (ja) | 1995-08-10 | 1996-08-01 | 改善されたエレクトロマイグレーション信頼性を伴う集積回路用金属相互接続構造体 |
Country Status (6)
Country | Link |
---|---|
US (2) | US5641992A (ja) |
EP (1) | EP0843895B1 (ja) |
JP (1) | JP2000501882A (ja) |
KR (1) | KR19990036191A (ja) |
DE (1) | DE69624712T2 (ja) |
WO (1) | WO1997006562A1 (ja) |
Families Citing this family (27)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH09115829A (ja) * | 1995-10-17 | 1997-05-02 | Nissan Motor Co Ltd | アルミニウム配線部を有する半導体装置およびその製造方法 |
US5994217A (en) * | 1996-12-16 | 1999-11-30 | Chartered Semiconductor Manufacturing Ltd. | Post metallization stress relief annealing heat treatment for ARC TiN over aluminum layers |
US5943601A (en) * | 1997-04-30 | 1999-08-24 | International Business Machines Corporation | Process for fabricating a metallization structure |
US5891802A (en) * | 1997-07-23 | 1999-04-06 | Advanced Micro Devices, Inc. | Method for fabricating a metallization stack structure to improve electromigration resistance and keep low resistivity of ULSI interconnects |
US5942799A (en) * | 1997-11-20 | 1999-08-24 | Novellus Systems, Inc. | Multilayer diffusion barriers |
KR100249047B1 (ko) | 1997-12-12 | 2000-03-15 | 윤종용 | 반도체 소자 및 그 제조 방법 |
FR2774811B1 (fr) * | 1998-02-10 | 2003-05-09 | Sgs Thomson Microelectronics | Procede de formation de lignes conductrices sur des circuits integres |
US5994219A (en) * | 1998-06-04 | 1999-11-30 | Taiwan Semiconductor Manufacturing Company, Ltd. | Add one process step to control the SI distribution of Alsicu to improved metal residue process window |
TW439204B (en) * | 1998-09-18 | 2001-06-07 | Ibm | Improved-reliability damascene interconnects and process of manufacture |
JP2000150520A (ja) * | 1998-11-10 | 2000-05-30 | Internatl Business Mach Corp <Ibm> | 相互接続部、及び相互接続部の製造方法 |
US6777810B2 (en) * | 1999-02-19 | 2004-08-17 | Intel Corporation | Interconnection alloy for integrated circuits |
US6352620B2 (en) | 1999-06-28 | 2002-03-05 | Applied Materials, Inc. | Staged aluminum deposition process for filling vias |
US6433429B1 (en) * | 1999-09-01 | 2002-08-13 | International Business Machines Corporation | Copper conductive line with redundant liner and method of making |
US6534404B1 (en) | 1999-11-24 | 2003-03-18 | Novellus Systems, Inc. | Method of depositing diffusion barrier for copper interconnect in integrated circuit |
AU2003303784A1 (en) * | 2003-01-20 | 2004-08-13 | Systems On Silicon Manufacturing Company Pte Ltd | Titanium underlayer for lines in semiconductor devices |
JP2004266039A (ja) * | 2003-02-28 | 2004-09-24 | Shin Etsu Handotai Co Ltd | 発光素子及び発光素子の製造方法 |
US20040207093A1 (en) * | 2003-04-17 | 2004-10-21 | Sey-Shing Sun | Method of fabricating an alloy cap layer over CU wires to improve electromigration performance of CU interconnects |
US6882924B2 (en) * | 2003-05-05 | 2005-04-19 | Precision Engine Controls Corp. | Valve flow control system and method |
US7096450B2 (en) * | 2003-06-28 | 2006-08-22 | International Business Machines Corporation | Enhancement of performance of a conductive wire in a multilayered substrate |
KR100536808B1 (ko) * | 2004-06-09 | 2005-12-14 | 동부아남반도체 주식회사 | 반도체 소자 및 그 제조 방법 |
US7339274B2 (en) * | 2004-08-17 | 2008-03-04 | Agere Systems Inc. | Metallization performance in electronic devices |
US20090120785A1 (en) * | 2005-12-26 | 2009-05-14 | United Microelectronics Corp. | Method for forming metal film or stacked layer including metal film with reduced surface roughness |
US20070144892A1 (en) * | 2005-12-26 | 2007-06-28 | Hui-Shen Shih | Method for forming metal film or stacked layer including metal film with reduced surface roughness |
KR100650904B1 (ko) * | 2005-12-29 | 2006-11-28 | 동부일렉트로닉스 주식회사 | 알루미늄 배선 형성 방법 |
US8003536B2 (en) * | 2009-03-18 | 2011-08-23 | International Business Machines Corporation | Electromigration resistant aluminum-based metal interconnect structure |
CN102157356B (zh) * | 2011-03-15 | 2015-10-07 | 上海华虹宏力半导体制造有限公司 | 金属-绝缘体-金属半导体器件的下电极的制备方法 |
US9851506B2 (en) * | 2015-06-04 | 2017-12-26 | Elenion Technologies, Llc | Back end of line process integrated optical device fabrication |
Family Cites Families (20)
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US3879840A (en) * | 1969-01-15 | 1975-04-29 | Ibm | Copper doped aluminum conductive stripes and method therefor |
US4926237A (en) * | 1988-04-04 | 1990-05-15 | Motorola, Inc. | Device metallization, device and method |
US4998157A (en) * | 1988-08-06 | 1991-03-05 | Seiko Epson Corporation | Ohmic contact to silicon substrate |
US5658828A (en) * | 1989-11-30 | 1997-08-19 | Sgs-Thomson Microelectronics, Inc. | Method for forming an aluminum contact through an insulating layer |
US5478780A (en) * | 1990-03-30 | 1995-12-26 | Siemens Aktiengesellschaft | Method and apparatus for producing conductive layers or structures for VLSI circuits |
JPH04116821A (ja) * | 1990-09-06 | 1992-04-17 | Fujitsu Ltd | 半導体装置の製造方法 |
KR960001601B1 (ko) * | 1992-01-23 | 1996-02-02 | 삼성전자주식회사 | 반도체 장치의 접촉구 매몰방법 및 구조 |
KR920010620A (ko) * | 1990-11-30 | 1992-06-26 | 원본미기재 | 다층 상호접속선을 위한 알루미늄 적층 접점/통로 형성방법 |
US5345108A (en) * | 1991-02-26 | 1994-09-06 | Nec Corporation | Semiconductor device having multi-layer electrode wiring |
DE4200809C2 (de) * | 1991-03-20 | 1996-12-12 | Samsung Electronics Co Ltd | Verfahren zur Bildung einer metallischen Verdrahtungsschicht in einem Halbleiterbauelement |
US5270254A (en) * | 1991-03-27 | 1993-12-14 | Sgs-Thomson Microelectronics, Inc. | Integrated circuit metallization with zero contact enclosure requirements and method of making the same |
JP2811131B2 (ja) * | 1991-04-26 | 1998-10-15 | 三菱電機株式会社 | 半導体装置の配線接続構造およびその製造方法 |
EP0525517A1 (de) * | 1991-08-02 | 1993-02-03 | Siemens Aktiengesellschaft | Verfahren zur Auffüllung mindestens eines Kontaktloches in einer isolierenden Schicht |
JPH0590203A (ja) * | 1991-09-27 | 1993-04-09 | Nec Corp | 半導体装置の製造方法 |
US5240880A (en) * | 1992-05-05 | 1993-08-31 | Zilog, Inc. | Ti/TiN/Ti contact metallization |
US5371042A (en) * | 1992-06-16 | 1994-12-06 | Applied Materials, Inc. | Method of filling contacts in semiconductor devices |
US5270255A (en) * | 1993-01-08 | 1993-12-14 | Chartered Semiconductor Manufacturing Pte, Ltd. | Metallization process for good metal step coverage while maintaining useful alignment mark |
US5378660A (en) * | 1993-02-12 | 1995-01-03 | Applied Materials, Inc. | Barrier layers and aluminum contacts |
US5427666A (en) * | 1993-09-09 | 1995-06-27 | Applied Materials, Inc. | Method for in-situ cleaning a Ti target in a Ti + TiN coating process |
JPH0786401A (ja) * | 1993-09-17 | 1995-03-31 | Fujitsu Ltd | 半導体装置の製造方法 |
-
1995
- 1995-08-10 US US08/513,494 patent/US5641992A/en not_active Expired - Lifetime
-
1996
- 1996-08-01 WO PCT/US1996/012603 patent/WO1997006562A1/en not_active Application Discontinuation
- 1996-08-01 KR KR1019980700859A patent/KR19990036191A/ko not_active Application Discontinuation
- 1996-08-01 DE DE69624712T patent/DE69624712T2/de not_active Expired - Lifetime
- 1996-08-01 EP EP96926850A patent/EP0843895B1/en not_active Expired - Lifetime
- 1996-08-01 JP JP9508537A patent/JP2000501882A/ja active Pending
-
1997
- 1997-04-29 US US08/841,030 patent/US5798301A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO1997006562A1 (en) | 1997-02-20 |
DE69624712T2 (de) | 2003-09-11 |
EP0843895B1 (en) | 2002-11-06 |
US5641992A (en) | 1997-06-24 |
US5798301A (en) | 1998-08-25 |
DE69624712D1 (de) | 2002-12-12 |
EP0843895A1 (en) | 1998-05-27 |
KR19990036191A (ko) | 1999-05-25 |
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