ITMI20061432A1 - Modulo di memoria con dispositivi a semiconduttore impilati. - Google Patents

Modulo di memoria con dispositivi a semiconduttore impilati.

Info

Publication number
ITMI20061432A1
ITMI20061432A1 IT001432A ITMI20061432A ITMI20061432A1 IT MI20061432 A1 ITMI20061432 A1 IT MI20061432A1 IT 001432 A IT001432 A IT 001432A IT MI20061432 A ITMI20061432 A IT MI20061432A IT MI20061432 A1 ITMI20061432 A1 IT MI20061432A1
Authority
IT
Italy
Prior art keywords
memory module
semiconductor devices
stacked semiconductor
stacked
module
Prior art date
Application number
IT001432A
Other languages
English (en)
Inventor
Chang-Woo Koo
Young-Jun Park
Byung-Se So
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of ITMI20061432A1 publication Critical patent/ITMI20061432A1/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/10—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers
    • H01L25/105—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B82—NANOTECHNOLOGY
    • B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
    • B82Y10/00—Nanotechnology for information processing, storage or transmission, e.g. quantum computing or single electron logic
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
    • G11C5/04—Supports for storage elements, e.g. memory modules; Mounting or fixing of storage elements on such supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/4824—Connecting between the body and an opposite side of the item with respect to the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73215—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1017—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support
    • H01L2225/1023—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement the lowermost container comprising a device support the support being an insulating substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1047—Details of electrical connections between containers
    • H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/10—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers
    • H01L2225/1005—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/1011—All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices having separate containers the devices being of a type provided for in group H01L27/00 the containers being in a stacked arrangement
    • H01L2225/1094—Thermal management, e.g. cooling
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1532—Connection portion the connection portion being formed on the die mounting surface of the substrate
    • H01L2924/1533—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate
    • H01L2924/15331—Connection portion the connection portion being formed on the die mounting surface of the substrate the connection portion being formed both on the die mounting surface of the substrate and outside the die mounting surface of the substrate being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H01L2924/3511—Warping
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/023—Reduction of cross-talk, noise or electromagnetic interference using auxiliary mounted passive components or auxiliary substances
    • H05K1/0231—Capacitors or dielectric substances

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Nanotechnology (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
IT001432A 2005-07-25 2006-07-21 Modulo di memoria con dispositivi a semiconduttore impilati. ITMI20061432A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020050067371A KR100914552B1 (ko) 2005-07-25 2005-07-25 반도체 메모리 장치 및 이를 구비하는 메모리 모듈

Publications (1)

Publication Number Publication Date
ITMI20061432A1 true ITMI20061432A1 (it) 2007-01-26

Family

ID=37678314

Family Applications (1)

Application Number Title Priority Date Filing Date
IT001432A ITMI20061432A1 (it) 2005-07-25 2006-07-21 Modulo di memoria con dispositivi a semiconduttore impilati.

Country Status (3)

Country Link
US (1) US7615869B2 (it)
KR (1) KR100914552B1 (it)
IT (1) ITMI20061432A1 (it)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007029435A1 (ja) * 2005-09-02 2007-03-15 Nec Corporation 伝送方法、インターフェース回路、半導体装置、半導体パッケージ、半導体モジュールおよびメモリモジュール
KR100712549B1 (ko) * 2006-01-31 2007-05-02 삼성전자주식회사 패키지 리드를 포함하는 멀티 스택 패키지
KR100780692B1 (ko) * 2006-03-29 2007-11-30 주식회사 하이닉스반도체 칩 스택 패키지
US8435802B2 (en) 2006-05-22 2013-05-07 Taiwan Semiconductor Manufacturing Co., Ltd. Conductor layout technique to reduce stress-induced void formations
TWI453711B (zh) * 2007-03-21 2014-09-21 Semiconductor Energy Lab 顯示裝置
KR100843243B1 (ko) 2007-04-18 2008-07-02 삼성전자주식회사 신호의 전송파워를 최적화한 반도체 메모리 장치 및 그파워 초기화 방법
KR101409839B1 (ko) * 2007-05-23 2014-06-26 삼성전자주식회사 반도체 패키지
KR100876895B1 (ko) * 2007-07-27 2009-01-07 주식회사 하이닉스반도체 반도체 칩, 이를 갖는 반도체 패키지 및 반도체 패키지의제조 방법
US8358013B1 (en) * 2007-08-29 2013-01-22 Marvell International Ltd. Leadless multi-chip module structure
US7872346B1 (en) * 2007-12-03 2011-01-18 Xilinx, Inc. Power plane and land pad feature to prevent human metal electrostatic discharge damage
US20110185098A1 (en) * 2008-05-26 2011-07-28 Sk Telecom Co., Ltd. Memory card supplemented with wireless communication module, terminal for using same, memory card including wpan communication module, and wpan communication method using same
US8560735B2 (en) * 2008-08-15 2013-10-15 Micron Technology, Inc. Chained bus method and device
WO2010123566A1 (en) 2009-04-22 2010-10-28 Lxdata Inc. Pressure sensor arrangement using an optical fiber and methodologies for performing an analysis of a subterranean formation
KR101078742B1 (ko) 2009-12-31 2011-11-02 주식회사 하이닉스반도체 스택 패키지
US20130002039A1 (en) * 2010-03-05 2013-01-03 Yamaichi Electronics Co., Ltd. Non-contact connector
US8947889B2 (en) * 2010-10-14 2015-02-03 Lockheed Martin Corporation Conformal electromagnetic (EM) detector
US8476953B2 (en) 2011-08-25 2013-07-02 International Business Machines Corporation 3D integrated circuit stack-wide synchronization circuit
US8587357B2 (en) 2011-08-25 2013-11-19 International Business Machines Corporation AC supply noise reduction in a 3D stack with voltage sensing and clock shifting
US8576000B2 (en) 2011-08-25 2013-11-05 International Business Machines Corporation 3D chip stack skew reduction with resonant clock and inductive coupling
US8516426B2 (en) 2011-08-25 2013-08-20 International Business Machines Corporation Vertical power budgeting and shifting for three-dimensional integration
US8476771B2 (en) 2011-08-25 2013-07-02 International Business Machines Corporation Configuration of connections in a 3D stack of integrated circuits
US8381156B1 (en) 2011-08-25 2013-02-19 International Business Machines Corporation 3D inter-stratum connectivity robustness
US8519735B2 (en) 2011-08-25 2013-08-27 International Business Machines Corporation Programming the behavior of individual chips or strata in a 3D stack of integrated circuits
US8525569B2 (en) 2011-08-25 2013-09-03 International Business Machines Corporation Synchronizing global clocks in 3D stacks of integrated circuits by shorting the clock network
KR101909200B1 (ko) 2011-09-06 2018-10-17 삼성전자 주식회사 수동소자가 형성된 지지 부재를 포함하는 반도체 패키지
US9337182B2 (en) * 2012-12-28 2016-05-10 Taiwan Semiconductor Manufacturing Co., Ltd. Method to integrate different function devices fabricated by different process technologies
CN103869207B (zh) * 2014-03-06 2017-05-31 京东方科技集团股份有限公司 Dc‑dc器件焊接检测装置
KR102437774B1 (ko) 2015-11-17 2022-08-30 삼성전자주식회사 인쇄 회로 기판
US10199356B2 (en) 2017-02-24 2019-02-05 Micron Technology, Inc. Semiconductor device assembles with electrically functional heat transfer structures
US10090282B1 (en) 2017-06-13 2018-10-02 Micron Technology, Inc. Semiconductor device assemblies with lids including circuit elements
US10096576B1 (en) 2017-06-13 2018-10-09 Micron Technology, Inc. Semiconductor device assemblies with annular interposers
KR101995229B1 (ko) * 2018-11-09 2019-07-02 주식회사 디에스전자 내부 정합형 고출력 증폭기
KR20220000294A (ko) 2020-06-25 2022-01-03 삼성전자주식회사 반도체 패키지

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS616846A (ja) 1984-06-21 1986-01-13 Nec Corp コンデンサ付プラグインパツケ−ジ
JPH0756887B2 (ja) 1988-04-04 1995-06-14 株式会社日立製作所 半導体パッケージ及びそれを用いたコンピュータ
US4862322A (en) 1988-05-02 1989-08-29 Bickford Harry R Double electronic device structure having beam leads solderlessly bonded between contact locations on each device and projecting outwardly from therebetween
US5475262A (en) 1992-08-07 1995-12-12 Fujitsu Limited Functional substrates for packaging semiconductor chips
KR970007848B1 (ko) 1994-03-03 1997-05-17 삼성전자 주식회사 적층형 반도체 패키지 및 그 제조방법
KR0134648B1 (ko) * 1994-06-09 1998-04-20 김광호 노이즈가 적은 적층 멀티칩 패키지
KR0184076B1 (ko) * 1995-11-28 1999-03-20 김광호 상하 접속 수단이 패키지 내부에 형성되어 있는 3차원 적층형 패키지
US5786979A (en) 1995-12-18 1998-07-28 Douglass; Barry G. High density inter-chip connections by electromagnetic coupling
JP3673094B2 (ja) 1997-10-01 2005-07-20 株式会社東芝 マルチチップ半導体装置
US6809421B1 (en) * 1996-12-02 2004-10-26 Kabushiki Kaisha Toshiba Multichip semiconductor device, chip therefor and method of formation thereof
KR100351053B1 (ko) * 2000-05-19 2002-09-05 삼성전자 주식회사 종단저항을 내장하는 메모리 모듈 및 이를 포함하여 다중채널구조를 갖는 메모리 모듈
US7247932B1 (en) * 2000-05-19 2007-07-24 Megica Corporation Chip package with capacitor
US6873031B2 (en) * 2001-03-02 2005-03-29 Laird Technologies, Inc. Shielding device used for various components mounted on circuit board aligned with selectively cut areas
JP3583396B2 (ja) 2001-10-31 2004-11-04 富士通株式会社 半導体装置の製造方法、薄膜多層基板及びその製造方法
JP3492348B2 (ja) 2001-12-26 2004-02-03 新光電気工業株式会社 半導体装置用パッケージの製造方法
US6642614B1 (en) * 2002-08-21 2003-11-04 Teconn Electronics, Inc. Multi-functional memory chip connector
JP4057921B2 (ja) * 2003-01-07 2008-03-05 株式会社東芝 半導体装置およびそのアセンブリ方法

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