ITMI20062176A1 - Dispositivo semiconduttore avente una regione di separazione - Google Patents

Dispositivo semiconduttore avente una regione di separazione

Info

Publication number
ITMI20062176A1
ITMI20062176A1 IT002176A ITMI20062176A ITMI20062176A1 IT MI20062176 A1 ITMI20062176 A1 IT MI20062176A1 IT 002176 A IT002176 A IT 002176A IT MI20062176 A ITMI20062176 A IT MI20062176A IT MI20062176 A1 ITMI20062176 A1 IT MI20062176A1
Authority
IT
Italy
Prior art keywords
semiconductor device
separation region
separation
region
semiconductor
Prior art date
Application number
IT002176A
Other languages
English (en)
Inventor
Takashi Nakano
Shigeki Takahashi
Original Assignee
Denso Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Corp filed Critical Denso Corp
Publication of ITMI20062176A1 publication Critical patent/ITMI20062176A1/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • H01L29/063Reduced surface field [RESURF] pn-junction structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107Substrate region of field-effect devices
    • H01L29/1075Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079Substrate region of field-effect devices of field-effect transistors with insulated gate
    • H01L29/1083Substrate region of field-effect devices of field-effect transistors with insulated gate with an inactive supplementary region, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1095Body region, i.e. base region, of DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7825Lateral DMOS transistors, i.e. LDMOS transistors with trench gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843Source or drain regions of field-effect devices
    • H01L29/0847Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H01L29/0852Source or drain regions of field-effect devices of field-effect transistors with insulated gate of DMOS transistors
    • H01L29/0873Drain regions
    • H01L29/0878Impurity concentration or distribution
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
IT002176A 2005-11-14 2006-11-13 Dispositivo semiconduttore avente una regione di separazione ITMI20062176A1 (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005329334 2005-11-14

Publications (1)

Publication Number Publication Date
ITMI20062176A1 true ITMI20062176A1 (it) 2007-05-15

Family

ID=38037926

Family Applications (1)

Application Number Title Priority Date Filing Date
IT002176A ITMI20062176A1 (it) 2005-11-14 2006-11-13 Dispositivo semiconduttore avente una regione di separazione

Country Status (3)

Country Link
US (1) US7388255B2 (it)
DE (1) DE102006053145B4 (it)
IT (1) ITMI20062176A1 (it)

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US8115251B2 (en) * 2007-04-30 2012-02-14 International Business Machines Corporation Recessed gate channel with low Vt corner
EP1988636A1 (en) * 2007-05-03 2008-11-05 Deutsche Thomson OHG Method and apparatus for channel coding and decoding
CN102104048B (zh) * 2009-12-17 2012-05-30 中国科学院上海微系统与信息技术研究所 用于绝缘体上硅技术的mos型esd保护结构及其制作方法
US9412881B2 (en) 2012-07-31 2016-08-09 Silanna Asia Pte Ltd Power device integration on a common substrate
WO2014022092A1 (en) * 2012-07-31 2014-02-06 Io Semiconductor Inc. Power device integration on a common substrate
US10290702B2 (en) 2012-07-31 2019-05-14 Silanna Asia Pte Ltd Power device on bulk substrate
KR20140142888A (ko) * 2013-06-05 2014-12-15 에스케이하이닉스 주식회사 반도체 집적 회로 장치 및 그 제조방법
US9306058B2 (en) 2013-10-02 2016-04-05 Infineon Technologies Ag Integrated circuit and method of manufacturing an integrated circuit
US9401399B2 (en) 2013-10-15 2016-07-26 Infineon Technologies Ag Semiconductor device
CN103915506B (zh) * 2014-04-28 2016-08-31 重庆大学 一种具有纵向npn结构的双栅ldmos器件
DE102015105632B4 (de) 2015-04-14 2016-09-01 Infineon Technologies Ag Halbleitervorrichtung mit einem transistor
DE102015105679B4 (de) * 2015-04-14 2017-11-30 Infineon Technologies Ag Halbleitervorrichtung, integrierte schaltung und verfahren zum herstellen der halbleitervorrichtung
DE102015109538B3 (de) 2015-06-15 2016-12-08 Infineon Technologies Ag Transistor mit verbessertem Lawinendurchbruchsverhalten und Verfahren zur Herstellung
DE102015113605B4 (de) 2015-08-18 2018-09-27 Infineon Technologies Austria Ag Halbleitervorrichtung, die einen vertikalen PN-Übergang zwischen einem Bodybereich und einem Driftbereich enthält
CN108475677B (zh) * 2016-01-20 2022-07-26 罗姆股份有限公司 半导体装置
BR112018074758B1 (pt) 2016-05-30 2022-08-16 Nissan Motor Co., Ltd Dispositivo semicondutor
DE102016113393A1 (de) * 2016-07-20 2018-01-25 Infineon Technologies Ag Halbleitervorrichtung, die ein Transistor-Array und ein Abschlussgebiet enthält, und Verfahren zum Herstellen solch einer Halbleitervorrichtung
US10083897B2 (en) * 2017-02-20 2018-09-25 Silanna Asia Pte Ltd Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact
US9923059B1 (en) 2017-02-20 2018-03-20 Silanna Asia Pte Ltd Connection arrangements for integrated lateral diffusion field effect transistors
TWI739252B (zh) * 2019-12-25 2021-09-11 杰力科技股份有限公司 溝槽式mosfet元件及其製造方法

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Publication number Priority date Publication date Assignee Title
US5640034A (en) * 1992-05-18 1997-06-17 Texas Instruments Incorporated Top-drain trench based resurf DMOS transistor structure
DE69528944T2 (de) * 1994-09-16 2003-09-04 Toshiba Kawasaki Kk Halbleiteranordnung mit hoher Durchbruchspannung und mit einer vergrabenen MOS-Gatestruktur
DE19647324B4 (de) * 1995-11-15 2013-06-27 Denso Corporation Halbleiterbauelement
US6242787B1 (en) * 1995-11-15 2001-06-05 Denso Corporation Semiconductor device and manufacturing method thereof
US6831331B2 (en) * 1995-11-15 2004-12-14 Denso Corporation Power MOS transistor for absorbing surge current
KR100204033B1 (ko) 1996-11-15 1999-06-15 정선종 고압 소자 및 그 제조 방법
US6118149A (en) * 1997-03-17 2000-09-12 Kabushiki Kaisha Toshiba Trench gate MOSFET
JP3405681B2 (ja) * 1997-07-31 2003-05-12 株式会社東芝 半導体装置
JP4526179B2 (ja) * 2000-11-21 2010-08-18 三菱電機株式会社 半導体装置
US6882023B2 (en) * 2002-10-31 2005-04-19 Motorola, Inc. Floating resurf LDMOSFET and method of manufacturing same
JP4590884B2 (ja) * 2003-06-13 2010-12-01 株式会社デンソー 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US7388255B2 (en) 2008-06-17
DE102006053145A1 (de) 2007-05-31
DE102006053145B4 (de) 2014-07-10
US20070108469A1 (en) 2007-05-17

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