IT8422056A0 - Substrato semiconduttore e processo di realizzazione dello stesso. - Google Patents

Substrato semiconduttore e processo di realizzazione dello stesso.

Info

Publication number
IT8422056A0
IT8422056A0 IT8422056A IT2205684A IT8422056A0 IT 8422056 A0 IT8422056 A0 IT 8422056A0 IT 8422056 A IT8422056 A IT 8422056A IT 2205684 A IT2205684 A IT 2205684A IT 8422056 A0 IT8422056 A0 IT 8422056A0
Authority
IT
Italy
Prior art keywords
manufacturing
same
semiconductor substrate
semiconductor
substrate
Prior art date
Application number
IT8422056A
Other languages
English (en)
Other versions
IT1220993B (it
Inventor
Yoshiaki Matsushita
Original Assignee
Toshiba Kk
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Kk filed Critical Toshiba Kk
Publication of IT8422056A0 publication Critical patent/IT8422056A0/it
Application granted granted Critical
Publication of IT1220993B publication Critical patent/IT1220993B/it

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/167Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table further characterised by the doping material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/322Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections
    • H01L21/3221Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to modify their internal properties, e.g. to produce internal imperfections of silicon bodies, e.g. for gettering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/003Anneal
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/024Defect control-gettering and annealing
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/06Gettering
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/076Implant
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/083Ion implantation, general
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/097Lattice strain and defects
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/127Process induced defects

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
IT22056/84A 1983-07-29 1984-07-26 Substrato semiconduttore e processo di realizzazione dello stesso IT1220993B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58138857A JPS6031231A (ja) 1983-07-29 1983-07-29 半導体基体の製造方法

Publications (2)

Publication Number Publication Date
IT8422056A0 true IT8422056A0 (it) 1984-07-26
IT1220993B IT1220993B (it) 1990-06-21

Family

ID=15231765

Family Applications (1)

Application Number Title Priority Date Filing Date
IT22056/84A IT1220993B (it) 1983-07-29 1984-07-26 Substrato semiconduttore e processo di realizzazione dello stesso

Country Status (4)

Country Link
US (1) US4885257A (it)
JP (1) JPS6031231A (it)
DE (1) DE3427977A1 (it)
IT (1) IT1220993B (it)

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Publication number Priority date Publication date Assignee Title
WO1989008158A1 (en) * 1988-02-24 1989-09-08 Nippon Mining Co., Ltd. Single crystal of compound semiconductor, process for its production and semiconductor device manufactured by using same
JP2733975B2 (ja) * 1988-08-11 1998-03-30 日本電気株式会社 半導体装置
US5037766A (en) * 1988-12-06 1991-08-06 Industrial Technology Research Institute Method of fabricating a thin film polysilicon thin film transistor or resistor
US5250445A (en) * 1988-12-20 1993-10-05 Texas Instruments Incorporated Discretionary gettering of semiconductor circuits
US5066599A (en) * 1989-07-27 1991-11-19 Fujitsu Limited Silicon crystal oxygen evaluation method using fourier transform infrared spectroscopy (ftir) and semiconductor device fabrication method using the same
JPH0377329A (ja) * 1989-08-19 1991-04-02 Fujitsu Ltd 半導体装置の製造方法
US5554883A (en) * 1990-04-28 1996-09-10 Mitsubishi Denki Kabushiki Kaisha Semiconductor device and manufacturing method therefor
US5066359A (en) * 1990-09-04 1991-11-19 Motorola, Inc. Method for producing semiconductor devices having bulk defects therein
US5198371A (en) * 1990-09-24 1993-03-30 Biota Corp. Method of making silicon material with enhanced surface mobility by hydrogen ion implantation
JP2726583B2 (ja) * 1991-11-18 1998-03-11 三菱マテリアルシリコン株式会社 半導体基板
IT1255764B (it) * 1992-05-15 1995-11-15 Enichem Struttura soi con ossido sottile e profondo ottenuta per impiantazioneionica ad alta energia e successivi trattamenti termici.
JP3384506B2 (ja) * 1993-03-30 2003-03-10 ソニー株式会社 半導体基板の製造方法
KR960026128A (it) * 1994-12-12 1996-07-22
JP2701803B2 (ja) * 1995-08-28 1998-01-21 日本電気株式会社 半導体装置の製造方法
US5646053A (en) * 1995-12-20 1997-07-08 International Business Machines Corporation Method and structure for front-side gettering of silicon-on-insulator substrates
JPH09232324A (ja) * 1996-02-23 1997-09-05 Nec Corp 半導体基板及びその製造方法
JPH10242153A (ja) * 1997-02-26 1998-09-11 Hitachi Ltd 半導体ウエハ、半導体ウエハの製造方法、半導体装置および半導体装置の製造方法
FR2762138B1 (fr) * 1997-04-11 1999-07-02 Sgs Thomson Microelectronics Transistor mos a fort gradient de dopage sous sa grille
EP1019957B1 (de) * 1997-09-30 2003-01-29 Infineon Technologies AG Erzeugnis umfassend eine funktionsschicht enthaltend silizium und eine isolierschicht aus siliziumdioxid, sowie verfahren zu seiner herstellung
US6022793A (en) 1997-10-21 2000-02-08 Seh America, Inc. Silicon and oxygen ion co-implantation for metallic gettering in epitaxial wafers
KR100328455B1 (ko) 1997-12-30 2002-08-08 주식회사 하이닉스반도체 반도체소자의제조방법
US6638832B2 (en) 2000-12-21 2003-10-28 Bae Systems Information And Electronic Systems Integration, Inc. Elimination of narrow device width effects in complementary metal oxide semiconductor (CMOS) devices
US6339011B1 (en) * 2001-03-05 2002-01-15 Micron Technology, Inc. Method of forming semiconductive active area having a proximity gettering region therein and method of processing a monocrystalline silicon substrate to have a proximity gettering region
US6800887B1 (en) * 2003-03-31 2004-10-05 Intel Corporation Nitrogen controlled growth of dislocation loop in stress enhanced transistor
US20090004458A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Diffusion Control in Heavily Doped Substrates
US20090004426A1 (en) * 2007-06-29 2009-01-01 Memc Electronic Materials, Inc. Suppression of Oxygen Precipitation in Heavily Doped Single Crystal Silicon Substrates
KR20150134543A (ko) * 2014-05-22 2015-12-02 삼성전자주식회사 소자 제조용 기판 및 반도체 소자
DE102016125340A1 (de) * 2016-12-22 2018-06-28 Infineon Technologies Ag Verfahren zum Bilden eines Halbleitersubstrats, Verfahren zum Bilden eines Halbleiterbauelements, Halbleitersubstrat und Halbleiterbauelement
US10522367B2 (en) * 2017-03-06 2019-12-31 Qualcomm Incorporated Gettering layer formation and substrate

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US3600649A (en) * 1969-06-12 1971-08-17 Rca Corp High power avalanche diode
DE2224658A1 (de) * 1971-05-24 1972-12-07 Sacher Rudolf Gmbh Verfahren zur Herstellung von Dotierungsprofilen in Halbleitern
DE2507366C3 (de) * 1975-02-20 1980-06-26 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Unterdrückung parasitärer Schaltungselemente
US4069068A (en) * 1976-07-02 1978-01-17 International Business Machines Corporation Semiconductor fabrication method for improved device yield by minimizing pipes between common conductivity type regions
US4157268A (en) * 1977-06-16 1979-06-05 International Business Machines Corporation Localized oxidation enhancement for an integrated injection logic circuit
JPS5420676A (en) * 1977-07-15 1979-02-16 Mitsubishi Electric Corp Production of semiconductor heat-sensitive switching elements
US4197144A (en) * 1978-09-21 1980-04-08 General Electric Company Method for improving writing of information in memory targets
JPS5680139A (en) * 1979-12-05 1981-07-01 Chiyou Lsi Gijutsu Kenkyu Kumiai Manufacture of semiconductor device
JPS5693367A (en) * 1979-12-20 1981-07-28 Fujitsu Ltd Manufacture of semiconductor device
JPS56158431A (en) * 1980-05-13 1981-12-07 Meidensha Electric Mfg Co Ltd Forming of oxidized film of semiconductor element for electric power
JPS57177530A (en) * 1981-04-27 1982-11-01 Hitachi Ltd Processing of semiconductor wafer
JPS57201032A (en) * 1981-06-04 1982-12-09 Nec Corp Silicon single crystal semiconductor device
JPS58102528A (ja) * 1981-12-14 1983-06-18 Toshiba Corp 半導体ウエ−ハの処理方法
JPS5925230A (ja) * 1982-08-03 1984-02-09 Toshiba Corp シリコンウエハの製造方法
JPS5984432A (ja) * 1982-11-05 1984-05-16 Nec Corp シリコン基板
US4608096A (en) * 1983-04-04 1986-08-26 Monsanto Company Gettering
DE3473971D1 (en) * 1984-06-20 1988-10-13 Ibm Method of standardization and stabilization of semiconductor wafers

Also Published As

Publication number Publication date
US4885257A (en) 1989-12-05
DE3427977C2 (it) 1989-08-31
IT1220993B (it) 1990-06-21
JPH0455331B2 (it) 1992-09-03
DE3427977A1 (de) 1985-04-11
JPS6031231A (ja) 1985-02-18

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Legal Events

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TA Fee payment date (situation as of event date), data collected since 19931001

Effective date: 19970730