IT201700114539A1 - Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile - Google Patents

Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile

Info

Publication number
IT201700114539A1
IT201700114539A1 IT102017000114539A IT201700114539A IT201700114539A1 IT 201700114539 A1 IT201700114539 A1 IT 201700114539A1 IT 102017000114539 A IT102017000114539 A IT 102017000114539A IT 201700114539 A IT201700114539 A IT 201700114539A IT 201700114539 A1 IT201700114539 A1 IT 201700114539A1
Authority
IT
Italy
Prior art keywords
circuit
memory device
volatile memory
reading method
improved electrical
Prior art date
Application number
IT102017000114539A
Other languages
English (en)
Inventor
Carmelo Paolino
Antonino Conte
Anna Rita Maria Lipani
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to IT102017000114539A priority Critical patent/IT201700114539A1/it
Priority to US16/145,734 priority patent/US10593410B2/en
Priority to CN201811180366.6A priority patent/CN109658966B/zh
Priority to CN201821642156.XU priority patent/CN209087411U/zh
Publication of IT201700114539A1 publication Critical patent/IT201700114539A1/it

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/30—Power supply circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/065—Differential amplifiers of latching type
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/08—Control thereof
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0061—Timing circuits or methods
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G11C2013/0042—Read using differential sensing, e.g. bit line [BL] and bit line bar [BLB]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G11C2013/0045—Read using current through the cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/004—Reading or sensing circuits or methods
    • G11C2013/0054—Read is performed on a reference element, e.g. cell, and the reference sensed value is used to compare the sensed value of the selected cell
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/06—Sense amplifier related aspects
    • G11C2207/063—Current sense amplifiers
IT102017000114539A 2017-10-11 2017-10-11 Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile IT201700114539A1 (it)

Priority Applications (4)

Application Number Priority Date Filing Date Title
IT102017000114539A IT201700114539A1 (it) 2017-10-11 2017-10-11 Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile
US16/145,734 US10593410B2 (en) 2017-10-11 2018-09-28 Reading circuit and method for a non-volatile memory device
CN201811180366.6A CN109658966B (zh) 2017-10-11 2018-10-10 非易失性存储器件的读取电路和方法
CN201821642156.XU CN209087411U (zh) 2017-10-11 2018-10-10 感测放大器电路以及非易失性存储器件

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT102017000114539A IT201700114539A1 (it) 2017-10-11 2017-10-11 Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile

Publications (1)

Publication Number Publication Date
IT201700114539A1 true IT201700114539A1 (it) 2019-04-11

Family

ID=61024997

Family Applications (1)

Application Number Title Priority Date Filing Date
IT102017000114539A IT201700114539A1 (it) 2017-10-11 2017-10-11 Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile

Country Status (3)

Country Link
US (1) US10593410B2 (it)
CN (2) CN209087411U (it)
IT (1) IT201700114539A1 (it)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
IT201700114539A1 (it) * 2017-10-11 2019-04-11 St Microelectronics Srl Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile
CN109360593B (zh) * 2018-12-25 2023-09-22 北京时代全芯存储技术股份有限公司 感测放大装置
CN110235200B (zh) * 2019-04-30 2020-08-25 长江存储科技有限责任公司 能够减少读取时间的存储系统
CN110491423A (zh) * 2019-08-12 2019-11-22 北京航空航天大学 一种非易失性存储器的数据读取电路及其方法
IT201900024253A1 (it) 2019-12-17 2021-06-17 St Microelectronics Srl Dispositivo di memoria a cambiamento di fase con consumo di area ridotto, sistema includente il dispositivo di memoria e metodo di funzionamento del dispositivo di memoria a cambiamento di fase
WO2022087793A1 (zh) * 2020-10-26 2022-05-05 华为技术有限公司 一种数据读取电路及数据读取电路的控制方法
CN115458030A (zh) * 2021-06-09 2022-12-09 长江存储科技有限责任公司 用于三维nand存储器的泄漏检测

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070176638A1 (en) * 2006-02-01 2007-08-02 Samsung Electronics Co., Ltd. Output driver that operates both in a differential mode and in a single mode
EP3174200A1 (en) * 2015-11-24 2017-05-31 STMicroelectronics S.r.l. Sense-amplifier circuit with offset compensation for a non-volatile memory device

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2694119B1 (fr) * 1992-07-24 1994-08-26 Sgs Thomson Microelectronics Circuit de lecture pour mémoire, avec recharge et équilibrage avant lecture.
IT1304677B1 (it) * 1998-10-06 2001-03-28 St Microelectronics Srl Circuito di lettura di dati in celle di memoria non volatile.
WO2005106892A1 (en) * 2004-04-21 2005-11-10 Micron Technology, Inc. Sense amplifier for a non-volatile memory device
US7489186B2 (en) * 2006-01-18 2009-02-10 International Rectifier Corporation Current sense amplifier for voltage converter
EP2506432B1 (en) * 2011-04-01 2016-12-28 STMicroelectronics S.r.l. Level-shifter circuit
US8867260B2 (en) * 2012-04-24 2014-10-21 Agency For Science, Technology And Research Reading circuit for a resistive memory cell
US9698765B1 (en) * 2016-02-22 2017-07-04 Stmicroelectronics S.R.L. Dynamic sense amplifier with offset compensation
US10510383B2 (en) * 2017-10-03 2019-12-17 Sandisk Technologies Llc State dependent sense circuits and pre-charge operations for storage devices
IT201700114539A1 (it) * 2017-10-11 2019-04-11 St Microelectronics Srl Circuito e metodo di lettura con migliorate caratteristiche elettriche per un dispositivo di memoria non volatile

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070176638A1 (en) * 2006-02-01 2007-08-02 Samsung Electronics Co., Ltd. Output driver that operates both in a differential mode and in a single mode
EP3174200A1 (en) * 2015-11-24 2017-05-31 STMicroelectronics S.r.l. Sense-amplifier circuit with offset compensation for a non-volatile memory device

Also Published As

Publication number Publication date
US20190108886A1 (en) 2019-04-11
CN209087411U (zh) 2019-07-09
CN109658966A (zh) 2019-04-19
CN109658966B (zh) 2023-10-13
US10593410B2 (en) 2020-03-17

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