ITUA20161478A1 - Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile - Google Patents

Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile

Info

Publication number
ITUA20161478A1
ITUA20161478A1 ITUA2016A001478A ITUA20161478A ITUA20161478A1 IT UA20161478 A1 ITUA20161478 A1 IT UA20161478A1 IT UA2016A001478 A ITUA2016A001478 A IT UA2016A001478A IT UA20161478 A ITUA20161478 A IT UA20161478A IT UA20161478 A1 ITUA20161478 A1 IT UA20161478A1
Authority
IT
Italy
Prior art keywords
reading
circuit
memory cell
memory device
volatile memory
Prior art date
Application number
ITUA2016A001478A
Other languages
English (en)
Inventor
Giovanni Campardo
Salvatore Polizzi
Original Assignee
St Microelectronics Srl
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by St Microelectronics Srl filed Critical St Microelectronics Srl
Priority to ITUA2016A001478A priority Critical patent/ITUA20161478A1/it
Priority to US15/275,362 priority patent/US9865356B2/en
Priority to CN201621091075.6U priority patent/CN206489880U/zh
Priority to CN201610862920.3A priority patent/CN107180652B/zh
Priority to EP16194682.7A priority patent/EP3217405B1/en
Publication of ITUA20161478A1 publication Critical patent/ITUA20161478A1/it
Priority to US15/862,397 priority patent/US10249373B2/en

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/24—Bit-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/002—Isolation gates, i.e. gates coupling bit lines to the sense amplifier
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/12—Equalization of bit lines

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)
ITUA2016A001478A 2016-03-09 2016-03-09 Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile ITUA20161478A1 (it)

Priority Applications (6)

Application Number Priority Date Filing Date Title
ITUA2016A001478A ITUA20161478A1 (it) 2016-03-09 2016-03-09 Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile
US15/275,362 US9865356B2 (en) 2016-03-09 2016-09-24 Circuit and method for reading a memory cell of a non-volatile memory device
CN201621091075.6U CN206489880U (zh) 2016-03-09 2016-09-28 读取电路及非易失性存储器器件
CN201610862920.3A CN107180652B (zh) 2016-03-09 2016-09-28 用于读取非易失性存储器器件的存储器单元的电路和方法
EP16194682.7A EP3217405B1 (en) 2016-03-09 2016-10-19 Circuit and method for reading a memory cell of a non-volatile memory device
US15/862,397 US10249373B2 (en) 2016-03-09 2018-01-04 Circuit and method for reading a memory cell of a non-volatile memory device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITUA2016A001478A ITUA20161478A1 (it) 2016-03-09 2016-03-09 Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile

Publications (1)

Publication Number Publication Date
ITUA20161478A1 true ITUA20161478A1 (it) 2017-09-09

Family

ID=56026950

Family Applications (1)

Application Number Title Priority Date Filing Date
ITUA2016A001478A ITUA20161478A1 (it) 2016-03-09 2016-03-09 Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile

Country Status (4)

Country Link
US (2) US9865356B2 (it)
EP (1) EP3217405B1 (it)
CN (2) CN206489880U (it)
IT (1) ITUA20161478A1 (it)

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ITUA20161478A1 (it) * 2016-03-09 2017-09-09 St Microelectronics Srl Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile
IT201700108905A1 (it) * 2017-09-28 2019-03-28 St Microelectronics Srl Memoria a cambiamento di fase con selettori in tecnologia bjt e relativo metodo di lettura differenziale
IT201800003622A1 (it) * 2018-03-15 2019-09-15 St Microelectronics Srl Circuito traslatore di livello con migliorata efficienza e capacita' di traslazione di livello in due domini, in particolare per l'utilizzo in un dispositivo di memoria
IT201800003796A1 (it) * 2018-03-20 2019-09-20 St Microelectronics Srl Dispositivo di memoria non volatile con modalita' di lettura commutabile e relativo metodo di lettura
US10319425B1 (en) * 2018-03-29 2019-06-11 QUALCOMM Technologies Incorporated Offset-cancellation sensing circuit (OCSC)-based non-volatile (NV) memory circuits
IT201800005084A1 (it) 2018-05-04 2019-11-04 Dispositivo di memoria non volatile, in particolare a cambiamento di fase e relativo metodo di lettura
CN110491423A (zh) * 2019-08-12 2019-11-22 北京航空航天大学 一种非易失性存储器的数据读取电路及其方法
US11450364B2 (en) * 2020-08-27 2022-09-20 Taiwan Semiconductor Manufacturing Company Ltd. Computing-in-memory architecture
CN113126817B (zh) * 2021-03-12 2024-08-27 汇顶科技私人有限公司 电容感测电路、相关芯片及触控装置

Citations (4)

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US6307797B1 (en) * 1999-11-30 2001-10-23 Stmicroelectronics S.A. Reading device for integrated circuit memory
US6496434B1 (en) * 2000-08-25 2002-12-17 Micron Technology Inc. Differential sensing in a memory using two cycle pre-charge
US20080273397A1 (en) * 2007-05-03 2008-11-06 Hendrickson Nicholas T Switched bitline VTH sensing for non-volatile memories
US20150318025A1 (en) * 2014-05-02 2015-11-05 Samsung Electronics Co., Ltd. Memory device with reduced operating current

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ITUB20153235A1 (it) * 2015-08-26 2017-02-26 St Microelectronics Srl Decodificatore di riga per un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile
ITUA20161478A1 (it) * 2016-03-09 2017-09-09 St Microelectronics Srl Circuito e metodo di lettura di una cella di memoria di un dispositivo di memoria non volatile
IT201600088225A1 (it) * 2016-08-30 2018-03-02 St Microelectronics Srl Circuito traslatore di livello, in particolare per l'utilizzo in un dispositivo di memoria, e relativo dispositivo di memoria

Patent Citations (4)

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US6307797B1 (en) * 1999-11-30 2001-10-23 Stmicroelectronics S.A. Reading device for integrated circuit memory
US6496434B1 (en) * 2000-08-25 2002-12-17 Micron Technology Inc. Differential sensing in a memory using two cycle pre-charge
US20080273397A1 (en) * 2007-05-03 2008-11-06 Hendrickson Nicholas T Switched bitline VTH sensing for non-volatile memories
US20150318025A1 (en) * 2014-05-02 2015-11-05 Samsung Electronics Co., Ltd. Memory device with reduced operating current

Also Published As

Publication number Publication date
EP3217405B1 (en) 2019-05-22
US10249373B2 (en) 2019-04-02
US20170263323A1 (en) 2017-09-14
CN107180652B (zh) 2021-04-27
CN206489880U (zh) 2017-09-12
US20180130538A1 (en) 2018-05-10
US9865356B2 (en) 2018-01-09
CN107180652A (zh) 2017-09-19
EP3217405A1 (en) 2017-09-13

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