IN2013MN01542A - - Google Patents

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Publication number
IN2013MN01542A
IN2013MN01542A IN1542MUN2013A IN2013MN01542A IN 2013MN01542 A IN2013MN01542 A IN 2013MN01542A IN 1542MUN2013 A IN1542MUN2013 A IN 1542MUN2013A IN 2013MN01542 A IN2013MN01542 A IN 2013MN01542A
Authority
IN
India
Prior art keywords
trenches
concave surfaces
openings
surface area
silicon oxide
Prior art date
Application number
Other languages
English (en)
Inventor
Je Hsiung Lan
Matthew Michael Nowak
Evgeni P Gousev
Jonghae Kim
Clarence Chui
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2013MN01542A publication Critical patent/IN2013MN01542A/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B12/00Dynamic random access memory [DRAM] devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/005Electrodes
    • H01G4/012Form of non-self-supporting electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01GCAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00Fixed capacitors; Processes of their manufacture
    • H01G4/002Details
    • H01G4/018Dielectrics
    • H01G4/06Solid dielectrics
    • H01G4/08Inorganic dielectrics
    • H01G4/10Metal-oxide dielectrics
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223Capacitor integral with wiring layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40Capacitors
    • H01L28/60Electrodes
    • H01L28/82Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/87Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92Capacitors having potential barriers
    • H01L29/94Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945Trench capacitors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10BELECTRONIC MEMORY DEVICES
    • H10B99/00Subject matter not provided for in other groups of this subclass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/642Capacitive arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15172Fan-out arrangement of the internal vias
    • H01L2924/15174Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/1517Multilayer substrate
    • H01L2924/15192Resurf arrangement of the internal vias
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)
IN1542MUN2013 2011-02-04 2012-02-06 IN2013MN01542A (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/021,151 US8492874B2 (en) 2011-02-04 2011-02-04 High density metal-insulator-metal trench capacitor
PCT/US2012/023999 WO2012106720A1 (en) 2011-02-04 2012-02-06 High density metal-insulator-metal trench capacitor with concave surfaces

Publications (1)

Publication Number Publication Date
IN2013MN01542A true IN2013MN01542A (ko) 2015-06-12

Family

ID=45768300

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1542MUN2013 IN2013MN01542A (ko) 2011-02-04 2012-02-06

Country Status (5)

Country Link
US (1) US8492874B2 (ko)
EP (1) EP2671245A1 (ko)
KR (2) KR20150059807A (ko)
IN (1) IN2013MN01542A (ko)
WO (1) WO2012106720A1 (ko)

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US9012296B2 (en) 2012-12-11 2015-04-21 Taiwan Semiconductor Manufacturing Co., Ltd. Self-aligned deep trench capacitor, and method for making the same
US9468098B2 (en) * 2014-03-20 2016-10-11 Qualcomm Incorporated Face-up substrate integration with solder ball connection in semiconductor package
US9562292B2 (en) 2014-05-05 2017-02-07 The United States Of America, As Represented By The Secretary Of Commerce Photoactive article, process for making, and use of same
DE102016122943B4 (de) 2015-12-29 2024-03-21 Taiwan Semiconductor Manufacturing Co., Ltd. Integrierter chip beinhaltend einen tiefgrabenkondensator mit gewelltem profil sowie herstellungsverfahren für letzteren
US20170186837A1 (en) * 2015-12-29 2017-06-29 Taiwan Semiconductor Manufacturing Co., Ltd. Deep trench capacitor with scallop profile
US10734402B2 (en) * 2017-09-07 2020-08-04 Toshiba Memory Corporation Semiconductor device and method of fabricating the same
US10886293B2 (en) * 2017-09-07 2021-01-05 Toshiba Memory Corporation Semiconductor device and method of fabricating the same
WO2019171470A1 (ja) * 2018-03-06 2019-09-12 株式会社 東芝 コンデンサ及びその製造方法
JP7063019B2 (ja) * 2018-03-09 2022-05-09 Tdk株式会社 薄膜コンデンサの製造方法及び薄膜コンデンサ
US11081543B2 (en) * 2018-03-23 2021-08-03 International Business Machines Corporation Multi-spheroid BEOL capacitor
US10381263B1 (en) 2018-05-04 2019-08-13 International Business Machines Corporation Method of forming via contact with resistance control
US10373866B1 (en) 2018-05-04 2019-08-06 International Business Machines Corporation Method of forming metal insulator metal capacitor with extended capacitor plates
US11063157B1 (en) * 2019-12-27 2021-07-13 Taiwan Semiconductor Manufacturing Company, Ltd. Trench capacitor profile to decrease substrate warpage
CN113178426A (zh) * 2020-05-11 2021-07-27 台湾积体电路制造股份有限公司 半导体器件及其制造方法
KR102704410B1 (ko) * 2021-07-08 2024-09-09 에스케이키파운드리 주식회사 스캘롭 프로파일을 갖는 깊은 트렌치 식각 방법

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US5970340A (en) * 1997-06-24 1999-10-19 Micron Technology, Inc. Method for making semiconductor device incorporating an electrical contact to an internal conductive layer
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Also Published As

Publication number Publication date
US8492874B2 (en) 2013-07-23
KR20150059807A (ko) 2015-06-02
US20120199949A1 (en) 2012-08-09
WO2012106720A1 (en) 2012-08-09
EP2671245A1 (en) 2013-12-11
KR20130120535A (ko) 2013-11-04

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