IN2013MN01542A - - Google Patents

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Publication number
IN2013MN01542A
IN2013MN01542A IN1542MUN2013A IN2013MN01542A IN 2013MN01542 A IN2013MN01542 A IN 2013MN01542A IN 1542MUN2013 A IN1542MUN2013 A IN 1542MUN2013A IN 2013MN01542 A IN2013MN01542 A IN 2013MN01542A
Authority
IN
India
Prior art keywords
trenches
concave surfaces
openings
surface area
silicon oxide
Prior art date
Application number
Inventor
Je Hsiung Lan
Matthew Michael Nowak
Evgeni P Gousev
Jonghae Kim
Clarence Chui
Original Assignee
Qualcomm Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Qualcomm Inc filed Critical Qualcomm Inc
Publication of IN2013MN01542A publication Critical patent/IN2013MN01542A/en

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/005—Electrodes
    • H01G4/012—Form of non-self-supporting electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01G—CAPACITORS; CAPACITORS, RECTIFIERS, DETECTORS, SWITCHING DEVICES, LIGHT-SENSITIVE OR TEMPERATURE-SENSITIVE DEVICES OF THE ELECTROLYTIC TYPE
    • H01G4/00—Fixed capacitors; Processes of their manufacture
    • H01G4/002—Details
    • H01G4/018—Dielectrics
    • H01G4/06—Solid dielectrics
    • H01G4/08—Inorganic dielectrics
    • H01G4/10—Metal-oxide dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H01L23/5223—Capacitor integral with wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L28/00—Passive two-terminal components without a potential-jump or surface barrier for integrated circuits; Details thereof; Multistep manufacturing processes therefor
    • H01L28/40—Capacitors
    • H01L28/60—Electrodes
    • H01L28/82—Electrodes with an enlarged surface, e.g. formed by texturisation
    • H01L28/86—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions
    • H01L28/87—Electrodes with an enlarged surface, e.g. formed by texturisation having horizontal extensions made by depositing layers, e.g. by depositing alternating conductive and insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/642—Capacitive arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15192—Resurf arrangement of the internal vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Inorganic Chemistry (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous silicon layers through isotropic etching to form concave surfaces. Conducting insulating and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.
IN1542MUN2013 2011-02-04 2012-02-06 IN2013MN01542A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US13/021,151 US8492874B2 (en) 2011-02-04 2011-02-04 High density metal-insulator-metal trench capacitor
PCT/US2012/023999 WO2012106720A1 (en) 2011-02-04 2012-02-06 High density metal-insulator-metal trench capacitor with concave surfaces

Publications (1)

Publication Number Publication Date
IN2013MN01542A true IN2013MN01542A (en) 2015-06-12

Family

ID=45768300

Family Applications (1)

Application Number Title Priority Date Filing Date
IN1542MUN2013 IN2013MN01542A (en) 2011-02-04 2012-02-06

Country Status (5)

Country Link
US (1) US8492874B2 (en)
EP (1) EP2671245A1 (en)
KR (2) KR20130120535A (en)
IN (1) IN2013MN01542A (en)
WO (1) WO2012106720A1 (en)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101842901B1 (en) * 2011-10-18 2018-03-29 삼성전자주식회사 Manufacturing method of semiconductor device
US9012296B2 (en) 2012-12-11 2015-04-21 Taiwan Semiconductor Manufacturing Co., Ltd. Self-aligned deep trench capacitor, and method for making the same
US9468098B2 (en) * 2014-03-20 2016-10-11 Qualcomm Incorporated Face-up substrate integration with solder ball connection in semiconductor package
US9562292B2 (en) 2014-05-05 2017-02-07 The United States Of America, As Represented By The Secretary Of Commerce Photoactive article, process for making, and use of same
DE102016122943B4 (en) 2015-12-29 2024-03-21 Taiwan Semiconductor Manufacturing Co., Ltd. INTEGRATED CHIP INCLUDING A DEEP TRENCH CAPACITOR WITH A CORRUPTED PROFILE AND MANUFACTURING PROCESS FOR THE LATTER
US20170186837A1 (en) 2015-12-29 2017-06-29 Taiwan Semiconductor Manufacturing Co., Ltd. Deep trench capacitor with scallop profile
US10886293B2 (en) * 2017-09-07 2021-01-05 Toshiba Memory Corporation Semiconductor device and method of fabricating the same
US10734402B2 (en) * 2017-09-07 2020-08-04 Toshiba Memory Corporation Semiconductor device and method of fabricating the same
WO2019171470A1 (en) * 2018-03-06 2019-09-12 株式会社 東芝 Capacitor and method for producing same
JP7063019B2 (en) * 2018-03-09 2022-05-09 Tdk株式会社 Manufacturing method of thin film capacitors and thin film capacitors
US11081543B2 (en) * 2018-03-23 2021-08-03 International Business Machines Corporation Multi-spheroid BEOL capacitor
US10373866B1 (en) 2018-05-04 2019-08-06 International Business Machines Corporation Method of forming metal insulator metal capacitor with extended capacitor plates
US10381263B1 (en) 2018-05-04 2019-08-13 International Business Machines Corporation Method of forming via contact with resistance control
US11063157B1 (en) 2019-12-27 2021-07-13 Taiwan Semiconductor Manufacturing Company, Ltd. Trench capacitor profile to decrease substrate warpage
CN113178426A (en) * 2020-05-11 2021-07-27 台湾积体电路制造股份有限公司 Semiconductor device and method for manufacturing the same
KR20230009025A (en) * 2021-07-08 2023-01-17 주식회사 키파운드리 Method of Deep Trench Etching with Scallop Profile

Family Cites Families (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59131974A (en) 1983-01-18 1984-07-28 セイコーエプソン株式会社 Electrooptic apparatus
US5160987A (en) 1989-10-26 1992-11-03 International Business Machines Corporation Three-dimensional semiconductor structures formed from planar layers
US5155657A (en) 1991-10-31 1992-10-13 International Business Machines Corporation High area capacitor formation using material dependent etching
DE19546999C1 (en) 1995-12-15 1997-04-30 Siemens Ag Capacitor mfg system for semiconductor device
US5753948A (en) 1996-11-19 1998-05-19 International Business Machines Corporation Advanced damascene planar stack capacitor fabrication method
US5970340A (en) * 1997-06-24 1999-10-19 Micron Technology, Inc. Method for making semiconductor device incorporating an electrical contact to an internal conductive layer
US5976945A (en) * 1997-11-20 1999-11-02 Vanguard International Semiconductor Corporation Method for fabricating a DRAM cell structure on an SOI wafer incorporating a two dimensional trench capacitor
JP3630551B2 (en) 1998-04-02 2005-03-16 株式会社東芝 Semiconductor memory device and manufacturing method thereof
US5981350A (en) * 1998-05-29 1999-11-09 Micron Technology, Inc. Method for forming high capacitance memory cells
JP2002009244A (en) * 2000-06-21 2002-01-11 Hitachi Ltd Semiconductor integrated circuit and its design method
US6204141B1 (en) * 2000-09-13 2001-03-20 Taiwan Semiconductor Mfg. Co. Ltd. Method of manufacturing a deep trench capacitor
JP2002222934A (en) 2001-01-29 2002-08-09 Nec Corp Semiconductor device and manufacturing method thereof
JP2002334940A (en) 2001-05-10 2002-11-22 Sony Corp Semiconductor device and method of manufacturing the same
US6387750B1 (en) 2001-07-02 2002-05-14 Macronix International Co., Ltd. Method of forming MIM capacitor
DE10143283C1 (en) 2001-09-04 2002-12-12 Infineon Technologies Ag Production of a trench capacitor comprises a preparing a substrate having a surface in which a trench is formed and having an upper region, a lower region and a side wall
US20030052088A1 (en) 2001-09-19 2003-03-20 Anisul Khan Method for increasing capacitance in stacked and trench capacitors
KR100528326B1 (en) 2002-12-31 2005-11-15 삼성전자주식회사 Thin film semiconductor device with protective cap over flexible substrate and electronic device using the same and manufacturing method thereof
US7239194B2 (en) * 2004-03-25 2007-07-03 Integral Wave Technologies, Inc. Trench capacitor power supply system and method
US7270765B2 (en) 2004-06-14 2007-09-18 Asahi Glass Company, Limited Composition for forming dielectric layer, MIM capacitor and process for its production
US7223654B2 (en) 2005-04-15 2007-05-29 International Business Machines Corporation MIM capacitor and method of fabricating same
DE102005038219B4 (en) 2005-08-12 2008-11-13 Infineon Technologies Ag Integrated circuit arrangement with capacitor in a track layer and method for producing the same
EP1949418A2 (en) 2005-11-08 2008-07-30 Nxp B.V. Integrated capacitor arrangement for ultrahigh capacitance values
JP2009535835A (en) 2006-05-02 2009-10-01 エヌエックスピー ビー ヴィ Electrical device with improved electrode
KR100778865B1 (en) 2006-05-25 2007-11-22 동부일렉트로닉스 주식회사 Method for manufacturing mim type capacitor
JP5016928B2 (en) * 2007-01-10 2012-09-05 株式会社東芝 Nonvolatile semiconductor memory device and manufacturing method thereof
TW200849488A (en) 2007-06-08 2008-12-16 Nanya Technology Corp Deep trench and fabricating method thereof, trench capacitor and fabricating method thereof
JP2009277770A (en) * 2008-05-13 2009-11-26 Toshiba Corp Non-volatile semiconductor memory device and its production process
US8021945B2 (en) 2009-04-14 2011-09-20 International Business Machines Corporation Bottle-shaped trench capacitor with enhanced capacitance
US8502340B2 (en) * 2010-12-09 2013-08-06 Tessera, Inc. High density three-dimensional integrated capacitors

Also Published As

Publication number Publication date
KR20130120535A (en) 2013-11-04
EP2671245A1 (en) 2013-12-11
US8492874B2 (en) 2013-07-23
WO2012106720A1 (en) 2012-08-09
US20120199949A1 (en) 2012-08-09
KR20150059807A (en) 2015-06-02

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